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Various muxes can aggregate multiple irq lines and provide a control register to determine the active line. Add bindings for interrupt controller support. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Phil Reid <preid@electromag.com.au> Signed-off-by: Peter Rosin <peda@axentia.se>
66 lines
1.7 KiB
Plaintext
66 lines
1.7 KiB
Plaintext
* NXP PCA954x I2C bus switch
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Required Properties:
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- compatible: Must contain one of the following.
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"nxp,pca9540", "nxp,pca9542", "nxp,pca9543", "nxp,pca9544",
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"nxp,pca9545", "nxp,pca9546", "nxp,pca9547", "nxp,pca9548"
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- reg: The I2C address of the device.
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The following required properties are defined externally:
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- Standard I2C mux properties. See i2c-mux.txt in this directory.
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- I2C child bus nodes. See i2c-mux.txt in this directory.
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Optional Properties:
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- reset-gpios: Reference to the GPIO connected to the reset input.
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- i2c-mux-idle-disconnect: Boolean; if defined, forces mux to disconnect all
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children in idle state. This is necessary for example, if there are several
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multiplexers on the bus and the devices behind them use same I2C addresses.
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- interrupt-parent: Phandle for the interrupt controller that services
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interrupts for this device.
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- interrupts: Interrupt mapping for IRQ.
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- interrupt-controller: Marks the device node as an interrupt controller.
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- #interrupt-cells : Should be two.
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- first cell is the pin number
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- second cell is used to specify flags.
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See also Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
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Example:
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i2c-switch@74 {
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compatible = "nxp,pca9548";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x74>;
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interrupt-parent = <&ipic>;
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interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
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interrupt-controller;
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#interrupt-cells = <2>;
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i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <2>;
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eeprom@54 {
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compatible = "at,24c08";
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reg = <0x54>;
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};
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};
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i2c@4 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <4>;
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rtc@51 {
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compatible = "nxp,pcf8563";
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reg = <0x51>;
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};
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};
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};
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