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This patchs allows to combine the AES and SHA hardware accelerators on some Atmel SoCs. Doing so, AES blocks are only written to/read from the AES hardware. Those blocks are also transferred from the AES to the SHA accelerator internally, without additionnal accesses to the system busses. Hence, the AES and SHA accelerators work in parallel to process all the data blocks, instead of serializing the process by (de)crypting those blocks first then authenticating them after like the generic crypto/authenc.c driver does. Of course, both the AES and SHA hardware accelerators need to be available before we can start to process the data blocks. Hence we use their crypto request queue to synchronize both drivers. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
65 lines
2.2 KiB
C
65 lines
2.2 KiB
C
/*
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* API for Atmel Secure Protocol Layers Improved Performances (SPLIP)
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*
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* Copyright (C) 2016 Atmel Corporation
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*
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* Author: Cyrille Pitchen <cyrille.pitchen@atmel.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* This driver is based on drivers/mtd/spi-nor/fsl-quadspi.c from Freescale.
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*/
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#ifndef __ATMEL_AUTHENC_H__
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#define __ATMEL_AUTHENC_H__
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#ifdef CONFIG_CRYPTO_DEV_ATMEL_AUTHENC
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#include <crypto/authenc.h>
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#include <crypto/hash.h>
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#include <crypto/sha.h>
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#include "atmel-sha-regs.h"
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struct atmel_aes_dev;
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typedef int (*atmel_aes_authenc_fn_t)(struct atmel_aes_dev *, int, bool);
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struct atmel_sha_authenc_ctx;
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bool atmel_sha_authenc_is_ready(void);
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unsigned int atmel_sha_authenc_get_reqsize(void);
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struct atmel_sha_authenc_ctx *atmel_sha_authenc_spawn(unsigned long mode);
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void atmel_sha_authenc_free(struct atmel_sha_authenc_ctx *auth);
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int atmel_sha_authenc_setkey(struct atmel_sha_authenc_ctx *auth,
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const u8 *key, unsigned int keylen,
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u32 *flags);
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int atmel_sha_authenc_schedule(struct ahash_request *req,
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struct atmel_sha_authenc_ctx *auth,
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atmel_aes_authenc_fn_t cb,
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struct atmel_aes_dev *dd);
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int atmel_sha_authenc_init(struct ahash_request *req,
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struct scatterlist *assoc, unsigned int assoclen,
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unsigned int textlen,
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atmel_aes_authenc_fn_t cb,
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struct atmel_aes_dev *dd);
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int atmel_sha_authenc_final(struct ahash_request *req,
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u32 *digest, unsigned int digestlen,
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atmel_aes_authenc_fn_t cb,
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struct atmel_aes_dev *dd);
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void atmel_sha_authenc_abort(struct ahash_request *req);
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#endif /* CONFIG_CRYPTO_DEV_ATMEL_AUTHENC */
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#endif /* __ATMEL_AUTHENC_H__ */
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