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06282fd2c2
Implement the vgic-v2 save restore (mostly) as a direct translation of the assembly code version. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
85 lines
2.6 KiB
C
85 lines
2.6 KiB
C
/*
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* Copyright (C) 2012-2015 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/compiler.h>
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#include <linux/irqchip/arm-gic.h>
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#include <linux/kvm_host.h>
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#include <asm/kvm_mmu.h>
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#include "hyp.h"
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/* vcpu is already in the HYP VA space */
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void __hyp_text __vgic_v2_save_state(struct kvm_vcpu *vcpu)
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{
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struct kvm *kvm = kern_hyp_va(vcpu->kvm);
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struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
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struct vgic_dist *vgic = &kvm->arch.vgic;
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void __iomem *base = kern_hyp_va(vgic->vctrl_base);
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u32 eisr0, eisr1, elrsr0, elrsr1;
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int i, nr_lr;
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if (!base)
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return;
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nr_lr = vcpu->arch.vgic_cpu.nr_lr;
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cpu_if->vgic_vmcr = readl_relaxed(base + GICH_VMCR);
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cpu_if->vgic_misr = readl_relaxed(base + GICH_MISR);
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eisr0 = readl_relaxed(base + GICH_EISR0);
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elrsr0 = readl_relaxed(base + GICH_ELRSR0);
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if (unlikely(nr_lr > 32)) {
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eisr1 = readl_relaxed(base + GICH_EISR1);
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elrsr1 = readl_relaxed(base + GICH_ELRSR1);
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} else {
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eisr1 = elrsr1 = 0;
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}
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#ifdef CONFIG_CPU_BIG_ENDIAN
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cpu_if->vgic_eisr = ((u64)eisr0 << 32) | eisr1;
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cpu_if->vgic_elrsr = ((u64)elrsr0 << 32) | elrsr1;
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#else
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cpu_if->vgic_eisr = ((u64)eisr1 << 32) | eisr0;
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cpu_if->vgic_elrsr = ((u64)elrsr1 << 32) | elrsr0;
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#endif
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cpu_if->vgic_apr = readl_relaxed(base + GICH_APR);
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writel_relaxed(0, base + GICH_HCR);
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for (i = 0; i < nr_lr; i++)
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cpu_if->vgic_lr[i] = readl_relaxed(base + GICH_LR0 + (i * 4));
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}
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/* vcpu is already in the HYP VA space */
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void __hyp_text __vgic_v2_restore_state(struct kvm_vcpu *vcpu)
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{
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struct kvm *kvm = kern_hyp_va(vcpu->kvm);
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struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
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struct vgic_dist *vgic = &kvm->arch.vgic;
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void __iomem *base = kern_hyp_va(vgic->vctrl_base);
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int i, nr_lr;
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if (!base)
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return;
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writel_relaxed(cpu_if->vgic_hcr, base + GICH_HCR);
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writel_relaxed(cpu_if->vgic_vmcr, base + GICH_VMCR);
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writel_relaxed(cpu_if->vgic_apr, base + GICH_APR);
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nr_lr = vcpu->arch.vgic_cpu.nr_lr;
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for (i = 0; i < nr_lr; i++)
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writel_relaxed(cpu_if->vgic_lr[i], base + GICH_LR0 + (i * 4));
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}
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