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8bcd174116
The UltraSPARC T1 manual recommends this because the chip could instruction prefetch into the VA hole, and this would also make decoding certain kinds of memory access traps more difficult (because the chip sign extends certain pieces of trap state). Signed-off-by: David S. Miller <davem@davemloft.net>
154 lines
4.4 KiB
C
154 lines
4.4 KiB
C
/* $Id: page.h,v 1.39 2002/02/09 19:49:31 davem Exp $ */
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#ifndef _SPARC64_PAGE_H
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#define _SPARC64_PAGE_H
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#include <linux/config.h>
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#include <asm/const.h>
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#if defined(CONFIG_SPARC64_PAGE_SIZE_8KB)
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#define PAGE_SHIFT 13
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#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB)
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#define PAGE_SHIFT 16
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#elif defined(CONFIG_SPARC64_PAGE_SIZE_512KB)
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#define PAGE_SHIFT 19
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#elif defined(CONFIG_SPARC64_PAGE_SIZE_4MB)
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#define PAGE_SHIFT 22
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#else
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#error No page size specified in kernel configuration
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#endif
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#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
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#define PAGE_MASK (~(PAGE_SIZE-1))
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/* Flushing for D-cache alias handling is only needed if
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* the page size is smaller than 16K.
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*/
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#if PAGE_SHIFT < 14
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#define DCACHE_ALIASING_POSSIBLE
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#endif
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#ifdef __KERNEL__
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#ifndef __ASSEMBLY__
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extern void _clear_page(void *page);
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#define clear_page(X) _clear_page((void *)(X))
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struct page;
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extern void clear_user_page(void *addr, unsigned long vaddr, struct page *page);
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#define copy_page(X,Y) memcpy((void *)(X), (void *)(Y), PAGE_SIZE)
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extern void copy_user_page(void *to, void *from, unsigned long vaddr, struct page *topage);
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/* Unlike sparc32, sparc64's parameter passing API is more
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* sane in that structures which as small enough are passed
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* in registers instead of on the stack. Thus, setting
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* STRICT_MM_TYPECHECKS does not generate worse code so
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* let's enable it to get the type checking.
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*/
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#define STRICT_MM_TYPECHECKS
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#ifdef STRICT_MM_TYPECHECKS
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/* These are used to make use of C type-checking.. */
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typedef struct { unsigned long pte; } pte_t;
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typedef struct { unsigned long iopte; } iopte_t;
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typedef struct { unsigned int pmd; } pmd_t;
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typedef struct { unsigned int pgd; } pgd_t;
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typedef struct { unsigned long pgprot; } pgprot_t;
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#define pte_val(x) ((x).pte)
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#define iopte_val(x) ((x).iopte)
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#define pmd_val(x) ((x).pmd)
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#define pgd_val(x) ((x).pgd)
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#define pgprot_val(x) ((x).pgprot)
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#define __pte(x) ((pte_t) { (x) } )
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#define __iopte(x) ((iopte_t) { (x) } )
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#define __pmd(x) ((pmd_t) { (x) } )
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#define __pgd(x) ((pgd_t) { (x) } )
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#define __pgprot(x) ((pgprot_t) { (x) } )
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#else
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/* .. while these make it easier on the compiler */
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typedef unsigned long pte_t;
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typedef unsigned long iopte_t;
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typedef unsigned int pmd_t;
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typedef unsigned int pgd_t;
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typedef unsigned long pgprot_t;
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#define pte_val(x) (x)
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#define iopte_val(x) (x)
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#define pmd_val(x) (x)
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#define pgd_val(x) (x)
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#define pgprot_val(x) (x)
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#define __pte(x) (x)
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#define __iopte(x) (x)
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#define __pmd(x) (x)
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#define __pgd(x) (x)
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#define __pgprot(x) (x)
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#endif /* (STRICT_MM_TYPECHECKS) */
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#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
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#define HPAGE_SHIFT 22
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#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
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#define HPAGE_SHIFT 19
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#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
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#define HPAGE_SHIFT 16
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#endif
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#ifdef CONFIG_HUGETLB_PAGE
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#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)
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#define HPAGE_MASK (~(HPAGE_SIZE - 1UL))
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#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
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#define ARCH_HAS_SETCLEAR_HUGE_PTE
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#define ARCH_HAS_HUGETLB_PREFAULT_HOOK
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#endif
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#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_32BIT) ? \
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(_AC(0x0000000070000000,UL)) : \
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(_AC(0xfffff80000000000,UL) + (1UL << 32UL)))
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#endif /* !(__ASSEMBLY__) */
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/* to align the pointer to the (next) page boundary */
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#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
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/* We used to stick this into a hard-coded global register (%g4)
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* but that does not make sense anymore.
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*/
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#define PAGE_OFFSET _AC(0xFFFFF80000000000,UL)
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#ifndef __ASSEMBLY__
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#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET)
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#define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET))
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/* PFNs are real physical page numbers. However, mem_map only begins to record
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* per-page information starting at pfn_base. This is to handle systems where
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* the first physical page in the machine is at some huge physical address,
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* such as 4GB. This is common on a partitioned E10000, for example.
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*/
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extern struct page *pfn_to_page(unsigned long pfn);
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extern unsigned long page_to_pfn(struct page *);
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#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr)>>PAGE_SHIFT)
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#define pfn_valid(pfn) (((pfn)-(pfn_base)) < max_mapnr)
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#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
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#define virt_to_phys __pa
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#define phys_to_virt __va
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#endif /* !(__ASSEMBLY__) */
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#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
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VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
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#endif /* !(__KERNEL__) */
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#include <asm-generic/page.h>
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#endif /* !(_SPARC64_PAGE_H) */
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