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4ee7084eb1
This rearranges a bit of code, and adds support for 36-bit physical addressing for configs that use a hashed page table. The 36b physical support is not enabled by default on any config - it must be explicitly enabled via the config system. This patch *only* expands the page table code to accomodate large physical addresses on 32-bit systems and enables the PHYS_64BIT config option for 86xx. It does *not* allow you to boot a board with more than about 3.5GB of RAM - for that, SWIOTLB support is also required (and coming soon). Signed-off-by: Becky Bruce <becky.bruce@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
45 lines
1.1 KiB
C
45 lines
1.1 KiB
C
#ifndef _ASM_POWERPC_PAGE_32_H
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#define _ASM_POWERPC_PAGE_32_H
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#if defined(CONFIG_PHYSICAL_ALIGN) && (CONFIG_PHYSICAL_START != 0)
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#if (CONFIG_PHYSICAL_START % CONFIG_PHYSICAL_ALIGN) != 0
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#error "CONFIG_PHYSICAL_START must be a multiple of CONFIG_PHYSICAL_ALIGN"
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#endif
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#endif
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#define VM_DATA_DEFAULT_FLAGS VM_DATA_DEFAULT_FLAGS32
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#ifdef CONFIG_NOT_COHERENT_CACHE
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#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
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#endif
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#ifdef CONFIG_PTE_64BIT
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#define PTE_FLAGS_OFFSET 4 /* offset of PTE flags, in bytes */
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#else
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#define PTE_FLAGS_OFFSET 0
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#endif
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#ifndef __ASSEMBLY__
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/*
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* The basic type of a PTE - 64 bits for those CPUs with > 32 bit
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* physical addressing.
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*/
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#ifdef CONFIG_PTE_64BIT
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typedef unsigned long long pte_basic_t;
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#define PTE_SHIFT (PAGE_SHIFT - 3) /* 512 ptes per page */
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#else
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typedef unsigned long pte_basic_t;
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#define PTE_SHIFT (PAGE_SHIFT - 2) /* 1024 ptes per page */
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#endif
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struct page;
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extern void clear_pages(void *page, int order);
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static inline void clear_page(void *page) { clear_pages(page, 0); }
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extern void copy_page(void *to, void *from);
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#include <asm-generic/page.h>
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_POWERPC_PAGE_32_H */
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