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0d1ebba74f
Remove the bclk int from the private structure and pass it into the set_bclk function. Signed-off-by: Paul Handrigan <paulha@opensource.cirrus.com> Link: https://lore.kernel.org/r/20240710160416.2617173-2-paulha@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
224 lines
5.8 KiB
C
224 lines
5.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* CS530x CODEC driver internal data
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*
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* Copyright (C) 2023-2024 Cirrus Logic, Inc. and
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* Cirrus Logic International Semiconductor Ltd.
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*/
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#ifndef _CS530X_H
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#define _CS530X_H
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#include <linux/device.h>
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#include <linux/gpio/consumer.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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/* Devices */
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#define CS530X_2CH_ADC_DEV_ID 0x5302
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#define CS530X_4CH_ADC_DEV_ID 0x5304
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#define CS530X_8CH_ADC_DEV_ID 0x5308
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/* Registers */
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#define CS530X_DEVID 0x0000000
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#define CS530X_REVID 0x0000004
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#define CS530X_SW_RESET 0x0000022
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#define CS530X_CLK_CFG_0 0x0000040
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#define CS530X_CLK_CFG_1 0x0000042
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#define CS530X_CHIP_ENABLE 0x0000044
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#define CS530X_ASP_CFG 0x0000048
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#define CS530X_SIGNAL_PATH_CFG 0x0000050
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#define CS530X_IN_ENABLES 0x0000080
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#define CS530X_IN_RAMP_SUM 0x0000082
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#define CS530X_IN_FILTER 0x0000086
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#define CS530X_IN_HIZ 0x0000088
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#define CS530X_IN_INV 0x000008A
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#define CS530X_IN_VOL_CTRL1_0 0x0000090
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#define CS530X_IN_VOL_CTRL1_1 0x0000092
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#define CS530X_IN_VOL_CTRL2_0 0x0000094
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#define CS530X_IN_VOL_CTRL2_1 0x0000096
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#define CS530X_IN_VOL_CTRL3_0 0x0000098
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#define CS530X_IN_VOL_CTRL3_1 0x000009A
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#define CS530X_IN_VOL_CTRL4_0 0x000009C
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#define CS530X_IN_VOL_CTRL4_1 0x000009E
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#define CS530X_IN_VOL_CTRL5 0x00000A0
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#define CS530X_PAD_FN 0x0003D24
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#define CS530X_PAD_LVL 0x0003D28
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#define CS530X_MAX_REGISTER CS530X_PAD_LVL
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/* Register Fields */
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/* REVID */
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#define CS530X_MTLREVID GENMASK(3, 0)
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#define CS530X_AREVID GENMASK(7, 4)
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/* SW_RESET */
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#define CS530X_SW_RST_SHIFT 8
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#define CS530X_SW_RST_VAL (0x5A << CS530X_SW_RST_SHIFT)
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/* CLK_CFG_0 */
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#define CS530X_PLL_REFCLK_SRC_MASK BIT(0)
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#define CS530X_PLL_REFCLK_FREQ_MASK GENMASK(5, 4)
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#define CS530X_SYSCLK_SRC_MASK BIT(12)
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#define CS530X_SYSCLK_SRC_SHIFT 12
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#define CS530X_REFCLK_2P822_3P072 0
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#define CS530X_REFCLK_5P6448_6P144 0x10
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#define CS530X_REFCLK_11P2896_12P288 0x20
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#define CS530X_REFCLK_24P5792_24P576 0x30
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/* CLK_CFG_1 */
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#define CS530X_SAMPLE_RATE_MASK GENMASK(2, 0)
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#define CS530X_FS_32K 0
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#define CS530X_FS_48K_44P1K 1
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#define CS530X_FS_96K_88P2K 2
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#define CS530X_FS_192K_176P4K 3
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#define CS530X_FS_384K_356P8K 4
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#define CS530X_FS_768K_705P6K 5
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/* CHIP_ENABLE */
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#define CS530X_GLOBAL_EN BIT(0)
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/* ASP_CFG */
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#define CS530X_ASP_BCLK_FREQ_MASK GENMASK(1, 0)
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#define CS530X_ASP_PRIMARY BIT(5)
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#define CS530X_ASP_BCLK_INV BIT(6)
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#define CS530X_BCLK_2P822_3P072 0
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#define CS530X_BCLK_5P6448_6P144 1
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#define CS530X_BCLK_11P2896_12P288 2
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#define CS530X_BCLK_24P5792_24P576 3
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/* SIGNAL_PATH_CFG */
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#define CS530X_ASP_FMT_MASK GENMASK(2, 0)
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#define CS530X_ASP_TDM_SLOT_MASK GENMASK(5, 3)
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#define CS530X_ASP_TDM_SLOT_SHIFT 3
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#define CS530X_ASP_CH_REVERSE BIT(9)
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#define CS530X_TDM_EN_MASK BIT(2)
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#define CS530X_ASP_FMT_I2S 0
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#define CS530X_ASP_FMT_LJ 1
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#define CS530X_ASP_FMT_DSP_A 0x6
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/* TDM Slots */
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#define CS530X_0_1_TDM_SLOT_MASK GENMASK(1, 0)
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#define CS530X_0_3_TDM_SLOT_MASK GENMASK(3, 0)
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#define CS530X_0_7_TDM_SLOT_MASK GENMASK(7, 0)
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#define CS530X_0_7_TDM_SLOT_VAL 0
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#define CS530X_2_3_TDM_SLOT_MASK GENMASK(3, 2)
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#define CS530X_2_3_TDM_SLOT_VAL 1
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#define CS530X_4_5_TDM_SLOT_MASK GENMASK(5, 4)
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#define CS530X_4_7_TDM_SLOT_MASK GENMASK(7, 4)
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#define CS530X_4_7_TDM_SLOT_VAL 2
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#define CS530X_6_7_TDM_SLOT_MASK GENMASK(7, 6)
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#define CS530X_6_7_TDM_SLOT_VAL 3
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#define CS530X_8_9_TDM_SLOT_MASK GENMASK(9, 8)
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#define CS530X_8_11_TDM_SLOT_MASK GENMASK(11, 8)
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#define CS530X_8_15_TDM_SLOT_MASK GENMASK(15, 8)
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#define CS530X_8_15_TDM_SLOT_VAL 4
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#define CS530X_10_11_TDM_SLOT_MASK GENMASK(11, 10)
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#define CS530X_10_11_TDM_SLOT_VAL 5
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#define CS530X_12_13_TDM_SLOT_MASK GENMASK(13, 12)
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#define CS530X_12_15_TDM_SLOT_MASK GENMASK(15, 12)
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#define CS530X_12_15_TDM_SLOT_VAL 6
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#define CS530X_14_15_TDM_SLOT_MASK GENMASK(15, 14)
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#define CS530X_14_15_TDM_SLOT_VAL 7
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/* IN_RAMP_SUM */
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#define CS530X_RAMP_RATE_INC_SHIFT 0
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#define CS530X_RAMP_RATE_DEC_SHIFT 4
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#define CS530X_IN_SUM_MODE_SHIFT 13
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/* IN_FILTER */
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#define CS530X_IN_FILTER_SHIFT 8
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#define CS530X_IN_HPF_EN_SHIFT 12
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/* IN_HIZ */
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#define CS530X_IN12_HIZ BIT(0)
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#define CS530X_IN34_HIZ BIT(1)
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#define CS530X_IN56_HIZ BIT(2)
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#define CS530X_IN78_HIZ BIT(3)
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/* IN_INV */
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#define CS530X_IN1_INV_SHIFT 0
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#define CS530X_IN2_INV_SHIFT 1
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#define CS530X_IN3_INV_SHIFT 2
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#define CS530X_IN4_INV_SHIFT 3
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#define CS530X_IN5_INV_SHIFT 4
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#define CS530X_IN6_INV_SHIFT 5
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#define CS530X_IN7_INV_SHIFT 6
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#define CS530X_IN8_INV_SHIFT 7
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/* IN_VOL_CTLy_z */
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#define CS530X_IN_MUTE BIT(15)
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/* IN_VOL_CTL5 */
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#define CS530X_IN_VU BIT(0)
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/* PAD_FN */
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#define CS530X_DOUT2_FN BIT(0)
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#define CS530X_DOUT3_FN BIT(1)
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#define CS530X_DOUT4_FN BIT(2)
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#define CS530X_SPI_CS_FN BIT(3)
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#define CS530X_CONFIG2_FN BIT(6)
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#define CS530X_CONFIG3_FN BIT(7)
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#define CS530X_CONFIG4_FN BIT(8)
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#define CS530X_CONFIG5_FN BIT(9)
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/* PAD_LVL */
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#define CS530X_CONFIG2_LVL BIT(6)
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#define CS530X_CONFIG3_LVL BIT(7)
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#define CS530X_CONFIG4_LVL BIT(8)
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#define CS530X_CONFIG5_LVL BIT(9)
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/* System Clock Source */
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#define CS530X_SYSCLK_SRC_MCLK 0
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#define CS530X_SYSCLK_SRC_PLL 1
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/* PLL Reference Clock Source */
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#define CS530X_PLL_SRC_BCLK 0
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#define CS530X_PLL_SRC_MCLK 1
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#define CS530X_NUM_SUPPLIES 2
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enum cs530x_type {
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CS5302,
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CS5304,
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CS5308,
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};
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/* codec private data */
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struct cs530x_priv {
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struct regmap *regmap;
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struct device *dev;
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struct snd_soc_dai_driver *dev_dai;
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enum cs530x_type devtype;
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int num_adcs;
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int num_dacs;
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struct regulator_bulk_data supplies[CS530X_NUM_SUPPLIES];
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unsigned int mclk_rate;
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int tdm_width;
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int tdm_slots;
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int fs;
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int adc_pairs_count;
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struct gpio_desc *reset_gpio;
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};
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extern const struct regmap_config cs530x_regmap;
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int cs530x_probe(struct cs530x_priv *cs530x);
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#endif
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