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e177685628
Next generation of OSA adapters allows retrieval of further self-describing infos. This is the preparational infrastructure patch for further exploitation in the qeth driver. Signed-off-by: Ursula Braun <braunu@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
637 lines
17 KiB
C
637 lines
17 KiB
C
#ifndef _CIO_QDIO_H
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#define _CIO_QDIO_H
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#include <asm/page.h>
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#include "schid.h"
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#ifdef CONFIG_QDIO_DEBUG
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#define QDIO_VERBOSE_LEVEL 9
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#else /* CONFIG_QDIO_DEBUG */
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#define QDIO_VERBOSE_LEVEL 5
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#endif /* CONFIG_QDIO_DEBUG */
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#define QDIO_USE_PROCESSING_STATE
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#define QDIO_MINIMAL_BH_RELIEF_TIME 16
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#define QDIO_TIMER_POLL_VALUE 1
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#define IQDIO_TIMER_POLL_VALUE 1
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/*
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* unfortunately this can't be (QDIO_MAX_BUFFERS_PER_Q*4/3) or so -- as
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* we never know, whether we'll get initiative again, e.g. to give the
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* transmit skb's back to the stack, however the stack may be waiting for
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* them... therefore we define 4 as threshold to start polling (which
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* will stop as soon as the asynchronous queue catches up)
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* btw, this only applies to the asynchronous HiperSockets queue
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*/
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#define IQDIO_FILL_LEVEL_TO_POLL 4
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#define TIQDIO_THININT_ISC 3
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#define TIQDIO_DELAY_TARGET 0
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#define QDIO_BUSY_BIT_PATIENCE 100 /* in microsecs */
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#define QDIO_BUSY_BIT_GIVE_UP 10000000 /* 10 seconds */
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#define IQDIO_GLOBAL_LAPS 2 /* GLOBAL_LAPS are not used as we */
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#define IQDIO_GLOBAL_LAPS_INT 1 /* don't global summary */
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#define IQDIO_LOCAL_LAPS 4
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#define IQDIO_LOCAL_LAPS_INT 1
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#define IQDIO_GLOBAL_SUMMARY_CC_MASK 2
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/*#define IQDIO_IQDC_INT_PARM 0x1234*/
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#define QDIO_Q_LAPS 5
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#define QDIO_STORAGE_KEY PAGE_DEFAULT_KEY
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#define L2_CACHELINE_SIZE 256
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#define INDICATORS_PER_CACHELINE (L2_CACHELINE_SIZE/sizeof(__u32))
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#define QDIO_PERF "qdio_perf"
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/* must be a power of 2 */
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/*#define QDIO_STATS_NUMBER 4
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#define QDIO_STATS_CLASSES 2
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#define QDIO_STATS_COUNT_NEEDED 2*/
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#define QDIO_NO_USE_COUNT_TIMEOUT (1*HZ) /* wait for 1 sec on each q before
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exiting without having use_count
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of the queue to 0 */
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#define QDIO_ESTABLISH_TIMEOUT (1*HZ)
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#define QDIO_CLEANUP_CLEAR_TIMEOUT (20*HZ)
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#define QDIO_CLEANUP_HALT_TIMEOUT (10*HZ)
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#define QDIO_FORCE_CHECK_TIMEOUT (10*HZ)
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#define QDIO_ACTIVATE_TIMEOUT (5) /* 5 ms */
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enum qdio_irq_states {
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QDIO_IRQ_STATE_INACTIVE,
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QDIO_IRQ_STATE_ESTABLISHED,
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QDIO_IRQ_STATE_ACTIVE,
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QDIO_IRQ_STATE_STOPPED,
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QDIO_IRQ_STATE_CLEANUP,
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QDIO_IRQ_STATE_ERR,
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NR_QDIO_IRQ_STATES,
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};
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/* used as intparm in do_IO: */
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#define QDIO_DOING_SENSEID 0
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#define QDIO_DOING_ESTABLISH 1
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#define QDIO_DOING_ACTIVATE 2
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#define QDIO_DOING_CLEANUP 3
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/************************* DEBUG FACILITY STUFF *********************/
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#define QDIO_DBF_HEX(ex,name,level,addr,len) \
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do { \
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if (ex) \
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debug_exception(qdio_dbf_##name,level,(void*)(addr),len); \
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else \
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debug_event(qdio_dbf_##name,level,(void*)(addr),len); \
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} while (0)
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#define QDIO_DBF_TEXT(ex,name,level,text) \
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do { \
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if (ex) \
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debug_text_exception(qdio_dbf_##name,level,text); \
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else \
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debug_text_event(qdio_dbf_##name,level,text); \
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} while (0)
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#define QDIO_DBF_HEX0(ex,name,addr,len) QDIO_DBF_HEX(ex,name,0,addr,len)
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#define QDIO_DBF_HEX1(ex,name,addr,len) QDIO_DBF_HEX(ex,name,1,addr,len)
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#define QDIO_DBF_HEX2(ex,name,addr,len) QDIO_DBF_HEX(ex,name,2,addr,len)
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#ifdef CONFIG_QDIO_DEBUG
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#define QDIO_DBF_HEX3(ex,name,addr,len) QDIO_DBF_HEX(ex,name,3,addr,len)
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#define QDIO_DBF_HEX4(ex,name,addr,len) QDIO_DBF_HEX(ex,name,4,addr,len)
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#define QDIO_DBF_HEX5(ex,name,addr,len) QDIO_DBF_HEX(ex,name,5,addr,len)
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#define QDIO_DBF_HEX6(ex,name,addr,len) QDIO_DBF_HEX(ex,name,6,addr,len)
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#else /* CONFIG_QDIO_DEBUG */
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#define QDIO_DBF_HEX3(ex,name,addr,len) do {} while (0)
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#define QDIO_DBF_HEX4(ex,name,addr,len) do {} while (0)
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#define QDIO_DBF_HEX5(ex,name,addr,len) do {} while (0)
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#define QDIO_DBF_HEX6(ex,name,addr,len) do {} while (0)
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#endif /* CONFIG_QDIO_DEBUG */
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#define QDIO_DBF_TEXT0(ex,name,text) QDIO_DBF_TEXT(ex,name,0,text)
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#define QDIO_DBF_TEXT1(ex,name,text) QDIO_DBF_TEXT(ex,name,1,text)
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#define QDIO_DBF_TEXT2(ex,name,text) QDIO_DBF_TEXT(ex,name,2,text)
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#ifdef CONFIG_QDIO_DEBUG
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#define QDIO_DBF_TEXT3(ex,name,text) QDIO_DBF_TEXT(ex,name,3,text)
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#define QDIO_DBF_TEXT4(ex,name,text) QDIO_DBF_TEXT(ex,name,4,text)
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#define QDIO_DBF_TEXT5(ex,name,text) QDIO_DBF_TEXT(ex,name,5,text)
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#define QDIO_DBF_TEXT6(ex,name,text) QDIO_DBF_TEXT(ex,name,6,text)
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#else /* CONFIG_QDIO_DEBUG */
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#define QDIO_DBF_TEXT3(ex,name,text) do {} while (0)
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#define QDIO_DBF_TEXT4(ex,name,text) do {} while (0)
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#define QDIO_DBF_TEXT5(ex,name,text) do {} while (0)
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#define QDIO_DBF_TEXT6(ex,name,text) do {} while (0)
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#endif /* CONFIG_QDIO_DEBUG */
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#define QDIO_DBF_SETUP_NAME "qdio_setup"
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#define QDIO_DBF_SETUP_LEN 8
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#define QDIO_DBF_SETUP_PAGES 4
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#define QDIO_DBF_SETUP_NR_AREAS 1
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#ifdef CONFIG_QDIO_DEBUG
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#define QDIO_DBF_SETUP_LEVEL 6
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#else /* CONFIG_QDIO_DEBUG */
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#define QDIO_DBF_SETUP_LEVEL 2
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#endif /* CONFIG_QDIO_DEBUG */
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#define QDIO_DBF_SBAL_NAME "qdio_labs" /* sbal */
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#define QDIO_DBF_SBAL_LEN 256
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#define QDIO_DBF_SBAL_PAGES 4
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#define QDIO_DBF_SBAL_NR_AREAS 2
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#ifdef CONFIG_QDIO_DEBUG
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#define QDIO_DBF_SBAL_LEVEL 6
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#else /* CONFIG_QDIO_DEBUG */
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#define QDIO_DBF_SBAL_LEVEL 2
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#endif /* CONFIG_QDIO_DEBUG */
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#define QDIO_DBF_TRACE_NAME "qdio_trace"
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#define QDIO_DBF_TRACE_LEN 8
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#define QDIO_DBF_TRACE_NR_AREAS 2
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#ifdef CONFIG_QDIO_DEBUG
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#define QDIO_DBF_TRACE_PAGES 16
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#define QDIO_DBF_TRACE_LEVEL 4 /* -------- could be even more verbose here */
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#else /* CONFIG_QDIO_DEBUG */
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#define QDIO_DBF_TRACE_PAGES 4
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#define QDIO_DBF_TRACE_LEVEL 2
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#endif /* CONFIG_QDIO_DEBUG */
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#define QDIO_DBF_SENSE_NAME "qdio_sense"
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#define QDIO_DBF_SENSE_LEN 64
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#define QDIO_DBF_SENSE_PAGES 2
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#define QDIO_DBF_SENSE_NR_AREAS 1
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#ifdef CONFIG_QDIO_DEBUG
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#define QDIO_DBF_SENSE_LEVEL 6
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#else /* CONFIG_QDIO_DEBUG */
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#define QDIO_DBF_SENSE_LEVEL 2
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#endif /* CONFIG_QDIO_DEBUG */
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#ifdef CONFIG_QDIO_DEBUG
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#define QDIO_TRACE_QTYPE QDIO_ZFCP_QFMT
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#define QDIO_DBF_SLSB_OUT_NAME "qdio_slsb_out"
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#define QDIO_DBF_SLSB_OUT_LEN QDIO_MAX_BUFFERS_PER_Q
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#define QDIO_DBF_SLSB_OUT_PAGES 256
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#define QDIO_DBF_SLSB_OUT_NR_AREAS 1
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#define QDIO_DBF_SLSB_OUT_LEVEL 6
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#define QDIO_DBF_SLSB_IN_NAME "qdio_slsb_in"
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#define QDIO_DBF_SLSB_IN_LEN QDIO_MAX_BUFFERS_PER_Q
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#define QDIO_DBF_SLSB_IN_PAGES 256
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#define QDIO_DBF_SLSB_IN_NR_AREAS 1
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#define QDIO_DBF_SLSB_IN_LEVEL 6
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#endif /* CONFIG_QDIO_DEBUG */
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#define QDIO_PRINTK_HEADER QDIO_NAME ": "
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#if QDIO_VERBOSE_LEVEL>8
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#define QDIO_PRINT_STUPID(x...) printk( KERN_DEBUG QDIO_PRINTK_HEADER x)
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#else
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#define QDIO_PRINT_STUPID(x...) do { } while (0)
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#endif
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#if QDIO_VERBOSE_LEVEL>7
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#define QDIO_PRINT_ALL(x...) printk( QDIO_PRINTK_HEADER x)
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#else
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#define QDIO_PRINT_ALL(x...) do { } while (0)
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#endif
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#if QDIO_VERBOSE_LEVEL>6
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#define QDIO_PRINT_INFO(x...) printk( QDIO_PRINTK_HEADER x)
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#else
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#define QDIO_PRINT_INFO(x...) do { } while (0)
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#endif
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#if QDIO_VERBOSE_LEVEL>5
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#define QDIO_PRINT_WARN(x...) printk( QDIO_PRINTK_HEADER x)
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#else
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#define QDIO_PRINT_WARN(x...) do { } while (0)
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#endif
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#if QDIO_VERBOSE_LEVEL>4
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#define QDIO_PRINT_ERR(x...) printk( QDIO_PRINTK_HEADER x)
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#else
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#define QDIO_PRINT_ERR(x...) do { } while (0)
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#endif
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#if QDIO_VERBOSE_LEVEL>3
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#define QDIO_PRINT_CRIT(x...) printk( QDIO_PRINTK_HEADER x)
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#else
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#define QDIO_PRINT_CRIT(x...) do { } while (0)
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#endif
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#if QDIO_VERBOSE_LEVEL>2
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#define QDIO_PRINT_ALERT(x...) printk( QDIO_PRINTK_HEADER x)
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#else
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#define QDIO_PRINT_ALERT(x...) do { } while (0)
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#endif
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#if QDIO_VERBOSE_LEVEL>1
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#define QDIO_PRINT_EMERG(x...) printk( QDIO_PRINTK_HEADER x)
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#else
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#define QDIO_PRINT_EMERG(x...) do { } while (0)
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#endif
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#define QDIO_HEXDUMP16(importance,header,ptr) \
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QDIO_PRINT_##importance(header "%02x %02x %02x %02x " \
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"%02x %02x %02x %02x %02x %02x %02x %02x " \
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"%02x %02x %02x %02x\n",*(((char*)ptr)), \
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*(((char*)ptr)+1),*(((char*)ptr)+2), \
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*(((char*)ptr)+3),*(((char*)ptr)+4), \
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*(((char*)ptr)+5),*(((char*)ptr)+6), \
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*(((char*)ptr)+7),*(((char*)ptr)+8), \
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*(((char*)ptr)+9),*(((char*)ptr)+10), \
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*(((char*)ptr)+11),*(((char*)ptr)+12), \
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*(((char*)ptr)+13),*(((char*)ptr)+14), \
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*(((char*)ptr)+15)); \
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QDIO_PRINT_##importance(header "%02x %02x %02x %02x %02x %02x %02x %02x " \
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"%02x %02x %02x %02x %02x %02x %02x %02x\n", \
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*(((char*)ptr)+16),*(((char*)ptr)+17), \
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*(((char*)ptr)+18),*(((char*)ptr)+19), \
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*(((char*)ptr)+20),*(((char*)ptr)+21), \
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*(((char*)ptr)+22),*(((char*)ptr)+23), \
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*(((char*)ptr)+24),*(((char*)ptr)+25), \
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*(((char*)ptr)+26),*(((char*)ptr)+27), \
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*(((char*)ptr)+28),*(((char*)ptr)+29), \
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*(((char*)ptr)+30),*(((char*)ptr)+31));
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/****************** END OF DEBUG FACILITY STUFF *********************/
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/*
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* Some instructions as assembly
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*/
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static inline int
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do_sqbs(unsigned long sch, unsigned char state, int queue,
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unsigned int *start, unsigned int *count)
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{
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#ifdef CONFIG_64BIT
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register unsigned long _ccq asm ("0") = *count;
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register unsigned long _sch asm ("1") = sch;
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unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
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asm volatile(
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" .insn rsy,0xeb000000008A,%1,0,0(%2)"
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: "+d" (_ccq), "+d" (_queuestart)
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: "d" ((unsigned long)state), "d" (_sch)
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: "memory", "cc");
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*count = _ccq & 0xff;
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*start = _queuestart & 0xff;
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return (_ccq >> 32) & 0xff;
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#else
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return 0;
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#endif
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}
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static inline int
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do_eqbs(unsigned long sch, unsigned char *state, int queue,
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unsigned int *start, unsigned int *count)
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{
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#ifdef CONFIG_64BIT
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register unsigned long _ccq asm ("0") = *count;
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register unsigned long _sch asm ("1") = sch;
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unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
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unsigned long _state = 0;
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asm volatile(
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" .insn rrf,0xB99c0000,%1,%2,0,0"
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: "+d" (_ccq), "+d" (_queuestart), "+d" (_state)
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: "d" (_sch)
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: "memory", "cc" );
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*count = _ccq & 0xff;
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*start = _queuestart & 0xff;
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*state = _state & 0xff;
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return (_ccq >> 32) & 0xff;
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#else
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return 0;
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#endif
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}
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static inline int
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do_siga_sync(struct subchannel_id schid, unsigned int mask1, unsigned int mask2)
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{
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register unsigned long reg0 asm ("0") = 2;
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register struct subchannel_id reg1 asm ("1") = schid;
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register unsigned long reg2 asm ("2") = mask1;
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register unsigned long reg3 asm ("3") = mask2;
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int cc;
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asm volatile(
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" siga 0\n"
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" ipm %0\n"
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" srl %0,28\n"
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: "=d" (cc)
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: "d" (reg0), "d" (reg1), "d" (reg2), "d" (reg3) : "cc");
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return cc;
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}
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static inline int
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do_siga_input(struct subchannel_id schid, unsigned int mask)
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{
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register unsigned long reg0 asm ("0") = 1;
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register struct subchannel_id reg1 asm ("1") = schid;
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register unsigned long reg2 asm ("2") = mask;
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int cc;
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asm volatile(
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" siga 0\n"
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" ipm %0\n"
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" srl %0,28\n"
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: "=d" (cc)
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: "d" (reg0), "d" (reg1), "d" (reg2) : "cc", "memory");
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return cc;
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}
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static inline int
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do_siga_output(unsigned long schid, unsigned long mask, __u32 *bb,
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unsigned int fc)
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{
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register unsigned long __fc asm("0") = fc;
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register unsigned long __schid asm("1") = schid;
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register unsigned long __mask asm("2") = mask;
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int cc;
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asm volatile(
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" siga 0\n"
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"0: ipm %0\n"
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" srl %0,28\n"
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"1:\n"
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EX_TABLE(0b,1b)
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: "=d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask)
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: "0" (QDIO_SIGA_ERROR_ACCESS_EXCEPTION)
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: "cc", "memory");
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(*bb) = ((unsigned int) __fc) >> 31;
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return cc;
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}
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static inline unsigned long
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do_clear_global_summary(void)
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{
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register unsigned long __fn asm("1") = 3;
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register unsigned long __tmp asm("2");
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register unsigned long __time asm("3");
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asm volatile(
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" .insn rre,0xb2650000,2,0"
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: "+d" (__fn), "=d" (__tmp), "=d" (__time));
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return __time;
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}
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/*
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* QDIO device commands returned by extended Sense-ID
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*/
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#define DEFAULT_ESTABLISH_QS_CMD 0x1b
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#define DEFAULT_ESTABLISH_QS_COUNT 0x1000
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#define DEFAULT_ACTIVATE_QS_CMD 0x1f
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#define DEFAULT_ACTIVATE_QS_COUNT 0
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/*
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* additional CIWs returned by extended Sense-ID
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*/
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#define CIW_TYPE_EQUEUE 0x3 /* establish QDIO queues */
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#define CIW_TYPE_AQUEUE 0x4 /* activate QDIO queues */
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#define QDIO_CHSC_RESPONSE_CODE_OK 1
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/* flags for st qdio sch data */
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#define CHSC_FLAG_QDIO_CAPABILITY 0x80
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#define CHSC_FLAG_VALIDITY 0x40
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#define CHSC_FLAG_SIGA_INPUT_NECESSARY 0x40
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#define CHSC_FLAG_SIGA_OUTPUT_NECESSARY 0x20
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#define CHSC_FLAG_SIGA_SYNC_NECESSARY 0x10
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#define CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS 0x08
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#define CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS 0x04
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struct qdio_chsc_ssqd {
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struct chsc_header request;
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u16 reserved1:10;
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|
u16 ssid:2;
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|
u16 fmt:4;
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|
u16 first_sch;
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|
u16 reserved2;
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|
u16 last_sch;
|
|
u32 reserved3;
|
|
struct chsc_header response;
|
|
u32 reserved4;
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|
u8 flags;
|
|
u8 reserved5;
|
|
u16 sch;
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|
u8 qfmt;
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|
u8 parm;
|
|
u8 qdioac1;
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|
u8 sch_class;
|
|
u8 pct;
|
|
u8 icnt;
|
|
u8 reserved7;
|
|
u8 ocnt;
|
|
u8 reserved8;
|
|
u8 mbccnt;
|
|
u16 qdioac2;
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|
u64 sch_token;
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|
};
|
|
|
|
struct qdio_perf_stats {
|
|
#ifdef CONFIG_64BIT
|
|
atomic64_t tl_runs;
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atomic64_t outbound_tl_runs;
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|
atomic64_t outbound_tl_runs_resched;
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|
atomic64_t inbound_tl_runs;
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|
atomic64_t inbound_tl_runs_resched;
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|
atomic64_t inbound_thin_tl_runs;
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|
atomic64_t inbound_thin_tl_runs_resched;
|
|
|
|
atomic64_t siga_outs;
|
|
atomic64_t siga_ins;
|
|
atomic64_t siga_syncs;
|
|
atomic64_t pcis;
|
|
atomic64_t thinints;
|
|
atomic64_t fast_reqs;
|
|
|
|
atomic64_t outbound_cnt;
|
|
atomic64_t inbound_cnt;
|
|
#else /* CONFIG_64BIT */
|
|
atomic_t tl_runs;
|
|
atomic_t outbound_tl_runs;
|
|
atomic_t outbound_tl_runs_resched;
|
|
atomic_t inbound_tl_runs;
|
|
atomic_t inbound_tl_runs_resched;
|
|
atomic_t inbound_thin_tl_runs;
|
|
atomic_t inbound_thin_tl_runs_resched;
|
|
|
|
atomic_t siga_outs;
|
|
atomic_t siga_ins;
|
|
atomic_t siga_syncs;
|
|
atomic_t pcis;
|
|
atomic_t thinints;
|
|
atomic_t fast_reqs;
|
|
|
|
atomic_t outbound_cnt;
|
|
atomic_t inbound_cnt;
|
|
#endif /* CONFIG_64BIT */
|
|
};
|
|
|
|
/* unlikely as the later the better */
|
|
#define SYNC_MEMORY if (unlikely(q->siga_sync)) qdio_siga_sync_q(q)
|
|
#define SYNC_MEMORY_ALL if (unlikely(q->siga_sync)) \
|
|
qdio_siga_sync(q,~0U,~0U)
|
|
#define SYNC_MEMORY_ALL_OUTB if (unlikely(q->siga_sync)) \
|
|
qdio_siga_sync(q,~0U,0)
|
|
|
|
#define NOW qdio_get_micros()
|
|
#define SAVE_TIMESTAMP(q) q->timing.last_transfer_time=NOW
|
|
#define GET_SAVED_TIMESTAMP(q) (q->timing.last_transfer_time)
|
|
#define SAVE_FRONTIER(q,val) q->last_move_ftc=val
|
|
#define GET_SAVED_FRONTIER(q) (q->last_move_ftc)
|
|
|
|
#define MY_MODULE_STRING(x) #x
|
|
|
|
#ifdef CONFIG_64BIT
|
|
#define QDIO_GET_ADDR(x) ((__u32)(unsigned long)x)
|
|
#else /* CONFIG_64BIT */
|
|
#define QDIO_GET_ADDR(x) ((__u32)(long)x)
|
|
#endif /* CONFIG_64BIT */
|
|
|
|
struct qdio_q {
|
|
volatile struct slsb slsb;
|
|
|
|
char unused[QDIO_MAX_BUFFERS_PER_Q];
|
|
|
|
__u32 * dev_st_chg_ind;
|
|
|
|
int is_input_q;
|
|
struct subchannel_id schid;
|
|
struct ccw_device *cdev;
|
|
|
|
unsigned int is_iqdio_q;
|
|
unsigned int is_thinint_q;
|
|
|
|
/* bit 0 means queue 0, bit 1 means queue 1, ... */
|
|
unsigned int mask;
|
|
unsigned int q_no;
|
|
|
|
qdio_handler_t (*handler);
|
|
|
|
/* points to the next buffer to be checked for having
|
|
* been processed by the card (outbound)
|
|
* or to the next buffer the program should check for (inbound) */
|
|
volatile int first_to_check;
|
|
/* and the last time it was: */
|
|
volatile int last_move_ftc;
|
|
|
|
atomic_t number_of_buffers_used;
|
|
atomic_t polling;
|
|
|
|
unsigned int siga_in;
|
|
unsigned int siga_out;
|
|
unsigned int siga_sync;
|
|
unsigned int siga_sync_done_on_thinints;
|
|
unsigned int siga_sync_done_on_outb_tis;
|
|
unsigned int hydra_gives_outbound_pcis;
|
|
|
|
/* used to save beginning position when calling dd_handlers */
|
|
int first_element_to_kick;
|
|
|
|
atomic_t use_count;
|
|
atomic_t is_in_shutdown;
|
|
|
|
void *irq_ptr;
|
|
|
|
struct timer_list timer;
|
|
#ifdef QDIO_USE_TIMERS_FOR_POLLING
|
|
atomic_t timer_already_set;
|
|
spinlock_t timer_lock;
|
|
#else /* QDIO_USE_TIMERS_FOR_POLLING */
|
|
struct tasklet_struct tasklet;
|
|
#endif /* QDIO_USE_TIMERS_FOR_POLLING */
|
|
|
|
|
|
enum qdio_irq_states state;
|
|
|
|
/* used to store the error condition during a data transfer */
|
|
unsigned int qdio_error;
|
|
unsigned int siga_error;
|
|
unsigned int error_status_flags;
|
|
|
|
/* list of interesting queues */
|
|
volatile struct qdio_q *list_next;
|
|
volatile struct qdio_q *list_prev;
|
|
|
|
struct sl *sl;
|
|
volatile struct sbal *sbal[QDIO_MAX_BUFFERS_PER_Q];
|
|
|
|
struct qdio_buffer *qdio_buffers[QDIO_MAX_BUFFERS_PER_Q];
|
|
|
|
unsigned long int_parm;
|
|
|
|
/*struct {
|
|
int in_bh_check_limit;
|
|
int threshold;
|
|
} threshold_classes[QDIO_STATS_CLASSES];*/
|
|
|
|
struct {
|
|
/* inbound: the time to stop polling
|
|
outbound: the time to kick peer */
|
|
int threshold; /* the real value */
|
|
|
|
/* outbound: last time of do_QDIO
|
|
inbound: last time of noticing incoming data */
|
|
/*__u64 last_transfer_times[QDIO_STATS_NUMBER];
|
|
int last_transfer_index; */
|
|
|
|
__u64 last_transfer_time;
|
|
__u64 busy_start;
|
|
} timing;
|
|
atomic_t busy_siga_counter;
|
|
unsigned int queue_type;
|
|
unsigned int is_pci_out;
|
|
|
|
/* leave this member at the end. won't be cleared in qdio_fill_qs */
|
|
struct slib *slib; /* a page is allocated under this pointer,
|
|
sl points into this page, offset PAGE_SIZE/2
|
|
(after slib) */
|
|
} __attribute__ ((aligned(256)));
|
|
|
|
struct qdio_irq {
|
|
__u32 * volatile dev_st_chg_ind;
|
|
|
|
unsigned long int_parm;
|
|
struct subchannel_id schid;
|
|
|
|
unsigned int is_iqdio_irq;
|
|
unsigned int is_thinint_irq;
|
|
unsigned int hydra_gives_outbound_pcis;
|
|
unsigned int sync_done_on_outb_pcis;
|
|
|
|
/* QEBSM facility */
|
|
unsigned int is_qebsm;
|
|
unsigned long sch_token;
|
|
|
|
enum qdio_irq_states state;
|
|
|
|
unsigned int no_input_qs;
|
|
unsigned int no_output_qs;
|
|
|
|
unsigned char qdioac;
|
|
|
|
struct ccw1 ccw;
|
|
|
|
struct ciw equeue;
|
|
struct ciw aqueue;
|
|
|
|
struct qib qib;
|
|
|
|
void (*original_int_handler) (struct ccw_device *,
|
|
unsigned long, struct irb *);
|
|
|
|
/* leave these four members together at the end. won't be cleared in qdio_fill_irq */
|
|
struct qdr *qdr;
|
|
struct qdio_q *input_qs[QDIO_MAX_QUEUES_PER_IRQ];
|
|
struct qdio_q *output_qs[QDIO_MAX_QUEUES_PER_IRQ];
|
|
struct semaphore setting_up_sema;
|
|
};
|
|
#endif
|