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If the new value written to the PLL_CTL or VR_CTL register is the same as the previous value, the PLL wake-up will occur immediately (PLL is already locked), but the core and system clock will be bypassed for the PLL_LOCKCNT duration. For this interval, code will execute at the CLKIN rate instead of at the expected CCLK rate. Software should guard against this condition by comparing the current value to the new value before writing the new value. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2751 lines
165 KiB
C
2751 lines
165 KiB
C
/*
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* File: include/asm-blackfin/mach-bf548/cdefBF54x_base.h
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* Based on:
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* Author:
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*
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* Created:
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* Description:
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*
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* Rev:
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*
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* Modified:
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING.
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* If not, write to the Free Software Foundation,
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef _CDEF_BF54X_H
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#define _CDEF_BF54X_H
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#include <asm/blackfin.h>
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#include "defBF54x_base.h"
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#include <asm/system.h>
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/* ************************************************************** */
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/* SYSTEM & MMR ADDRESS DEFINITIONS COMMON TO ALL ADSP-BF54x */
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/* ************************************************************** */
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/* PLL Registers */
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#define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
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/* Writing to PLL_CTL initiates a PLL relock sequence. */
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static __inline__ void bfin_write_PLL_CTL(unsigned int val)
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{
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unsigned long flags, iwr0, iwr1, iwr2;
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if (val == bfin_read_PLL_CTL())
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return;
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local_irq_save(flags);
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/* Enable the PLL Wakeup bit in SIC IWR */
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iwr0 = bfin_read32(SIC_IWR0);
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iwr1 = bfin_read32(SIC_IWR1);
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iwr2 = bfin_read32(SIC_IWR2);
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/* Only allow PPL Wakeup) */
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bfin_write32(SIC_IWR0, IWR_ENABLE(0));
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bfin_write32(SIC_IWR1, 0);
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bfin_write32(SIC_IWR2, 0);
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bfin_write16(PLL_CTL, val);
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SSYNC();
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asm("IDLE;");
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bfin_write32(SIC_IWR0, iwr0);
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bfin_write32(SIC_IWR1, iwr1);
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bfin_write32(SIC_IWR2, iwr2);
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local_irq_restore(flags);
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}
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#define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)
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#define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV, val)
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#define bfin_read_VR_CTL() bfin_read16(VR_CTL)
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/* Writing to VR_CTL initiates a PLL relock sequence. */
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static __inline__ void bfin_write_VR_CTL(unsigned int val)
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{
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unsigned long flags, iwr0, iwr1, iwr2;
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if (val == bfin_read_VR_CTL())
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return;
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local_irq_save(flags);
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/* Enable the PLL Wakeup bit in SIC IWR */
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iwr0 = bfin_read32(SIC_IWR0);
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iwr1 = bfin_read32(SIC_IWR1);
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iwr2 = bfin_read32(SIC_IWR2);
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/* Only allow PPL Wakeup) */
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bfin_write32(SIC_IWR0, IWR_ENABLE(0));
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bfin_write32(SIC_IWR1, 0);
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bfin_write32(SIC_IWR2, 0);
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bfin_write16(VR_CTL, val);
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SSYNC();
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asm("IDLE;");
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bfin_write32(SIC_IWR0, iwr0);
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bfin_write32(SIC_IWR1, iwr1);
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bfin_write32(SIC_IWR2, iwr2);
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local_irq_restore(flags);
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}
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#define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
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#define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT, val)
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#define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)
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#define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT, val)
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/* Debug/MP/Emulation Registers (0xFFC00014 - 0xFFC00014) */
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#define bfin_read_CHIPID() bfin_read32(CHIPID)
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#define bfin_write_CHIPID(val) bfin_write32(CHIPID, val)
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/* System Reset and Interrubfin_read_()t Controller (0xFFC00100 - 0xFFC00104) */
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#define bfin_read_SWRST() bfin_read16(SWRST)
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#define bfin_write_SWRST(val) bfin_write16(SWRST, val)
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#define bfin_read_SYSCR() bfin_read16(SYSCR)
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#define bfin_write_SYSCR(val) bfin_write16(SYSCR, val)
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/* SIC Registers */
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#define bfin_read_SIC_IMASK0() bfin_read32(SIC_IMASK0)
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#define bfin_write_SIC_IMASK0(val) bfin_write32(SIC_IMASK0, val)
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#define bfin_read_SIC_IMASK1() bfin_read32(SIC_IMASK1)
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#define bfin_write_SIC_IMASK1(val) bfin_write32(SIC_IMASK1, val)
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#define bfin_read_SIC_IMASK2() bfin_read32(SIC_IMASK2)
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#define bfin_write_SIC_IMASK2(val) bfin_write32(SIC_IMASK2, val)
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#define bfin_read_SIC_IMASK(x) bfin_read32(SIC_IMASK0 + (x << 2))
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#define bfin_write_SIC_IMASK(x, val) bfin_write32((SIC_IMASK0 + (x << 2)), val)
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#define bfin_read_SIC_ISR0() bfin_read32(SIC_ISR0)
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#define bfin_write_SIC_ISR0(val) bfin_write32(SIC_ISR0, val)
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#define bfin_read_SIC_ISR1() bfin_read32(SIC_ISR1)
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#define bfin_write_SIC_ISR1(val) bfin_write32(SIC_ISR1, val)
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#define bfin_read_SIC_ISR2() bfin_read32(SIC_ISR2)
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#define bfin_write_SIC_ISR2(val) bfin_write32(SIC_ISR2, val)
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#define bfin_read_SIC_ISR(x) bfin_read32(SIC_ISR0 + (x << 2))
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#define bfin_write_SIC_ISR(x, val) bfin_write32((SIC_ISR0 + (x << 2)), val)
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#define bfin_read_SIC_IWR0() bfin_read32(SIC_IWR0)
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#define bfin_write_SIC_IWR0(val) bfin_write32(SIC_IWR0, val)
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#define bfin_read_SIC_IWR1() bfin_read32(SIC_IWR1)
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#define bfin_write_SIC_IWR1(val) bfin_write32(SIC_IWR1, val)
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#define bfin_read_SIC_IWR2() bfin_read32(SIC_IWR2)
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#define bfin_write_SIC_IWR2(val) bfin_write32(SIC_IWR2, val)
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#define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0)
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#define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0, val)
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#define bfin_read_SIC_IAR1() bfin_read32(SIC_IAR1)
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#define bfin_write_SIC_IAR1(val) bfin_write32(SIC_IAR1, val)
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#define bfin_read_SIC_IAR2() bfin_read32(SIC_IAR2)
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#define bfin_write_SIC_IAR2(val) bfin_write32(SIC_IAR2, val)
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#define bfin_read_SIC_IAR3() bfin_read32(SIC_IAR3)
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#define bfin_write_SIC_IAR3(val) bfin_write32(SIC_IAR3, val)
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#define bfin_read_SIC_IAR4() bfin_read32(SIC_IAR4)
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#define bfin_write_SIC_IAR4(val) bfin_write32(SIC_IAR4, val)
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#define bfin_read_SIC_IAR5() bfin_read32(SIC_IAR5)
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#define bfin_write_SIC_IAR5(val) bfin_write32(SIC_IAR5, val)
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#define bfin_read_SIC_IAR6() bfin_read32(SIC_IAR6)
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#define bfin_write_SIC_IAR6(val) bfin_write32(SIC_IAR6, val)
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#define bfin_read_SIC_IAR7() bfin_read32(SIC_IAR7)
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#define bfin_write_SIC_IAR7(val) bfin_write32(SIC_IAR7, val)
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#define bfin_read_SIC_IAR8() bfin_read32(SIC_IAR8)
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#define bfin_write_SIC_IAR8(val) bfin_write32(SIC_IAR8, val)
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#define bfin_read_SIC_IAR9() bfin_read32(SIC_IAR9)
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#define bfin_write_SIC_IAR9(val) bfin_write32(SIC_IAR9, val)
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#define bfin_read_SIC_IAR10() bfin_read32(SIC_IAR10)
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#define bfin_write_SIC_IAR10(val) bfin_write32(SIC_IAR10, val)
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#define bfin_read_SIC_IAR11() bfin_read32(SIC_IAR11)
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#define bfin_write_SIC_IAR11(val) bfin_write32(SIC_IAR11, val)
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/* Watchdog Timer Registers */
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#define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)
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#define bfin_write_WDOG_CTL(val) bfin_write16(WDOG_CTL, val)
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#define bfin_read_WDOG_CNT() bfin_read32(WDOG_CNT)
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#define bfin_write_WDOG_CNT(val) bfin_write32(WDOG_CNT, val)
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#define bfin_read_WDOG_STAT() bfin_read32(WDOG_STAT)
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#define bfin_write_WDOG_STAT(val) bfin_write32(WDOG_STAT, val)
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/* RTC Registers */
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#define bfin_read_RTC_STAT() bfin_read32(RTC_STAT)
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#define bfin_write_RTC_STAT(val) bfin_write32(RTC_STAT, val)
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#define bfin_read_RTC_ICTL() bfin_read16(RTC_ICTL)
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#define bfin_write_RTC_ICTL(val) bfin_write16(RTC_ICTL, val)
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#define bfin_read_RTC_ISTAT() bfin_read16(RTC_ISTAT)
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#define bfin_write_RTC_ISTAT(val) bfin_write16(RTC_ISTAT, val)
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#define bfin_read_RTC_SWCNT() bfin_read16(RTC_SWCNT)
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#define bfin_write_RTC_SWCNT(val) bfin_write16(RTC_SWCNT, val)
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#define bfin_read_RTC_ALARM() bfin_read32(RTC_ALARM)
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#define bfin_write_RTC_ALARM(val) bfin_write32(RTC_ALARM, val)
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#define bfin_read_RTC_PREN() bfin_read16(RTC_PREN)
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#define bfin_write_RTC_PREN(val) bfin_write16(RTC_PREN, val)
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/* UART0 Registers */
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#define bfin_read_UART0_DLL() bfin_read16(UART0_DLL)
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#define bfin_write_UART0_DLL(val) bfin_write16(UART0_DLL, val)
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#define bfin_read_UART0_DLH() bfin_read16(UART0_DLH)
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#define bfin_write_UART0_DLH(val) bfin_write16(UART0_DLH, val)
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#define bfin_read_UART0_GCTL() bfin_read16(UART0_GCTL)
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#define bfin_write_UART0_GCTL(val) bfin_write16(UART0_GCTL, val)
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#define bfin_read_UART0_LCR() bfin_read16(UART0_LCR)
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#define bfin_write_UART0_LCR(val) bfin_write16(UART0_LCR, val)
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#define bfin_read_UART0_MCR() bfin_read16(UART0_MCR)
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#define bfin_write_UART0_MCR(val) bfin_write16(UART0_MCR, val)
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#define bfin_read_UART0_LSR() bfin_read16(UART0_LSR)
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#define bfin_write_UART0_LSR(val) bfin_write16(UART0_LSR, val)
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#define bfin_read_UART0_MSR() bfin_read16(UART0_MSR)
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#define bfin_write_UART0_MSR(val) bfin_write16(UART0_MSR, val)
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#define bfin_read_UART0_SCR() bfin_read16(UART0_SCR)
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#define bfin_write_UART0_SCR(val) bfin_write16(UART0_SCR, val)
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#define bfin_read_UART0_IER_SET() bfin_read16(UART0_IER_SET)
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#define bfin_write_UART0_IER_SET(val) bfin_write16(UART0_IER_SET, val)
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#define bfin_read_UART0_IER_CLEAR() bfin_read16(UART0_IER_CLEAR)
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#define bfin_write_UART0_IER_CLEAR(val) bfin_write16(UART0_IER_CLEAR, val)
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#define bfin_read_UART0_THR() bfin_read16(UART0_THR)
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#define bfin_write_UART0_THR(val) bfin_write16(UART0_THR, val)
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#define bfin_read_UART0_RBR() bfin_read16(UART0_RBR)
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#define bfin_write_UART0_RBR(val) bfin_write16(UART0_RBR, val)
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/* SPI0 Registers */
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#define bfin_read_SPI0_CTL() bfin_read16(SPI0_CTL)
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#define bfin_write_SPI0_CTL(val) bfin_write16(SPI0_CTL, val)
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#define bfin_read_SPI0_FLG() bfin_read16(SPI0_FLG)
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#define bfin_write_SPI0_FLG(val) bfin_write16(SPI0_FLG, val)
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#define bfin_read_SPI0_STAT() bfin_read16(SPI0_STAT)
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#define bfin_write_SPI0_STAT(val) bfin_write16(SPI0_STAT, val)
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#define bfin_read_SPI0_TDBR() bfin_read16(SPI0_TDBR)
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#define bfin_write_SPI0_TDBR(val) bfin_write16(SPI0_TDBR, val)
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#define bfin_read_SPI0_RDBR() bfin_read16(SPI0_RDBR)
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#define bfin_write_SPI0_RDBR(val) bfin_write16(SPI0_RDBR, val)
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#define bfin_read_SPI0_BAUD() bfin_read16(SPI0_BAUD)
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#define bfin_write_SPI0_BAUD(val) bfin_write16(SPI0_BAUD, val)
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#define bfin_read_SPI0_SHADOW() bfin_read16(SPI0_SHADOW)
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#define bfin_write_SPI0_SHADOW(val) bfin_write16(SPI0_SHADOW, val)
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/* Timer Groubfin_read_() of 3 registers are not defined in the shared file because they are not available on the ADSP-BF542 processor */
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/* Two Wire Interface Registers (TWI0) */
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/* SPORT0 is not defined in the shared file because it is not available on the ADSP-BF542 and ADSP-BF544 bfin_read_()rocessors */
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/* SPORT1 Registers */
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#define bfin_read_SPORT1_TCR1() bfin_read16(SPORT1_TCR1)
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#define bfin_write_SPORT1_TCR1(val) bfin_write16(SPORT1_TCR1, val)
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#define bfin_read_SPORT1_TCR2() bfin_read16(SPORT1_TCR2)
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#define bfin_write_SPORT1_TCR2(val) bfin_write16(SPORT1_TCR2, val)
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#define bfin_read_SPORT1_TCLKDIV() bfin_read16(SPORT1_TCLKDIV)
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#define bfin_write_SPORT1_TCLKDIV(val) bfin_write16(SPORT1_TCLKDIV, val)
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#define bfin_read_SPORT1_TFSDIV() bfin_read16(SPORT1_TFSDIV)
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#define bfin_write_SPORT1_TFSDIV(val) bfin_write16(SPORT1_TFSDIV, val)
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#define bfin_read_SPORT1_TX() bfin_read32(SPORT1_TX)
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#define bfin_write_SPORT1_TX(val) bfin_write32(SPORT1_TX, val)
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#define bfin_read_SPORT1_RX() bfin_read32(SPORT1_RX)
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#define bfin_write_SPORT1_RX(val) bfin_write32(SPORT1_RX, val)
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#define bfin_read_SPORT1_RCR1() bfin_read16(SPORT1_RCR1)
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#define bfin_write_SPORT1_RCR1(val) bfin_write16(SPORT1_RCR1, val)
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#define bfin_read_SPORT1_RCR2() bfin_read16(SPORT1_RCR2)
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#define bfin_write_SPORT1_RCR2(val) bfin_write16(SPORT1_RCR2, val)
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#define bfin_read_SPORT1_RCLKDIV() bfin_read16(SPORT1_RCLKDIV)
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#define bfin_write_SPORT1_RCLKDIV(val) bfin_write16(SPORT1_RCLKDIV, val)
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#define bfin_read_SPORT1_RFSDIV() bfin_read16(SPORT1_RFSDIV)
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#define bfin_write_SPORT1_RFSDIV(val) bfin_write16(SPORT1_RFSDIV, val)
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#define bfin_read_SPORT1_STAT() bfin_read16(SPORT1_STAT)
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#define bfin_write_SPORT1_STAT(val) bfin_write16(SPORT1_STAT, val)
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#define bfin_read_SPORT1_CHNL() bfin_read16(SPORT1_CHNL)
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#define bfin_write_SPORT1_CHNL(val) bfin_write16(SPORT1_CHNL, val)
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#define bfin_read_SPORT1_MCMC1() bfin_read16(SPORT1_MCMC1)
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#define bfin_write_SPORT1_MCMC1(val) bfin_write16(SPORT1_MCMC1, val)
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#define bfin_read_SPORT1_MCMC2() bfin_read16(SPORT1_MCMC2)
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#define bfin_write_SPORT1_MCMC2(val) bfin_write16(SPORT1_MCMC2, val)
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#define bfin_read_SPORT1_MTCS0() bfin_read32(SPORT1_MTCS0)
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#define bfin_write_SPORT1_MTCS0(val) bfin_write32(SPORT1_MTCS0, val)
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#define bfin_read_SPORT1_MTCS1() bfin_read32(SPORT1_MTCS1)
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#define bfin_write_SPORT1_MTCS1(val) bfin_write32(SPORT1_MTCS1, val)
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#define bfin_read_SPORT1_MTCS2() bfin_read32(SPORT1_MTCS2)
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#define bfin_write_SPORT1_MTCS2(val) bfin_write32(SPORT1_MTCS2, val)
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#define bfin_read_SPORT1_MTCS3() bfin_read32(SPORT1_MTCS3)
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#define bfin_write_SPORT1_MTCS3(val) bfin_write32(SPORT1_MTCS3, val)
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#define bfin_read_SPORT1_MRCS0() bfin_read32(SPORT1_MRCS0)
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#define bfin_write_SPORT1_MRCS0(val) bfin_write32(SPORT1_MRCS0, val)
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#define bfin_read_SPORT1_MRCS1() bfin_read32(SPORT1_MRCS1)
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#define bfin_write_SPORT1_MRCS1(val) bfin_write32(SPORT1_MRCS1, val)
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#define bfin_read_SPORT1_MRCS2() bfin_read32(SPORT1_MRCS2)
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#define bfin_write_SPORT1_MRCS2(val) bfin_write32(SPORT1_MRCS2, val)
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#define bfin_read_SPORT1_MRCS3() bfin_read32(SPORT1_MRCS3)
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#define bfin_write_SPORT1_MRCS3(val) bfin_write32(SPORT1_MRCS3, val)
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/* Asynchronous Memory Control Registers */
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#define bfin_read_EBIU_AMGCTL() bfin_read16(EBIU_AMGCTL)
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#define bfin_write_EBIU_AMGCTL(val) bfin_write16(EBIU_AMGCTL, val)
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#define bfin_read_EBIU_AMBCTL0() bfin_read32(EBIU_AMBCTL0)
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#define bfin_write_EBIU_AMBCTL0(val) bfin_write32(EBIU_AMBCTL0, val)
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#define bfin_read_EBIU_AMBCTL1() bfin_read32(EBIU_AMBCTL1)
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#define bfin_write_EBIU_AMBCTL1(val) bfin_write32(EBIU_AMBCTL1, val)
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#define bfin_read_EBIU_MBSCTL() bfin_read16(EBIU_MBSCTL)
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#define bfin_write_EBIU_MBSCTL(val) bfin_write16(EBIU_MBSCTL, val)
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#define bfin_read_EBIU_ARBSTAT() bfin_read32(EBIU_ARBSTAT)
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#define bfin_write_EBIU_ARBSTAT(val) bfin_write32(EBIU_ARBSTAT, val)
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#define bfin_read_EBIU_MODE() bfin_read32(EBIU_MODE)
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#define bfin_write_EBIU_MODE(val) bfin_write32(EBIU_MODE, val)
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#define bfin_read_EBIU_FCTL() bfin_read16(EBIU_FCTL)
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#define bfin_write_EBIU_FCTL(val) bfin_write16(EBIU_FCTL, val)
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/* DDR Memory Control Registers */
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#define bfin_read_EBIU_DDRCTL0() bfin_read32(EBIU_DDRCTL0)
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#define bfin_write_EBIU_DDRCTL0(val) bfin_write32(EBIU_DDRCTL0, val)
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#define bfin_read_EBIU_DDRCTL1() bfin_read32(EBIU_DDRCTL1)
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#define bfin_write_EBIU_DDRCTL1(val) bfin_write32(EBIU_DDRCTL1, val)
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#define bfin_read_EBIU_DDRCTL2() bfin_read32(EBIU_DDRCTL2)
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#define bfin_write_EBIU_DDRCTL2(val) bfin_write32(EBIU_DDRCTL2, val)
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#define bfin_read_EBIU_DDRCTL3() bfin_read32(EBIU_DDRCTL3)
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#define bfin_write_EBIU_DDRCTL3(val) bfin_write32(EBIU_DDRCTL3, val)
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#define bfin_read_EBIU_DDRQUE() bfin_read32(EBIU_DDRQUE)
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#define bfin_write_EBIU_DDRQUE(val) bfin_write32(EBIU_DDRQUE, val)
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#define bfin_read_EBIU_ERRADD() bfin_read32(EBIU_ERRADD)
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#define bfin_write_EBIU_ERRADD(val) bfin_write32(EBIU_ERRADD, val)
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#define bfin_read_EBIU_ERRMST() bfin_read16(EBIU_ERRMST)
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#define bfin_write_EBIU_ERRMST(val) bfin_write16(EBIU_ERRMST, val)
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#define bfin_read_EBIU_RSTCTL() bfin_read16(EBIU_RSTCTL)
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#define bfin_write_EBIU_RSTCTL(val) bfin_write16(EBIU_RSTCTL, val)
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/* DDR BankRead and Write Count Registers */
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#define bfin_read_EBIU_DDRBRC0() bfin_read32(EBIU_DDRBRC0)
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#define bfin_write_EBIU_DDRBRC0(val) bfin_write32(EBIU_DDRBRC0, val)
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#define bfin_read_EBIU_DDRBRC1() bfin_read32(EBIU_DDRBRC1)
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#define bfin_write_EBIU_DDRBRC1(val) bfin_write32(EBIU_DDRBRC1, val)
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#define bfin_read_EBIU_DDRBRC2() bfin_read32(EBIU_DDRBRC2)
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#define bfin_write_EBIU_DDRBRC2(val) bfin_write32(EBIU_DDRBRC2, val)
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#define bfin_read_EBIU_DDRBRC3() bfin_read32(EBIU_DDRBRC3)
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#define bfin_write_EBIU_DDRBRC3(val) bfin_write32(EBIU_DDRBRC3, val)
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#define bfin_read_EBIU_DDRBRC4() bfin_read32(EBIU_DDRBRC4)
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#define bfin_write_EBIU_DDRBRC4(val) bfin_write32(EBIU_DDRBRC4, val)
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#define bfin_read_EBIU_DDRBRC5() bfin_read32(EBIU_DDRBRC5)
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#define bfin_write_EBIU_DDRBRC5(val) bfin_write32(EBIU_DDRBRC5, val)
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#define bfin_read_EBIU_DDRBRC6() bfin_read32(EBIU_DDRBRC6)
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#define bfin_write_EBIU_DDRBRC6(val) bfin_write32(EBIU_DDRBRC6, val)
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#define bfin_read_EBIU_DDRBRC7() bfin_read32(EBIU_DDRBRC7)
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#define bfin_write_EBIU_DDRBRC7(val) bfin_write32(EBIU_DDRBRC7, val)
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#define bfin_read_EBIU_DDRBWC0() bfin_read32(EBIU_DDRBWC0)
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#define bfin_write_EBIU_DDRBWC0(val) bfin_write32(EBIU_DDRBWC0, val)
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#define bfin_read_EBIU_DDRBWC1() bfin_read32(EBIU_DDRBWC1)
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#define bfin_write_EBIU_DDRBWC1(val) bfin_write32(EBIU_DDRBWC1, val)
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#define bfin_read_EBIU_DDRBWC2() bfin_read32(EBIU_DDRBWC2)
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#define bfin_write_EBIU_DDRBWC2(val) bfin_write32(EBIU_DDRBWC2, val)
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#define bfin_read_EBIU_DDRBWC3() bfin_read32(EBIU_DDRBWC3)
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#define bfin_write_EBIU_DDRBWC3(val) bfin_write32(EBIU_DDRBWC3, val)
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#define bfin_read_EBIU_DDRBWC4() bfin_read32(EBIU_DDRBWC4)
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#define bfin_write_EBIU_DDRBWC4(val) bfin_write32(EBIU_DDRBWC4, val)
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#define bfin_read_EBIU_DDRBWC5() bfin_read32(EBIU_DDRBWC5)
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#define bfin_write_EBIU_DDRBWC5(val) bfin_write32(EBIU_DDRBWC5, val)
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#define bfin_read_EBIU_DDRBWC6() bfin_read32(EBIU_DDRBWC6)
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#define bfin_write_EBIU_DDRBWC6(val) bfin_write32(EBIU_DDRBWC6, val)
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#define bfin_read_EBIU_DDRBWC7() bfin_read32(EBIU_DDRBWC7)
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#define bfin_write_EBIU_DDRBWC7(val) bfin_write32(EBIU_DDRBWC7, val)
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#define bfin_read_EBIU_DDRACCT() bfin_read32(EBIU_DDRACCT)
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#define bfin_write_EBIU_DDRACCT(val) bfin_write32(EBIU_DDRACCT, val)
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#define bfin_read_EBIU_DDRTACT() bfin_read32(EBIU_DDRTACT)
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#define bfin_write_EBIU_DDRTACT(val) bfin_write32(EBIU_DDRTACT, val)
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|
#define bfin_read_EBIU_DDRARCT() bfin_read32(EBIU_DDRARCT)
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#define bfin_write_EBIU_DDRARCT(val) bfin_write32(EBIU_DDRARCT, val)
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#define bfin_read_EBIU_DDRGC0() bfin_read32(EBIU_DDRGC0)
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#define bfin_write_EBIU_DDRGC0(val) bfin_write32(EBIU_DDRGC0, val)
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#define bfin_read_EBIU_DDRGC1() bfin_read32(EBIU_DDRGC1)
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#define bfin_write_EBIU_DDRGC1(val) bfin_write32(EBIU_DDRGC1, val)
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#define bfin_read_EBIU_DDRGC2() bfin_read32(EBIU_DDRGC2)
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#define bfin_write_EBIU_DDRGC2(val) bfin_write32(EBIU_DDRGC2, val)
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#define bfin_read_EBIU_DDRGC3() bfin_read32(EBIU_DDRGC3)
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#define bfin_write_EBIU_DDRGC3(val) bfin_write32(EBIU_DDRGC3, val)
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#define bfin_read_EBIU_DDRMCEN() bfin_read32(EBIU_DDRMCEN)
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|
#define bfin_write_EBIU_DDRMCEN(val) bfin_write32(EBIU_DDRMCEN, val)
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#define bfin_read_EBIU_DDRMCCL() bfin_read32(EBIU_DDRMCCL)
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#define bfin_write_EBIU_DDRMCCL(val) bfin_write32(EBIU_DDRMCCL, val)
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/* DMAC0 Registers */
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#define bfin_read_DMAC0_TCPER() bfin_read16(DMAC0_TCPER)
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#define bfin_write_DMAC0_TCPER(val) bfin_write16(DMAC0_TCPER, val)
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#define bfin_read_DMAC0_TCCNT() bfin_read16(DMAC0_TCCNT)
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#define bfin_write_DMAC0_TCCNT(val) bfin_write16(DMAC0_TCCNT, val)
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/* DMA Channel 0 Registers */
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#define bfin_read_DMA0_NEXT_DESC_PTR() bfin_read32(DMA0_NEXT_DESC_PTR)
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#define bfin_write_DMA0_NEXT_DESC_PTR(val) bfin_write32(DMA0_NEXT_DESC_PTR, val)
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#define bfin_read_DMA0_START_ADDR() bfin_read32(DMA0_START_ADDR)
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#define bfin_write_DMA0_START_ADDR(val) bfin_write32(DMA0_START_ADDR, val)
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#define bfin_read_DMA0_CONFIG() bfin_read16(DMA0_CONFIG)
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#define bfin_write_DMA0_CONFIG(val) bfin_write16(DMA0_CONFIG, val)
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#define bfin_read_DMA0_X_COUNT() bfin_read16(DMA0_X_COUNT)
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#define bfin_write_DMA0_X_COUNT(val) bfin_write16(DMA0_X_COUNT, val)
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#define bfin_read_DMA0_X_MODIFY() bfin_read16(DMA0_X_MODIFY)
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#define bfin_write_DMA0_X_MODIFY(val) bfin_write16(DMA0_X_MODIFY, val)
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#define bfin_read_DMA0_Y_COUNT() bfin_read16(DMA0_Y_COUNT)
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#define bfin_write_DMA0_Y_COUNT(val) bfin_write16(DMA0_Y_COUNT, val)
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#define bfin_read_DMA0_Y_MODIFY() bfin_read16(DMA0_Y_MODIFY)
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#define bfin_write_DMA0_Y_MODIFY(val) bfin_write16(DMA0_Y_MODIFY, val)
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#define bfin_read_DMA0_CURR_DESC_PTR() bfin_read32(DMA0_CURR_DESC_PTR)
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#define bfin_write_DMA0_CURR_DESC_PTR(val) bfin_write32(DMA0_CURR_DESC_PTR, val)
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#define bfin_read_DMA0_CURR_ADDR() bfin_read32(DMA0_CURR_ADDR)
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#define bfin_write_DMA0_CURR_ADDR(val) bfin_write32(DMA0_CURR_ADDR, val)
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#define bfin_read_DMA0_IRQ_STATUS() bfin_read16(DMA0_IRQ_STATUS)
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#define bfin_write_DMA0_IRQ_STATUS(val) bfin_write16(DMA0_IRQ_STATUS, val)
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#define bfin_read_DMA0_PERIPHERAL_MAP() bfin_read16(DMA0_PERIPHERAL_MAP)
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#define bfin_write_DMA0_PERIPHERAL_MAP(val) bfin_write16(DMA0_PERIPHERAL_MAP, val)
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#define bfin_read_DMA0_CURR_X_COUNT() bfin_read16(DMA0_CURR_X_COUNT)
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#define bfin_write_DMA0_CURR_X_COUNT(val) bfin_write16(DMA0_CURR_X_COUNT, val)
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#define bfin_read_DMA0_CURR_Y_COUNT() bfin_read16(DMA0_CURR_Y_COUNT)
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#define bfin_write_DMA0_CURR_Y_COUNT(val) bfin_write16(DMA0_CURR_Y_COUNT, val)
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/* DMA Channel 1 Registers */
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|
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#define bfin_read_DMA1_NEXT_DESC_PTR() bfin_read32(DMA1_NEXT_DESC_PTR)
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#define bfin_write_DMA1_NEXT_DESC_PTR(val) bfin_write32(DMA1_NEXT_DESC_PTR, val)
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#define bfin_read_DMA1_START_ADDR() bfin_read32(DMA1_START_ADDR)
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#define bfin_write_DMA1_START_ADDR(val) bfin_write32(DMA1_START_ADDR, val)
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#define bfin_read_DMA1_CONFIG() bfin_read16(DMA1_CONFIG)
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#define bfin_write_DMA1_CONFIG(val) bfin_write16(DMA1_CONFIG, val)
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#define bfin_read_DMA1_X_COUNT() bfin_read16(DMA1_X_COUNT)
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#define bfin_write_DMA1_X_COUNT(val) bfin_write16(DMA1_X_COUNT, val)
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#define bfin_read_DMA1_X_MODIFY() bfin_read16(DMA1_X_MODIFY)
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#define bfin_write_DMA1_X_MODIFY(val) bfin_write16(DMA1_X_MODIFY, val)
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#define bfin_read_DMA1_Y_COUNT() bfin_read16(DMA1_Y_COUNT)
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#define bfin_write_DMA1_Y_COUNT(val) bfin_write16(DMA1_Y_COUNT, val)
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#define bfin_read_DMA1_Y_MODIFY() bfin_read16(DMA1_Y_MODIFY)
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#define bfin_write_DMA1_Y_MODIFY(val) bfin_write16(DMA1_Y_MODIFY, val)
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#define bfin_read_DMA1_CURR_DESC_PTR() bfin_read32(DMA1_CURR_DESC_PTR)
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#define bfin_write_DMA1_CURR_DESC_PTR(val) bfin_write32(DMA1_CURR_DESC_PTR, val)
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#define bfin_read_DMA1_CURR_ADDR() bfin_read32(DMA1_CURR_ADDR)
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#define bfin_write_DMA1_CURR_ADDR(val) bfin_write32(DMA1_CURR_ADDR, val)
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#define bfin_read_DMA1_IRQ_STATUS() bfin_read16(DMA1_IRQ_STATUS)
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#define bfin_write_DMA1_IRQ_STATUS(val) bfin_write16(DMA1_IRQ_STATUS, val)
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#define bfin_read_DMA1_PERIPHERAL_MAP() bfin_read16(DMA1_PERIPHERAL_MAP)
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#define bfin_write_DMA1_PERIPHERAL_MAP(val) bfin_write16(DMA1_PERIPHERAL_MAP, val)
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#define bfin_read_DMA1_CURR_X_COUNT() bfin_read16(DMA1_CURR_X_COUNT)
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#define bfin_write_DMA1_CURR_X_COUNT(val) bfin_write16(DMA1_CURR_X_COUNT, val)
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#define bfin_read_DMA1_CURR_Y_COUNT() bfin_read16(DMA1_CURR_Y_COUNT)
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#define bfin_write_DMA1_CURR_Y_COUNT(val) bfin_write16(DMA1_CURR_Y_COUNT, val)
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|
|
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/* DMA Channel 2 Registers */
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|
|
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#define bfin_read_DMA2_NEXT_DESC_PTR() bfin_read32(DMA2_NEXT_DESC_PTR)
|
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#define bfin_write_DMA2_NEXT_DESC_PTR(val) bfin_write32(DMA2_NEXT_DESC_PTR, val)
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#define bfin_read_DMA2_START_ADDR() bfin_read32(DMA2_START_ADDR)
|
|
#define bfin_write_DMA2_START_ADDR(val) bfin_write32(DMA2_START_ADDR, val)
|
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#define bfin_read_DMA2_CONFIG() bfin_read16(DMA2_CONFIG)
|
|
#define bfin_write_DMA2_CONFIG(val) bfin_write16(DMA2_CONFIG, val)
|
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#define bfin_read_DMA2_X_COUNT() bfin_read16(DMA2_X_COUNT)
|
|
#define bfin_write_DMA2_X_COUNT(val) bfin_write16(DMA2_X_COUNT, val)
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#define bfin_read_DMA2_X_MODIFY() bfin_read16(DMA2_X_MODIFY)
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#define bfin_write_DMA2_X_MODIFY(val) bfin_write16(DMA2_X_MODIFY, val)
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#define bfin_read_DMA2_Y_COUNT() bfin_read16(DMA2_Y_COUNT)
|
|
#define bfin_write_DMA2_Y_COUNT(val) bfin_write16(DMA2_Y_COUNT, val)
|
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#define bfin_read_DMA2_Y_MODIFY() bfin_read16(DMA2_Y_MODIFY)
|
|
#define bfin_write_DMA2_Y_MODIFY(val) bfin_write16(DMA2_Y_MODIFY, val)
|
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#define bfin_read_DMA2_CURR_DESC_PTR() bfin_read32(DMA2_CURR_DESC_PTR)
|
|
#define bfin_write_DMA2_CURR_DESC_PTR(val) bfin_write32(DMA2_CURR_DESC_PTR, val)
|
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#define bfin_read_DMA2_CURR_ADDR() bfin_read32(DMA2_CURR_ADDR)
|
|
#define bfin_write_DMA2_CURR_ADDR(val) bfin_write32(DMA2_CURR_ADDR, val)
|
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#define bfin_read_DMA2_IRQ_STATUS() bfin_read16(DMA2_IRQ_STATUS)
|
|
#define bfin_write_DMA2_IRQ_STATUS(val) bfin_write16(DMA2_IRQ_STATUS, val)
|
|
#define bfin_read_DMA2_PERIPHERAL_MAP() bfin_read16(DMA2_PERIPHERAL_MAP)
|
|
#define bfin_write_DMA2_PERIPHERAL_MAP(val) bfin_write16(DMA2_PERIPHERAL_MAP, val)
|
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#define bfin_read_DMA2_CURR_X_COUNT() bfin_read16(DMA2_CURR_X_COUNT)
|
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#define bfin_write_DMA2_CURR_X_COUNT(val) bfin_write16(DMA2_CURR_X_COUNT, val)
|
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#define bfin_read_DMA2_CURR_Y_COUNT() bfin_read16(DMA2_CURR_Y_COUNT)
|
|
#define bfin_write_DMA2_CURR_Y_COUNT(val) bfin_write16(DMA2_CURR_Y_COUNT, val)
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|
|
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/* DMA Channel 3 Registers */
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|
|
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#define bfin_read_DMA3_NEXT_DESC_PTR() bfin_read32(DMA3_NEXT_DESC_PTR)
|
|
#define bfin_write_DMA3_NEXT_DESC_PTR(val) bfin_write32(DMA3_NEXT_DESC_PTR, val)
|
|
#define bfin_read_DMA3_START_ADDR() bfin_read32(DMA3_START_ADDR)
|
|
#define bfin_write_DMA3_START_ADDR(val) bfin_write32(DMA3_START_ADDR, val)
|
|
#define bfin_read_DMA3_CONFIG() bfin_read16(DMA3_CONFIG)
|
|
#define bfin_write_DMA3_CONFIG(val) bfin_write16(DMA3_CONFIG, val)
|
|
#define bfin_read_DMA3_X_COUNT() bfin_read16(DMA3_X_COUNT)
|
|
#define bfin_write_DMA3_X_COUNT(val) bfin_write16(DMA3_X_COUNT, val)
|
|
#define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
|
|
#define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY, val)
|
|
#define bfin_read_DMA3_Y_COUNT() bfin_read16(DMA3_Y_COUNT)
|
|
#define bfin_write_DMA3_Y_COUNT(val) bfin_write16(DMA3_Y_COUNT, val)
|
|
#define bfin_read_DMA3_Y_MODIFY() bfin_read16(DMA3_Y_MODIFY)
|
|
#define bfin_write_DMA3_Y_MODIFY(val) bfin_write16(DMA3_Y_MODIFY, val)
|
|
#define bfin_read_DMA3_CURR_DESC_PTR() bfin_read32(DMA3_CURR_DESC_PTR)
|
|
#define bfin_write_DMA3_CURR_DESC_PTR(val) bfin_write32(DMA3_CURR_DESC_PTR, val)
|
|
#define bfin_read_DMA3_CURR_ADDR() bfin_read32(DMA3_CURR_ADDR)
|
|
#define bfin_write_DMA3_CURR_ADDR(val) bfin_write32(DMA3_CURR_ADDR, val)
|
|
#define bfin_read_DMA3_IRQ_STATUS() bfin_read16(DMA3_IRQ_STATUS)
|
|
#define bfin_write_DMA3_IRQ_STATUS(val) bfin_write16(DMA3_IRQ_STATUS, val)
|
|
#define bfin_read_DMA3_PERIPHERAL_MAP() bfin_read16(DMA3_PERIPHERAL_MAP)
|
|
#define bfin_write_DMA3_PERIPHERAL_MAP(val) bfin_write16(DMA3_PERIPHERAL_MAP, val)
|
|
#define bfin_read_DMA3_CURR_X_COUNT() bfin_read16(DMA3_CURR_X_COUNT)
|
|
#define bfin_write_DMA3_CURR_X_COUNT(val) bfin_write16(DMA3_CURR_X_COUNT, val)
|
|
#define bfin_read_DMA3_CURR_Y_COUNT() bfin_read16(DMA3_CURR_Y_COUNT)
|
|
#define bfin_write_DMA3_CURR_Y_COUNT(val) bfin_write16(DMA3_CURR_Y_COUNT, val)
|
|
|
|
/* DMA Channel 4 Registers */
|
|
|
|
#define bfin_read_DMA4_NEXT_DESC_PTR() bfin_read32(DMA4_NEXT_DESC_PTR)
|
|
#define bfin_write_DMA4_NEXT_DESC_PTR(val) bfin_write32(DMA4_NEXT_DESC_PTR, val)
|
|
#define bfin_read_DMA4_START_ADDR() bfin_read32(DMA4_START_ADDR)
|
|
#define bfin_write_DMA4_START_ADDR(val) bfin_write32(DMA4_START_ADDR, val)
|
|
#define bfin_read_DMA4_CONFIG() bfin_read16(DMA4_CONFIG)
|
|
#define bfin_write_DMA4_CONFIG(val) bfin_write16(DMA4_CONFIG, val)
|
|
#define bfin_read_DMA4_X_COUNT() bfin_read16(DMA4_X_COUNT)
|
|
#define bfin_write_DMA4_X_COUNT(val) bfin_write16(DMA4_X_COUNT, val)
|
|
#define bfin_read_DMA4_X_MODIFY() bfin_read16(DMA4_X_MODIFY)
|
|
#define bfin_write_DMA4_X_MODIFY(val) bfin_write16(DMA4_X_MODIFY, val)
|
|
#define bfin_read_DMA4_Y_COUNT() bfin_read16(DMA4_Y_COUNT)
|
|
#define bfin_write_DMA4_Y_COUNT(val) bfin_write16(DMA4_Y_COUNT, val)
|
|
#define bfin_read_DMA4_Y_MODIFY() bfin_read16(DMA4_Y_MODIFY)
|
|
#define bfin_write_DMA4_Y_MODIFY(val) bfin_write16(DMA4_Y_MODIFY, val)
|
|
#define bfin_read_DMA4_CURR_DESC_PTR() bfin_read32(DMA4_CURR_DESC_PTR)
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#define bfin_write_DMA4_CURR_DESC_PTR(val) bfin_write32(DMA4_CURR_DESC_PTR, val)
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#define bfin_read_DMA4_CURR_ADDR() bfin_read32(DMA4_CURR_ADDR)
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#define bfin_write_DMA4_CURR_ADDR(val) bfin_write32(DMA4_CURR_ADDR, val)
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#define bfin_read_DMA4_IRQ_STATUS() bfin_read16(DMA4_IRQ_STATUS)
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#define bfin_write_DMA4_IRQ_STATUS(val) bfin_write16(DMA4_IRQ_STATUS, val)
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#define bfin_read_DMA4_PERIPHERAL_MAP() bfin_read16(DMA4_PERIPHERAL_MAP)
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#define bfin_write_DMA4_PERIPHERAL_MAP(val) bfin_write16(DMA4_PERIPHERAL_MAP, val)
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#define bfin_read_DMA4_CURR_X_COUNT() bfin_read16(DMA4_CURR_X_COUNT)
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#define bfin_write_DMA4_CURR_X_COUNT(val) bfin_write16(DMA4_CURR_X_COUNT, val)
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#define bfin_read_DMA4_CURR_Y_COUNT() bfin_read16(DMA4_CURR_Y_COUNT)
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#define bfin_write_DMA4_CURR_Y_COUNT(val) bfin_write16(DMA4_CURR_Y_COUNT, val)
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/* DMA Channel 5 Registers */
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#define bfin_read_DMA5_NEXT_DESC_PTR() bfin_read32(DMA5_NEXT_DESC_PTR)
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#define bfin_write_DMA5_NEXT_DESC_PTR(val) bfin_write32(DMA5_NEXT_DESC_PTR, val)
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#define bfin_read_DMA5_START_ADDR() bfin_read32(DMA5_START_ADDR)
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#define bfin_write_DMA5_START_ADDR(val) bfin_write32(DMA5_START_ADDR, val)
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#define bfin_read_DMA5_CONFIG() bfin_read16(DMA5_CONFIG)
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#define bfin_write_DMA5_CONFIG(val) bfin_write16(DMA5_CONFIG, val)
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#define bfin_read_DMA5_X_COUNT() bfin_read16(DMA5_X_COUNT)
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#define bfin_write_DMA5_X_COUNT(val) bfin_write16(DMA5_X_COUNT, val)
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#define bfin_read_DMA5_X_MODIFY() bfin_read16(DMA5_X_MODIFY)
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#define bfin_write_DMA5_X_MODIFY(val) bfin_write16(DMA5_X_MODIFY, val)
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#define bfin_read_DMA5_Y_COUNT() bfin_read16(DMA5_Y_COUNT)
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#define bfin_write_DMA5_Y_COUNT(val) bfin_write16(DMA5_Y_COUNT, val)
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#define bfin_read_DMA5_Y_MODIFY() bfin_read16(DMA5_Y_MODIFY)
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#define bfin_write_DMA5_Y_MODIFY(val) bfin_write16(DMA5_Y_MODIFY, val)
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#define bfin_read_DMA5_CURR_DESC_PTR() bfin_read32(DMA5_CURR_DESC_PTR)
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#define bfin_write_DMA5_CURR_DESC_PTR(val) bfin_write32(DMA5_CURR_DESC_PTR, val)
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#define bfin_read_DMA5_CURR_ADDR() bfin_read32(DMA5_CURR_ADDR)
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#define bfin_write_DMA5_CURR_ADDR(val) bfin_write32(DMA5_CURR_ADDR, val)
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#define bfin_read_DMA5_IRQ_STATUS() bfin_read16(DMA5_IRQ_STATUS)
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#define bfin_write_DMA5_IRQ_STATUS(val) bfin_write16(DMA5_IRQ_STATUS, val)
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#define bfin_read_DMA5_PERIPHERAL_MAP() bfin_read16(DMA5_PERIPHERAL_MAP)
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#define bfin_write_DMA5_PERIPHERAL_MAP(val) bfin_write16(DMA5_PERIPHERAL_MAP, val)
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#define bfin_read_DMA5_CURR_X_COUNT() bfin_read16(DMA5_CURR_X_COUNT)
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#define bfin_write_DMA5_CURR_X_COUNT(val) bfin_write16(DMA5_CURR_X_COUNT, val)
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#define bfin_read_DMA5_CURR_Y_COUNT() bfin_read16(DMA5_CURR_Y_COUNT)
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#define bfin_write_DMA5_CURR_Y_COUNT(val) bfin_write16(DMA5_CURR_Y_COUNT, val)
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/* DMA Channel 6 Registers */
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#define bfin_read_DMA6_NEXT_DESC_PTR() bfin_read32(DMA6_NEXT_DESC_PTR)
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#define bfin_write_DMA6_NEXT_DESC_PTR(val) bfin_write32(DMA6_NEXT_DESC_PTR, val)
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#define bfin_read_DMA6_START_ADDR() bfin_read32(DMA6_START_ADDR)
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#define bfin_write_DMA6_START_ADDR(val) bfin_write32(DMA6_START_ADDR, val)
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#define bfin_read_DMA6_CONFIG() bfin_read16(DMA6_CONFIG)
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#define bfin_write_DMA6_CONFIG(val) bfin_write16(DMA6_CONFIG, val)
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#define bfin_read_DMA6_X_COUNT() bfin_read16(DMA6_X_COUNT)
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#define bfin_write_DMA6_X_COUNT(val) bfin_write16(DMA6_X_COUNT, val)
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#define bfin_read_DMA6_X_MODIFY() bfin_read16(DMA6_X_MODIFY)
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#define bfin_write_DMA6_X_MODIFY(val) bfin_write16(DMA6_X_MODIFY, val)
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#define bfin_read_DMA6_Y_COUNT() bfin_read16(DMA6_Y_COUNT)
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#define bfin_write_DMA6_Y_COUNT(val) bfin_write16(DMA6_Y_COUNT, val)
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#define bfin_read_DMA6_Y_MODIFY() bfin_read16(DMA6_Y_MODIFY)
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#define bfin_write_DMA6_Y_MODIFY(val) bfin_write16(DMA6_Y_MODIFY, val)
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#define bfin_read_DMA6_CURR_DESC_PTR() bfin_read32(DMA6_CURR_DESC_PTR)
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#define bfin_write_DMA6_CURR_DESC_PTR(val) bfin_write32(DMA6_CURR_DESC_PTR, val)
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#define bfin_read_DMA6_CURR_ADDR() bfin_read32(DMA6_CURR_ADDR)
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#define bfin_write_DMA6_CURR_ADDR(val) bfin_write32(DMA6_CURR_ADDR, val)
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#define bfin_read_DMA6_IRQ_STATUS() bfin_read16(DMA6_IRQ_STATUS)
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#define bfin_write_DMA6_IRQ_STATUS(val) bfin_write16(DMA6_IRQ_STATUS, val)
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#define bfin_read_DMA6_PERIPHERAL_MAP() bfin_read16(DMA6_PERIPHERAL_MAP)
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#define bfin_write_DMA6_PERIPHERAL_MAP(val) bfin_write16(DMA6_PERIPHERAL_MAP, val)
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#define bfin_read_DMA6_CURR_X_COUNT() bfin_read16(DMA6_CURR_X_COUNT)
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#define bfin_write_DMA6_CURR_X_COUNT(val) bfin_write16(DMA6_CURR_X_COUNT, val)
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#define bfin_read_DMA6_CURR_Y_COUNT() bfin_read16(DMA6_CURR_Y_COUNT)
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#define bfin_write_DMA6_CURR_Y_COUNT(val) bfin_write16(DMA6_CURR_Y_COUNT, val)
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/* DMA Channel 7 Registers */
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#define bfin_read_DMA7_NEXT_DESC_PTR() bfin_read32(DMA7_NEXT_DESC_PTR)
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#define bfin_write_DMA7_NEXT_DESC_PTR(val) bfin_write32(DMA7_NEXT_DESC_PTR, val)
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#define bfin_read_DMA7_START_ADDR() bfin_read32(DMA7_START_ADDR)
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#define bfin_write_DMA7_START_ADDR(val) bfin_write32(DMA7_START_ADDR, val)
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#define bfin_read_DMA7_CONFIG() bfin_read16(DMA7_CONFIG)
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#define bfin_write_DMA7_CONFIG(val) bfin_write16(DMA7_CONFIG, val)
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#define bfin_read_DMA7_X_COUNT() bfin_read16(DMA7_X_COUNT)
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#define bfin_write_DMA7_X_COUNT(val) bfin_write16(DMA7_X_COUNT, val)
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#define bfin_read_DMA7_X_MODIFY() bfin_read16(DMA7_X_MODIFY)
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#define bfin_write_DMA7_X_MODIFY(val) bfin_write16(DMA7_X_MODIFY, val)
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#define bfin_read_DMA7_Y_COUNT() bfin_read16(DMA7_Y_COUNT)
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#define bfin_write_DMA7_Y_COUNT(val) bfin_write16(DMA7_Y_COUNT, val)
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#define bfin_read_DMA7_Y_MODIFY() bfin_read16(DMA7_Y_MODIFY)
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#define bfin_write_DMA7_Y_MODIFY(val) bfin_write16(DMA7_Y_MODIFY, val)
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#define bfin_read_DMA7_CURR_DESC_PTR() bfin_read32(DMA7_CURR_DESC_PTR)
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#define bfin_write_DMA7_CURR_DESC_PTR(val) bfin_write32(DMA7_CURR_DESC_PTR, val)
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#define bfin_read_DMA7_CURR_ADDR() bfin_read32(DMA7_CURR_ADDR)
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#define bfin_write_DMA7_CURR_ADDR(val) bfin_write32(DMA7_CURR_ADDR, val)
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#define bfin_read_DMA7_IRQ_STATUS() bfin_read16(DMA7_IRQ_STATUS)
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#define bfin_write_DMA7_IRQ_STATUS(val) bfin_write16(DMA7_IRQ_STATUS, val)
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#define bfin_read_DMA7_PERIPHERAL_MAP() bfin_read16(DMA7_PERIPHERAL_MAP)
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#define bfin_write_DMA7_PERIPHERAL_MAP(val) bfin_write16(DMA7_PERIPHERAL_MAP, val)
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#define bfin_read_DMA7_CURR_X_COUNT() bfin_read16(DMA7_CURR_X_COUNT)
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#define bfin_write_DMA7_CURR_X_COUNT(val) bfin_write16(DMA7_CURR_X_COUNT, val)
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#define bfin_read_DMA7_CURR_Y_COUNT() bfin_read16(DMA7_CURR_Y_COUNT)
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#define bfin_write_DMA7_CURR_Y_COUNT(val) bfin_write16(DMA7_CURR_Y_COUNT, val)
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/* DMA Channel 8 Registers */
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#define bfin_read_DMA8_NEXT_DESC_PTR() bfin_read32(DMA8_NEXT_DESC_PTR)
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#define bfin_write_DMA8_NEXT_DESC_PTR(val) bfin_write32(DMA8_NEXT_DESC_PTR, val)
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#define bfin_read_DMA8_START_ADDR() bfin_read32(DMA8_START_ADDR)
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#define bfin_write_DMA8_START_ADDR(val) bfin_write32(DMA8_START_ADDR, val)
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#define bfin_read_DMA8_CONFIG() bfin_read16(DMA8_CONFIG)
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#define bfin_write_DMA8_CONFIG(val) bfin_write16(DMA8_CONFIG, val)
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#define bfin_read_DMA8_X_COUNT() bfin_read16(DMA8_X_COUNT)
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#define bfin_write_DMA8_X_COUNT(val) bfin_write16(DMA8_X_COUNT, val)
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#define bfin_read_DMA8_X_MODIFY() bfin_read16(DMA8_X_MODIFY)
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#define bfin_write_DMA8_X_MODIFY(val) bfin_write16(DMA8_X_MODIFY, val)
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#define bfin_read_DMA8_Y_COUNT() bfin_read16(DMA8_Y_COUNT)
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#define bfin_write_DMA8_Y_COUNT(val) bfin_write16(DMA8_Y_COUNT, val)
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#define bfin_read_DMA8_Y_MODIFY() bfin_read16(DMA8_Y_MODIFY)
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#define bfin_write_DMA8_Y_MODIFY(val) bfin_write16(DMA8_Y_MODIFY, val)
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#define bfin_read_DMA8_CURR_DESC_PTR() bfin_read32(DMA8_CURR_DESC_PTR)
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#define bfin_write_DMA8_CURR_DESC_PTR(val) bfin_write32(DMA8_CURR_DESC_PTR, val)
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#define bfin_read_DMA8_CURR_ADDR() bfin_read32(DMA8_CURR_ADDR)
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#define bfin_write_DMA8_CURR_ADDR(val) bfin_write32(DMA8_CURR_ADDR, val)
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#define bfin_read_DMA8_IRQ_STATUS() bfin_read16(DMA8_IRQ_STATUS)
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#define bfin_write_DMA8_IRQ_STATUS(val) bfin_write16(DMA8_IRQ_STATUS, val)
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#define bfin_read_DMA8_PERIPHERAL_MAP() bfin_read16(DMA8_PERIPHERAL_MAP)
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#define bfin_write_DMA8_PERIPHERAL_MAP(val) bfin_write16(DMA8_PERIPHERAL_MAP, val)
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#define bfin_read_DMA8_CURR_X_COUNT() bfin_read16(DMA8_CURR_X_COUNT)
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#define bfin_write_DMA8_CURR_X_COUNT(val) bfin_write16(DMA8_CURR_X_COUNT, val)
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#define bfin_read_DMA8_CURR_Y_COUNT() bfin_read16(DMA8_CURR_Y_COUNT)
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#define bfin_write_DMA8_CURR_Y_COUNT(val) bfin_write16(DMA8_CURR_Y_COUNT, val)
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/* DMA Channel 9 Registers */
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#define bfin_read_DMA9_NEXT_DESC_PTR() bfin_read32(DMA9_NEXT_DESC_PTR)
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#define bfin_write_DMA9_NEXT_DESC_PTR(val) bfin_write32(DMA9_NEXT_DESC_PTR, val)
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#define bfin_read_DMA9_START_ADDR() bfin_read32(DMA9_START_ADDR)
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#define bfin_write_DMA9_START_ADDR(val) bfin_write32(DMA9_START_ADDR, val)
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#define bfin_read_DMA9_CONFIG() bfin_read16(DMA9_CONFIG)
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#define bfin_write_DMA9_CONFIG(val) bfin_write16(DMA9_CONFIG, val)
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#define bfin_read_DMA9_X_COUNT() bfin_read16(DMA9_X_COUNT)
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#define bfin_write_DMA9_X_COUNT(val) bfin_write16(DMA9_X_COUNT, val)
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#define bfin_read_DMA9_X_MODIFY() bfin_read16(DMA9_X_MODIFY)
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#define bfin_write_DMA9_X_MODIFY(val) bfin_write16(DMA9_X_MODIFY, val)
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#define bfin_read_DMA9_Y_COUNT() bfin_read16(DMA9_Y_COUNT)
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#define bfin_write_DMA9_Y_COUNT(val) bfin_write16(DMA9_Y_COUNT, val)
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#define bfin_read_DMA9_Y_MODIFY() bfin_read16(DMA9_Y_MODIFY)
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#define bfin_write_DMA9_Y_MODIFY(val) bfin_write16(DMA9_Y_MODIFY, val)
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#define bfin_read_DMA9_CURR_DESC_PTR() bfin_read32(DMA9_CURR_DESC_PTR)
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#define bfin_write_DMA9_CURR_DESC_PTR(val) bfin_write32(DMA9_CURR_DESC_PTR, val)
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#define bfin_read_DMA9_CURR_ADDR() bfin_read32(DMA9_CURR_ADDR)
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#define bfin_write_DMA9_CURR_ADDR(val) bfin_write32(DMA9_CURR_ADDR, val)
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#define bfin_read_DMA9_IRQ_STATUS() bfin_read16(DMA9_IRQ_STATUS)
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#define bfin_write_DMA9_IRQ_STATUS(val) bfin_write16(DMA9_IRQ_STATUS, val)
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#define bfin_read_DMA9_PERIPHERAL_MAP() bfin_read16(DMA9_PERIPHERAL_MAP)
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|
#define bfin_write_DMA9_PERIPHERAL_MAP(val) bfin_write16(DMA9_PERIPHERAL_MAP, val)
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|
#define bfin_read_DMA9_CURR_X_COUNT() bfin_read16(DMA9_CURR_X_COUNT)
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#define bfin_write_DMA9_CURR_X_COUNT(val) bfin_write16(DMA9_CURR_X_COUNT, val)
|
|
#define bfin_read_DMA9_CURR_Y_COUNT() bfin_read16(DMA9_CURR_Y_COUNT)
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#define bfin_write_DMA9_CURR_Y_COUNT(val) bfin_write16(DMA9_CURR_Y_COUNT, val)
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|
|
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/* DMA Channel 10 Registers */
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|
|
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#define bfin_read_DMA10_NEXT_DESC_PTR() bfin_read32(DMA10_NEXT_DESC_PTR)
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|
#define bfin_write_DMA10_NEXT_DESC_PTR(val) bfin_write32(DMA10_NEXT_DESC_PTR, val)
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#define bfin_read_DMA10_START_ADDR() bfin_read32(DMA10_START_ADDR)
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#define bfin_write_DMA10_START_ADDR(val) bfin_write32(DMA10_START_ADDR, val)
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#define bfin_read_DMA10_CONFIG() bfin_read16(DMA10_CONFIG)
|
|
#define bfin_write_DMA10_CONFIG(val) bfin_write16(DMA10_CONFIG, val)
|
|
#define bfin_read_DMA10_X_COUNT() bfin_read16(DMA10_X_COUNT)
|
|
#define bfin_write_DMA10_X_COUNT(val) bfin_write16(DMA10_X_COUNT, val)
|
|
#define bfin_read_DMA10_X_MODIFY() bfin_read16(DMA10_X_MODIFY)
|
|
#define bfin_write_DMA10_X_MODIFY(val) bfin_write16(DMA10_X_MODIFY, val)
|
|
#define bfin_read_DMA10_Y_COUNT() bfin_read16(DMA10_Y_COUNT)
|
|
#define bfin_write_DMA10_Y_COUNT(val) bfin_write16(DMA10_Y_COUNT, val)
|
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#define bfin_read_DMA10_Y_MODIFY() bfin_read16(DMA10_Y_MODIFY)
|
|
#define bfin_write_DMA10_Y_MODIFY(val) bfin_write16(DMA10_Y_MODIFY, val)
|
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#define bfin_read_DMA10_CURR_DESC_PTR() bfin_read32(DMA10_CURR_DESC_PTR)
|
|
#define bfin_write_DMA10_CURR_DESC_PTR(val) bfin_write32(DMA10_CURR_DESC_PTR, val)
|
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#define bfin_read_DMA10_CURR_ADDR() bfin_read32(DMA10_CURR_ADDR)
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|
#define bfin_write_DMA10_CURR_ADDR(val) bfin_write32(DMA10_CURR_ADDR, val)
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|
#define bfin_read_DMA10_IRQ_STATUS() bfin_read16(DMA10_IRQ_STATUS)
|
|
#define bfin_write_DMA10_IRQ_STATUS(val) bfin_write16(DMA10_IRQ_STATUS, val)
|
|
#define bfin_read_DMA10_PERIPHERAL_MAP() bfin_read16(DMA10_PERIPHERAL_MAP)
|
|
#define bfin_write_DMA10_PERIPHERAL_MAP(val) bfin_write16(DMA10_PERIPHERAL_MAP, val)
|
|
#define bfin_read_DMA10_CURR_X_COUNT() bfin_read16(DMA10_CURR_X_COUNT)
|
|
#define bfin_write_DMA10_CURR_X_COUNT(val) bfin_write16(DMA10_CURR_X_COUNT, val)
|
|
#define bfin_read_DMA10_CURR_Y_COUNT() bfin_read16(DMA10_CURR_Y_COUNT)
|
|
#define bfin_write_DMA10_CURR_Y_COUNT(val) bfin_write16(DMA10_CURR_Y_COUNT, val)
|
|
|
|
/* DMA Channel 11 Registers */
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|
|
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#define bfin_read_DMA11_NEXT_DESC_PTR() bfin_read32(DMA11_NEXT_DESC_PTR)
|
|
#define bfin_write_DMA11_NEXT_DESC_PTR(val) bfin_write32(DMA11_NEXT_DESC_PTR, val)
|
|
#define bfin_read_DMA11_START_ADDR() bfin_read32(DMA11_START_ADDR)
|
|
#define bfin_write_DMA11_START_ADDR(val) bfin_write32(DMA11_START_ADDR, val)
|
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#define bfin_read_DMA11_CONFIG() bfin_read16(DMA11_CONFIG)
|
|
#define bfin_write_DMA11_CONFIG(val) bfin_write16(DMA11_CONFIG, val)
|
|
#define bfin_read_DMA11_X_COUNT() bfin_read16(DMA11_X_COUNT)
|
|
#define bfin_write_DMA11_X_COUNT(val) bfin_write16(DMA11_X_COUNT, val)
|
|
#define bfin_read_DMA11_X_MODIFY() bfin_read16(DMA11_X_MODIFY)
|
|
#define bfin_write_DMA11_X_MODIFY(val) bfin_write16(DMA11_X_MODIFY, val)
|
|
#define bfin_read_DMA11_Y_COUNT() bfin_read16(DMA11_Y_COUNT)
|
|
#define bfin_write_DMA11_Y_COUNT(val) bfin_write16(DMA11_Y_COUNT, val)
|
|
#define bfin_read_DMA11_Y_MODIFY() bfin_read16(DMA11_Y_MODIFY)
|
|
#define bfin_write_DMA11_Y_MODIFY(val) bfin_write16(DMA11_Y_MODIFY, val)
|
|
#define bfin_read_DMA11_CURR_DESC_PTR() bfin_read32(DMA11_CURR_DESC_PTR)
|
|
#define bfin_write_DMA11_CURR_DESC_PTR(val) bfin_write32(DMA11_CURR_DESC_PTR, val)
|
|
#define bfin_read_DMA11_CURR_ADDR() bfin_read32(DMA11_CURR_ADDR)
|
|
#define bfin_write_DMA11_CURR_ADDR(val) bfin_write32(DMA11_CURR_ADDR, val)
|
|
#define bfin_read_DMA11_IRQ_STATUS() bfin_read16(DMA11_IRQ_STATUS)
|
|
#define bfin_write_DMA11_IRQ_STATUS(val) bfin_write16(DMA11_IRQ_STATUS, val)
|
|
#define bfin_read_DMA11_PERIPHERAL_MAP() bfin_read16(DMA11_PERIPHERAL_MAP)
|
|
#define bfin_write_DMA11_PERIPHERAL_MAP(val) bfin_write16(DMA11_PERIPHERAL_MAP, val)
|
|
#define bfin_read_DMA11_CURR_X_COUNT() bfin_read16(DMA11_CURR_X_COUNT)
|
|
#define bfin_write_DMA11_CURR_X_COUNT(val) bfin_write16(DMA11_CURR_X_COUNT, val)
|
|
#define bfin_read_DMA11_CURR_Y_COUNT() bfin_read16(DMA11_CURR_Y_COUNT)
|
|
#define bfin_write_DMA11_CURR_Y_COUNT(val) bfin_write16(DMA11_CURR_Y_COUNT, val)
|
|
|
|
/* MDMA Stream 0 Registers */
|
|
|
|
#define bfin_read_MDMA_D0_NEXT_DESC_PTR() bfin_read32(MDMA_D0_NEXT_DESC_PTR)
|
|
#define bfin_write_MDMA_D0_NEXT_DESC_PTR(val) bfin_write32(MDMA_D0_NEXT_DESC_PTR, val)
|
|
#define bfin_read_MDMA_D0_START_ADDR() bfin_read32(MDMA_D0_START_ADDR)
|
|
#define bfin_write_MDMA_D0_START_ADDR(val) bfin_write32(MDMA_D0_START_ADDR, val)
|
|
#define bfin_read_MDMA_D0_CONFIG() bfin_read16(MDMA_D0_CONFIG)
|
|
#define bfin_write_MDMA_D0_CONFIG(val) bfin_write16(MDMA_D0_CONFIG, val)
|
|
#define bfin_read_MDMA_D0_X_COUNT() bfin_read16(MDMA_D0_X_COUNT)
|
|
#define bfin_write_MDMA_D0_X_COUNT(val) bfin_write16(MDMA_D0_X_COUNT, val)
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#define bfin_read_MDMA_D0_X_MODIFY() bfin_read16(MDMA_D0_X_MODIFY)
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#define bfin_write_MDMA_D0_X_MODIFY(val) bfin_write16(MDMA_D0_X_MODIFY, val)
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#define bfin_read_MDMA_D0_Y_COUNT() bfin_read16(MDMA_D0_Y_COUNT)
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#define bfin_write_MDMA_D0_Y_COUNT(val) bfin_write16(MDMA_D0_Y_COUNT, val)
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#define bfin_read_MDMA_D0_Y_MODIFY() bfin_read16(MDMA_D0_Y_MODIFY)
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#define bfin_write_MDMA_D0_Y_MODIFY(val) bfin_write16(MDMA_D0_Y_MODIFY, val)
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#define bfin_read_MDMA_D0_CURR_DESC_PTR() bfin_read32(MDMA_D0_CURR_DESC_PTR)
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#define bfin_write_MDMA_D0_CURR_DESC_PTR(val) bfin_write32(MDMA_D0_CURR_DESC_PTR, val)
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#define bfin_read_MDMA_D0_CURR_ADDR() bfin_read32(MDMA_D0_CURR_ADDR)
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#define bfin_write_MDMA_D0_CURR_ADDR(val) bfin_write32(MDMA_D0_CURR_ADDR, val)
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#define bfin_read_MDMA_D0_IRQ_STATUS() bfin_read16(MDMA_D0_IRQ_STATUS)
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#define bfin_write_MDMA_D0_IRQ_STATUS(val) bfin_write16(MDMA_D0_IRQ_STATUS, val)
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#define bfin_read_MDMA_D0_PERIPHERAL_MAP() bfin_read16(MDMA_D0_PERIPHERAL_MAP)
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#define bfin_write_MDMA_D0_PERIPHERAL_MAP(val) bfin_write16(MDMA_D0_PERIPHERAL_MAP, val)
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#define bfin_read_MDMA_D0_CURR_X_COUNT() bfin_read16(MDMA_D0_CURR_X_COUNT)
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#define bfin_write_MDMA_D0_CURR_X_COUNT(val) bfin_write16(MDMA_D0_CURR_X_COUNT, val)
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#define bfin_read_MDMA_D0_CURR_Y_COUNT() bfin_read16(MDMA_D0_CURR_Y_COUNT)
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#define bfin_write_MDMA_D0_CURR_Y_COUNT(val) bfin_write16(MDMA_D0_CURR_Y_COUNT, val)
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#define bfin_read_MDMA_S0_NEXT_DESC_PTR() bfin_read32(MDMA_S0_NEXT_DESC_PTR)
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#define bfin_write_MDMA_S0_NEXT_DESC_PTR(val) bfin_write32(MDMA_S0_NEXT_DESC_PTR, val)
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#define bfin_read_MDMA_S0_START_ADDR() bfin_read32(MDMA_S0_START_ADDR)
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#define bfin_write_MDMA_S0_START_ADDR(val) bfin_write32(MDMA_S0_START_ADDR, val)
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#define bfin_read_MDMA_S0_CONFIG() bfin_read16(MDMA_S0_CONFIG)
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#define bfin_write_MDMA_S0_CONFIG(val) bfin_write16(MDMA_S0_CONFIG, val)
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#define bfin_read_MDMA_S0_X_COUNT() bfin_read16(MDMA_S0_X_COUNT)
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#define bfin_write_MDMA_S0_X_COUNT(val) bfin_write16(MDMA_S0_X_COUNT, val)
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#define bfin_read_MDMA_S0_X_MODIFY() bfin_read16(MDMA_S0_X_MODIFY)
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#define bfin_write_MDMA_S0_X_MODIFY(val) bfin_write16(MDMA_S0_X_MODIFY, val)
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#define bfin_read_MDMA_S0_Y_COUNT() bfin_read16(MDMA_S0_Y_COUNT)
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#define bfin_write_MDMA_S0_Y_COUNT(val) bfin_write16(MDMA_S0_Y_COUNT, val)
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#define bfin_read_MDMA_S0_Y_MODIFY() bfin_read16(MDMA_S0_Y_MODIFY)
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#define bfin_write_MDMA_S0_Y_MODIFY(val) bfin_write16(MDMA_S0_Y_MODIFY, val)
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#define bfin_read_MDMA_S0_CURR_DESC_PTR() bfin_read32(MDMA_S0_CURR_DESC_PTR)
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#define bfin_write_MDMA_S0_CURR_DESC_PTR(val) bfin_write32(MDMA_S0_CURR_DESC_PTR, val)
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#define bfin_read_MDMA_S0_CURR_ADDR() bfin_read32(MDMA_S0_CURR_ADDR)
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#define bfin_write_MDMA_S0_CURR_ADDR(val) bfin_write32(MDMA_S0_CURR_ADDR, val)
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#define bfin_read_MDMA_S0_IRQ_STATUS() bfin_read16(MDMA_S0_IRQ_STATUS)
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#define bfin_write_MDMA_S0_IRQ_STATUS(val) bfin_write16(MDMA_S0_IRQ_STATUS, val)
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#define bfin_read_MDMA_S0_PERIPHERAL_MAP() bfin_read16(MDMA_S0_PERIPHERAL_MAP)
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#define bfin_write_MDMA_S0_PERIPHERAL_MAP(val) bfin_write16(MDMA_S0_PERIPHERAL_MAP, val)
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#define bfin_read_MDMA_S0_CURR_X_COUNT() bfin_read16(MDMA_S0_CURR_X_COUNT)
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#define bfin_write_MDMA_S0_CURR_X_COUNT(val) bfin_write16(MDMA_S0_CURR_X_COUNT, val)
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#define bfin_read_MDMA_S0_CURR_Y_COUNT() bfin_read16(MDMA_S0_CURR_Y_COUNT)
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#define bfin_write_MDMA_S0_CURR_Y_COUNT(val) bfin_write16(MDMA_S0_CURR_Y_COUNT, val)
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/* MDMA Stream 1 Registers */
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#define bfin_read_MDMA_D1_NEXT_DESC_PTR() bfin_read32(MDMA_D1_NEXT_DESC_PTR)
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#define bfin_write_MDMA_D1_NEXT_DESC_PTR(val) bfin_write32(MDMA_D1_NEXT_DESC_PTR, val)
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#define bfin_read_MDMA_D1_START_ADDR() bfin_read32(MDMA_D1_START_ADDR)
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#define bfin_write_MDMA_D1_START_ADDR(val) bfin_write32(MDMA_D1_START_ADDR, val)
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#define bfin_read_MDMA_D1_CONFIG() bfin_read16(MDMA_D1_CONFIG)
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#define bfin_write_MDMA_D1_CONFIG(val) bfin_write16(MDMA_D1_CONFIG, val)
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#define bfin_read_MDMA_D1_X_COUNT() bfin_read16(MDMA_D1_X_COUNT)
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#define bfin_write_MDMA_D1_X_COUNT(val) bfin_write16(MDMA_D1_X_COUNT, val)
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#define bfin_read_MDMA_D1_X_MODIFY() bfin_read16(MDMA_D1_X_MODIFY)
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#define bfin_write_MDMA_D1_X_MODIFY(val) bfin_write16(MDMA_D1_X_MODIFY, val)
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#define bfin_read_MDMA_D1_Y_COUNT() bfin_read16(MDMA_D1_Y_COUNT)
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#define bfin_write_MDMA_D1_Y_COUNT(val) bfin_write16(MDMA_D1_Y_COUNT, val)
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#define bfin_read_MDMA_D1_Y_MODIFY() bfin_read16(MDMA_D1_Y_MODIFY)
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#define bfin_write_MDMA_D1_Y_MODIFY(val) bfin_write16(MDMA_D1_Y_MODIFY, val)
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#define bfin_read_MDMA_D1_CURR_DESC_PTR() bfin_read32(MDMA_D1_CURR_DESC_PTR)
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#define bfin_write_MDMA_D1_CURR_DESC_PTR(val) bfin_write32(MDMA_D1_CURR_DESC_PTR, val)
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#define bfin_read_MDMA_D1_CURR_ADDR() bfin_read32(MDMA_D1_CURR_ADDR)
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#define bfin_write_MDMA_D1_CURR_ADDR(val) bfin_write32(MDMA_D1_CURR_ADDR, val)
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#define bfin_read_MDMA_D1_IRQ_STATUS() bfin_read16(MDMA_D1_IRQ_STATUS)
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#define bfin_write_MDMA_D1_IRQ_STATUS(val) bfin_write16(MDMA_D1_IRQ_STATUS, val)
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#define bfin_read_MDMA_D1_PERIPHERAL_MAP() bfin_read16(MDMA_D1_PERIPHERAL_MAP)
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#define bfin_write_MDMA_D1_PERIPHERAL_MAP(val) bfin_write16(MDMA_D1_PERIPHERAL_MAP, val)
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#define bfin_read_MDMA_D1_CURR_X_COUNT() bfin_read16(MDMA_D1_CURR_X_COUNT)
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#define bfin_write_MDMA_D1_CURR_X_COUNT(val) bfin_write16(MDMA_D1_CURR_X_COUNT, val)
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#define bfin_read_MDMA_D1_CURR_Y_COUNT() bfin_read16(MDMA_D1_CURR_Y_COUNT)
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#define bfin_write_MDMA_D1_CURR_Y_COUNT(val) bfin_write16(MDMA_D1_CURR_Y_COUNT, val)
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#define bfin_read_MDMA_S1_NEXT_DESC_PTR() bfin_read32(MDMA_S1_NEXT_DESC_PTR)
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#define bfin_write_MDMA_S1_NEXT_DESC_PTR(val) bfin_write32(MDMA_S1_NEXT_DESC_PTR, val)
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#define bfin_read_MDMA_S1_START_ADDR() bfin_read32(MDMA_S1_START_ADDR)
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#define bfin_write_MDMA_S1_START_ADDR(val) bfin_write32(MDMA_S1_START_ADDR, val)
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#define bfin_read_MDMA_S1_CONFIG() bfin_read16(MDMA_S1_CONFIG)
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#define bfin_write_MDMA_S1_CONFIG(val) bfin_write16(MDMA_S1_CONFIG, val)
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#define bfin_read_MDMA_S1_X_COUNT() bfin_read16(MDMA_S1_X_COUNT)
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#define bfin_write_MDMA_S1_X_COUNT(val) bfin_write16(MDMA_S1_X_COUNT, val)
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#define bfin_read_MDMA_S1_X_MODIFY() bfin_read16(MDMA_S1_X_MODIFY)
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#define bfin_write_MDMA_S1_X_MODIFY(val) bfin_write16(MDMA_S1_X_MODIFY, val)
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#define bfin_read_MDMA_S1_Y_COUNT() bfin_read16(MDMA_S1_Y_COUNT)
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#define bfin_write_MDMA_S1_Y_COUNT(val) bfin_write16(MDMA_S1_Y_COUNT, val)
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#define bfin_read_MDMA_S1_Y_MODIFY() bfin_read16(MDMA_S1_Y_MODIFY)
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#define bfin_write_MDMA_S1_Y_MODIFY(val) bfin_write16(MDMA_S1_Y_MODIFY, val)
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#define bfin_read_MDMA_S1_CURR_DESC_PTR() bfin_read32(MDMA_S1_CURR_DESC_PTR)
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#define bfin_write_MDMA_S1_CURR_DESC_PTR(val) bfin_write32(MDMA_S1_CURR_DESC_PTR, val)
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#define bfin_read_MDMA_S1_CURR_ADDR() bfin_read32(MDMA_S1_CURR_ADDR)
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#define bfin_write_MDMA_S1_CURR_ADDR(val) bfin_write32(MDMA_S1_CURR_ADDR, val)
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#define bfin_read_MDMA_S1_IRQ_STATUS() bfin_read16(MDMA_S1_IRQ_STATUS)
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#define bfin_write_MDMA_S1_IRQ_STATUS(val) bfin_write16(MDMA_S1_IRQ_STATUS, val)
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#define bfin_read_MDMA_S1_PERIPHERAL_MAP() bfin_read16(MDMA_S1_PERIPHERAL_MAP)
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#define bfin_write_MDMA_S1_PERIPHERAL_MAP(val) bfin_write16(MDMA_S1_PERIPHERAL_MAP, val)
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#define bfin_read_MDMA_S1_CURR_X_COUNT() bfin_read16(MDMA_S1_CURR_X_COUNT)
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#define bfin_write_MDMA_S1_CURR_X_COUNT(val) bfin_write16(MDMA_S1_CURR_X_COUNT, val)
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#define bfin_read_MDMA_S1_CURR_Y_COUNT() bfin_read16(MDMA_S1_CURR_Y_COUNT)
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#define bfin_write_MDMA_S1_CURR_Y_COUNT(val) bfin_write16(MDMA_S1_CURR_Y_COUNT, val)
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/* EPPI1 Registers */
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#define bfin_read_EPPI1_STATUS() bfin_read16(EPPI1_STATUS)
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#define bfin_write_EPPI1_STATUS(val) bfin_write16(EPPI1_STATUS, val)
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#define bfin_read_EPPI1_HCOUNT() bfin_read16(EPPI1_HCOUNT)
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#define bfin_write_EPPI1_HCOUNT(val) bfin_write16(EPPI1_HCOUNT, val)
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#define bfin_read_EPPI1_HDELAY() bfin_read16(EPPI1_HDELAY)
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#define bfin_write_EPPI1_HDELAY(val) bfin_write16(EPPI1_HDELAY, val)
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#define bfin_read_EPPI1_VCOUNT() bfin_read16(EPPI1_VCOUNT)
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#define bfin_write_EPPI1_VCOUNT(val) bfin_write16(EPPI1_VCOUNT, val)
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#define bfin_read_EPPI1_VDELAY() bfin_read16(EPPI1_VDELAY)
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#define bfin_write_EPPI1_VDELAY(val) bfin_write16(EPPI1_VDELAY, val)
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#define bfin_read_EPPI1_FRAME() bfin_read16(EPPI1_FRAME)
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#define bfin_write_EPPI1_FRAME(val) bfin_write16(EPPI1_FRAME, val)
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#define bfin_read_EPPI1_LINE() bfin_read16(EPPI1_LINE)
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#define bfin_write_EPPI1_LINE(val) bfin_write16(EPPI1_LINE, val)
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#define bfin_read_EPPI1_CLKDIV() bfin_read16(EPPI1_CLKDIV)
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#define bfin_write_EPPI1_CLKDIV(val) bfin_write16(EPPI1_CLKDIV, val)
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#define bfin_read_EPPI1_CONTROL() bfin_read32(EPPI1_CONTROL)
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#define bfin_write_EPPI1_CONTROL(val) bfin_write32(EPPI1_CONTROL, val)
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#define bfin_read_EPPI1_FS1W_HBL() bfin_read32(EPPI1_FS1W_HBL)
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#define bfin_write_EPPI1_FS1W_HBL(val) bfin_write32(EPPI1_FS1W_HBL, val)
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#define bfin_read_EPPI1_FS1P_AVPL() bfin_read32(EPPI1_FS1P_AVPL)
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#define bfin_write_EPPI1_FS1P_AVPL(val) bfin_write32(EPPI1_FS1P_AVPL, val)
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#define bfin_read_EPPI1_FS2W_LVB() bfin_read32(EPPI1_FS2W_LVB)
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#define bfin_write_EPPI1_FS2W_LVB(val) bfin_write32(EPPI1_FS2W_LVB, val)
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#define bfin_read_EPPI1_FS2P_LAVF() bfin_read32(EPPI1_FS2P_LAVF)
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#define bfin_write_EPPI1_FS2P_LAVF(val) bfin_write32(EPPI1_FS2P_LAVF, val)
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#define bfin_read_EPPI1_CLIP() bfin_read32(EPPI1_CLIP)
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#define bfin_write_EPPI1_CLIP(val) bfin_write32(EPPI1_CLIP, val)
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/* Port Interrubfin_read_()t 0 Registers (32-bit) */
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#define bfin_read_PINT0_MASK_SET() bfin_read32(PINT0_MASK_SET)
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#define bfin_write_PINT0_MASK_SET(val) bfin_write32(PINT0_MASK_SET, val)
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#define bfin_read_PINT0_MASK_CLEAR() bfin_read32(PINT0_MASK_CLEAR)
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#define bfin_write_PINT0_MASK_CLEAR(val) bfin_write32(PINT0_MASK_CLEAR, val)
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#define bfin_read_PINT0_REQUEST() bfin_read32(PINT0_REQUEST)
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#define bfin_write_PINT0_REQUEST(val) bfin_write32(PINT0_REQUEST, val)
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#define bfin_read_PINT0_ASSIGN() bfin_read32(PINT0_ASSIGN)
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#define bfin_write_PINT0_ASSIGN(val) bfin_write32(PINT0_ASSIGN, val)
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#define bfin_read_PINT0_EDGE_SET() bfin_read32(PINT0_EDGE_SET)
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#define bfin_write_PINT0_EDGE_SET(val) bfin_write32(PINT0_EDGE_SET, val)
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#define bfin_read_PINT0_EDGE_CLEAR() bfin_read32(PINT0_EDGE_CLEAR)
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#define bfin_write_PINT0_EDGE_CLEAR(val) bfin_write32(PINT0_EDGE_CLEAR, val)
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#define bfin_read_PINT0_INVERT_SET() bfin_read32(PINT0_INVERT_SET)
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#define bfin_write_PINT0_INVERT_SET(val) bfin_write32(PINT0_INVERT_SET, val)
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#define bfin_read_PINT0_INVERT_CLEAR() bfin_read32(PINT0_INVERT_CLEAR)
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#define bfin_write_PINT0_INVERT_CLEAR(val) bfin_write32(PINT0_INVERT_CLEAR, val)
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#define bfin_read_PINT0_PINSTATE() bfin_read32(PINT0_PINSTATE)
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#define bfin_write_PINT0_PINSTATE(val) bfin_write32(PINT0_PINSTATE, val)
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#define bfin_read_PINT0_LATCH() bfin_read32(PINT0_LATCH)
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#define bfin_write_PINT0_LATCH(val) bfin_write32(PINT0_LATCH, val)
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/* Port Interrubfin_read_()t 1 Registers (32-bit) */
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#define bfin_read_PINT1_MASK_SET() bfin_read32(PINT1_MASK_SET)
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#define bfin_write_PINT1_MASK_SET(val) bfin_write32(PINT1_MASK_SET, val)
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#define bfin_read_PINT1_MASK_CLEAR() bfin_read32(PINT1_MASK_CLEAR)
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#define bfin_write_PINT1_MASK_CLEAR(val) bfin_write32(PINT1_MASK_CLEAR, val)
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#define bfin_read_PINT1_REQUEST() bfin_read32(PINT1_REQUEST)
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#define bfin_write_PINT1_REQUEST(val) bfin_write32(PINT1_REQUEST, val)
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#define bfin_read_PINT1_ASSIGN() bfin_read32(PINT1_ASSIGN)
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#define bfin_write_PINT1_ASSIGN(val) bfin_write32(PINT1_ASSIGN, val)
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#define bfin_read_PINT1_EDGE_SET() bfin_read32(PINT1_EDGE_SET)
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#define bfin_write_PINT1_EDGE_SET(val) bfin_write32(PINT1_EDGE_SET, val)
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#define bfin_read_PINT1_EDGE_CLEAR() bfin_read32(PINT1_EDGE_CLEAR)
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#define bfin_write_PINT1_EDGE_CLEAR(val) bfin_write32(PINT1_EDGE_CLEAR, val)
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#define bfin_read_PINT1_INVERT_SET() bfin_read32(PINT1_INVERT_SET)
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#define bfin_write_PINT1_INVERT_SET(val) bfin_write32(PINT1_INVERT_SET, val)
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#define bfin_read_PINT1_INVERT_CLEAR() bfin_read32(PINT1_INVERT_CLEAR)
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#define bfin_write_PINT1_INVERT_CLEAR(val) bfin_write32(PINT1_INVERT_CLEAR, val)
|
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#define bfin_read_PINT1_PINSTATE() bfin_read32(PINT1_PINSTATE)
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#define bfin_write_PINT1_PINSTATE(val) bfin_write32(PINT1_PINSTATE, val)
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#define bfin_read_PINT1_LATCH() bfin_read32(PINT1_LATCH)
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#define bfin_write_PINT1_LATCH(val) bfin_write32(PINT1_LATCH, val)
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|
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/* Port Interrubfin_read_()t 2 Registers (32-bit) */
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#define bfin_read_PINT2_MASK_SET() bfin_read32(PINT2_MASK_SET)
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#define bfin_write_PINT2_MASK_SET(val) bfin_write32(PINT2_MASK_SET, val)
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#define bfin_read_PINT2_MASK_CLEAR() bfin_read32(PINT2_MASK_CLEAR)
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#define bfin_write_PINT2_MASK_CLEAR(val) bfin_write32(PINT2_MASK_CLEAR, val)
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#define bfin_read_PINT2_REQUEST() bfin_read32(PINT2_REQUEST)
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#define bfin_write_PINT2_REQUEST(val) bfin_write32(PINT2_REQUEST, val)
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#define bfin_read_PINT2_ASSIGN() bfin_read32(PINT2_ASSIGN)
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#define bfin_write_PINT2_ASSIGN(val) bfin_write32(PINT2_ASSIGN, val)
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#define bfin_read_PINT2_EDGE_SET() bfin_read32(PINT2_EDGE_SET)
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#define bfin_write_PINT2_EDGE_SET(val) bfin_write32(PINT2_EDGE_SET, val)
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#define bfin_read_PINT2_EDGE_CLEAR() bfin_read32(PINT2_EDGE_CLEAR)
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#define bfin_write_PINT2_EDGE_CLEAR(val) bfin_write32(PINT2_EDGE_CLEAR, val)
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#define bfin_read_PINT2_INVERT_SET() bfin_read32(PINT2_INVERT_SET)
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#define bfin_write_PINT2_INVERT_SET(val) bfin_write32(PINT2_INVERT_SET, val)
|
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#define bfin_read_PINT2_INVERT_CLEAR() bfin_read32(PINT2_INVERT_CLEAR)
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#define bfin_write_PINT2_INVERT_CLEAR(val) bfin_write32(PINT2_INVERT_CLEAR, val)
|
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#define bfin_read_PINT2_PINSTATE() bfin_read32(PINT2_PINSTATE)
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#define bfin_write_PINT2_PINSTATE(val) bfin_write32(PINT2_PINSTATE, val)
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#define bfin_read_PINT2_LATCH() bfin_read32(PINT2_LATCH)
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#define bfin_write_PINT2_LATCH(val) bfin_write32(PINT2_LATCH, val)
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/* Port Interrubfin_read_()t 3 Registers (32-bit) */
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#define bfin_read_PINT3_MASK_SET() bfin_read32(PINT3_MASK_SET)
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#define bfin_write_PINT3_MASK_SET(val) bfin_write32(PINT3_MASK_SET, val)
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#define bfin_read_PINT3_MASK_CLEAR() bfin_read32(PINT3_MASK_CLEAR)
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|
#define bfin_write_PINT3_MASK_CLEAR(val) bfin_write32(PINT3_MASK_CLEAR, val)
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|
#define bfin_read_PINT3_REQUEST() bfin_read32(PINT3_REQUEST)
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|
#define bfin_write_PINT3_REQUEST(val) bfin_write32(PINT3_REQUEST, val)
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|
#define bfin_read_PINT3_ASSIGN() bfin_read32(PINT3_ASSIGN)
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|
#define bfin_write_PINT3_ASSIGN(val) bfin_write32(PINT3_ASSIGN, val)
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|
#define bfin_read_PINT3_EDGE_SET() bfin_read32(PINT3_EDGE_SET)
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|
#define bfin_write_PINT3_EDGE_SET(val) bfin_write32(PINT3_EDGE_SET, val)
|
|
#define bfin_read_PINT3_EDGE_CLEAR() bfin_read32(PINT3_EDGE_CLEAR)
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|
#define bfin_write_PINT3_EDGE_CLEAR(val) bfin_write32(PINT3_EDGE_CLEAR, val)
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|
#define bfin_read_PINT3_INVERT_SET() bfin_read32(PINT3_INVERT_SET)
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|
#define bfin_write_PINT3_INVERT_SET(val) bfin_write32(PINT3_INVERT_SET, val)
|
|
#define bfin_read_PINT3_INVERT_CLEAR() bfin_read32(PINT3_INVERT_CLEAR)
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|
#define bfin_write_PINT3_INVERT_CLEAR(val) bfin_write32(PINT3_INVERT_CLEAR, val)
|
|
#define bfin_read_PINT3_PINSTATE() bfin_read32(PINT3_PINSTATE)
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|
#define bfin_write_PINT3_PINSTATE(val) bfin_write32(PINT3_PINSTATE, val)
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|
#define bfin_read_PINT3_LATCH() bfin_read32(PINT3_LATCH)
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#define bfin_write_PINT3_LATCH(val) bfin_write32(PINT3_LATCH, val)
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|
|
|
/* Port A Registers */
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|
|
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#define bfin_read_PORTA_FER() bfin_read16(PORTA_FER)
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#define bfin_write_PORTA_FER(val) bfin_write16(PORTA_FER, val)
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#define bfin_read_PORTA() bfin_read16(PORTA)
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#define bfin_write_PORTA(val) bfin_write16(PORTA, val)
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#define bfin_read_PORTA_SET() bfin_read16(PORTA_SET)
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#define bfin_write_PORTA_SET(val) bfin_write16(PORTA_SET, val)
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|
#define bfin_read_PORTA_CLEAR() bfin_read16(PORTA_CLEAR)
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|
#define bfin_write_PORTA_CLEAR(val) bfin_write16(PORTA_CLEAR, val)
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|
#define bfin_read_PORTA_DIR_SET() bfin_read16(PORTA_DIR_SET)
|
|
#define bfin_write_PORTA_DIR_SET(val) bfin_write16(PORTA_DIR_SET, val)
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|
#define bfin_read_PORTA_DIR_CLEAR() bfin_read16(PORTA_DIR_CLEAR)
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|
#define bfin_write_PORTA_DIR_CLEAR(val) bfin_write16(PORTA_DIR_CLEAR, val)
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#define bfin_read_PORTA_INEN() bfin_read16(PORTA_INEN)
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|
#define bfin_write_PORTA_INEN(val) bfin_write16(PORTA_INEN, val)
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|
#define bfin_read_PORTA_MUX() bfin_read32(PORTA_MUX)
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|
#define bfin_write_PORTA_MUX(val) bfin_write32(PORTA_MUX, val)
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|
|
|
/* Port B Registers */
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|
|
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#define bfin_read_PORTB_FER() bfin_read16(PORTB_FER)
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|
#define bfin_write_PORTB_FER(val) bfin_write16(PORTB_FER, val)
|
|
#define bfin_read_PORTB() bfin_read16(PORTB)
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|
#define bfin_write_PORTB(val) bfin_write16(PORTB, val)
|
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#define bfin_read_PORTB_SET() bfin_read16(PORTB_SET)
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|
#define bfin_write_PORTB_SET(val) bfin_write16(PORTB_SET, val)
|
|
#define bfin_read_PORTB_CLEAR() bfin_read16(PORTB_CLEAR)
|
|
#define bfin_write_PORTB_CLEAR(val) bfin_write16(PORTB_CLEAR, val)
|
|
#define bfin_read_PORTB_DIR_SET() bfin_read16(PORTB_DIR_SET)
|
|
#define bfin_write_PORTB_DIR_SET(val) bfin_write16(PORTB_DIR_SET, val)
|
|
#define bfin_read_PORTB_DIR_CLEAR() bfin_read16(PORTB_DIR_CLEAR)
|
|
#define bfin_write_PORTB_DIR_CLEAR(val) bfin_write16(PORTB_DIR_CLEAR, val)
|
|
#define bfin_read_PORTB_INEN() bfin_read16(PORTB_INEN)
|
|
#define bfin_write_PORTB_INEN(val) bfin_write16(PORTB_INEN, val)
|
|
#define bfin_read_PORTB_MUX() bfin_read32(PORTB_MUX)
|
|
#define bfin_write_PORTB_MUX(val) bfin_write32(PORTB_MUX, val)
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|
|
|
/* Port C Registers */
|
|
|
|
#define bfin_read_PORTC_FER() bfin_read16(PORTC_FER)
|
|
#define bfin_write_PORTC_FER(val) bfin_write16(PORTC_FER, val)
|
|
#define bfin_read_PORTC() bfin_read16(PORTC)
|
|
#define bfin_write_PORTC(val) bfin_write16(PORTC, val)
|
|
#define bfin_read_PORTC_SET() bfin_read16(PORTC_SET)
|
|
#define bfin_write_PORTC_SET(val) bfin_write16(PORTC_SET, val)
|
|
#define bfin_read_PORTC_CLEAR() bfin_read16(PORTC_CLEAR)
|
|
#define bfin_write_PORTC_CLEAR(val) bfin_write16(PORTC_CLEAR, val)
|
|
#define bfin_read_PORTC_DIR_SET() bfin_read16(PORTC_DIR_SET)
|
|
#define bfin_write_PORTC_DIR_SET(val) bfin_write16(PORTC_DIR_SET, val)
|
|
#define bfin_read_PORTC_DIR_CLEAR() bfin_read16(PORTC_DIR_CLEAR)
|
|
#define bfin_write_PORTC_DIR_CLEAR(val) bfin_write16(PORTC_DIR_CLEAR, val)
|
|
#define bfin_read_PORTC_INEN() bfin_read16(PORTC_INEN)
|
|
#define bfin_write_PORTC_INEN(val) bfin_write16(PORTC_INEN, val)
|
|
#define bfin_read_PORTC_MUX() bfin_read32(PORTC_MUX)
|
|
#define bfin_write_PORTC_MUX(val) bfin_write32(PORTC_MUX, val)
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|
|
|
/* Port D Registers */
|
|
|
|
#define bfin_read_PORTD_FER() bfin_read16(PORTD_FER)
|
|
#define bfin_write_PORTD_FER(val) bfin_write16(PORTD_FER, val)
|
|
#define bfin_read_PORTD() bfin_read16(PORTD)
|
|
#define bfin_write_PORTD(val) bfin_write16(PORTD, val)
|
|
#define bfin_read_PORTD_SET() bfin_read16(PORTD_SET)
|
|
#define bfin_write_PORTD_SET(val) bfin_write16(PORTD_SET, val)
|
|
#define bfin_read_PORTD_CLEAR() bfin_read16(PORTD_CLEAR)
|
|
#define bfin_write_PORTD_CLEAR(val) bfin_write16(PORTD_CLEAR, val)
|
|
#define bfin_read_PORTD_DIR_SET() bfin_read16(PORTD_DIR_SET)
|
|
#define bfin_write_PORTD_DIR_SET(val) bfin_write16(PORTD_DIR_SET, val)
|
|
#define bfin_read_PORTD_DIR_CLEAR() bfin_read16(PORTD_DIR_CLEAR)
|
|
#define bfin_write_PORTD_DIR_CLEAR(val) bfin_write16(PORTD_DIR_CLEAR, val)
|
|
#define bfin_read_PORTD_INEN() bfin_read16(PORTD_INEN)
|
|
#define bfin_write_PORTD_INEN(val) bfin_write16(PORTD_INEN, val)
|
|
#define bfin_read_PORTD_MUX() bfin_read32(PORTD_MUX)
|
|
#define bfin_write_PORTD_MUX(val) bfin_write32(PORTD_MUX, val)
|
|
|
|
/* Port E Registers */
|
|
|
|
#define bfin_read_PORTE_FER() bfin_read16(PORTE_FER)
|
|
#define bfin_write_PORTE_FER(val) bfin_write16(PORTE_FER, val)
|
|
#define bfin_read_PORTE() bfin_read16(PORTE)
|
|
#define bfin_write_PORTE(val) bfin_write16(PORTE, val)
|
|
#define bfin_read_PORTE_SET() bfin_read16(PORTE_SET)
|
|
#define bfin_write_PORTE_SET(val) bfin_write16(PORTE_SET, val)
|
|
#define bfin_read_PORTE_CLEAR() bfin_read16(PORTE_CLEAR)
|
|
#define bfin_write_PORTE_CLEAR(val) bfin_write16(PORTE_CLEAR, val)
|
|
#define bfin_read_PORTE_DIR_SET() bfin_read16(PORTE_DIR_SET)
|
|
#define bfin_write_PORTE_DIR_SET(val) bfin_write16(PORTE_DIR_SET, val)
|
|
#define bfin_read_PORTE_DIR_CLEAR() bfin_read16(PORTE_DIR_CLEAR)
|
|
#define bfin_write_PORTE_DIR_CLEAR(val) bfin_write16(PORTE_DIR_CLEAR, val)
|
|
#define bfin_read_PORTE_INEN() bfin_read16(PORTE_INEN)
|
|
#define bfin_write_PORTE_INEN(val) bfin_write16(PORTE_INEN, val)
|
|
#define bfin_read_PORTE_MUX() bfin_read32(PORTE_MUX)
|
|
#define bfin_write_PORTE_MUX(val) bfin_write32(PORTE_MUX, val)
|
|
|
|
/* Port F Registers */
|
|
|
|
#define bfin_read_PORTF_FER() bfin_read16(PORTF_FER)
|
|
#define bfin_write_PORTF_FER(val) bfin_write16(PORTF_FER, val)
|
|
#define bfin_read_PORTF() bfin_read16(PORTF)
|
|
#define bfin_write_PORTF(val) bfin_write16(PORTF, val)
|
|
#define bfin_read_PORTF_SET() bfin_read16(PORTF_SET)
|
|
#define bfin_write_PORTF_SET(val) bfin_write16(PORTF_SET, val)
|
|
#define bfin_read_PORTF_CLEAR() bfin_read16(PORTF_CLEAR)
|
|
#define bfin_write_PORTF_CLEAR(val) bfin_write16(PORTF_CLEAR, val)
|
|
#define bfin_read_PORTF_DIR_SET() bfin_read16(PORTF_DIR_SET)
|
|
#define bfin_write_PORTF_DIR_SET(val) bfin_write16(PORTF_DIR_SET, val)
|
|
#define bfin_read_PORTF_DIR_CLEAR() bfin_read16(PORTF_DIR_CLEAR)
|
|
#define bfin_write_PORTF_DIR_CLEAR(val) bfin_write16(PORTF_DIR_CLEAR, val)
|
|
#define bfin_read_PORTF_INEN() bfin_read16(PORTF_INEN)
|
|
#define bfin_write_PORTF_INEN(val) bfin_write16(PORTF_INEN, val)
|
|
#define bfin_read_PORTF_MUX() bfin_read32(PORTF_MUX)
|
|
#define bfin_write_PORTF_MUX(val) bfin_write32(PORTF_MUX, val)
|
|
|
|
/* Port G Registers */
|
|
|
|
#define bfin_read_PORTG_FER() bfin_read16(PORTG_FER)
|
|
#define bfin_write_PORTG_FER(val) bfin_write16(PORTG_FER, val)
|
|
#define bfin_read_PORTG() bfin_read16(PORTG)
|
|
#define bfin_write_PORTG(val) bfin_write16(PORTG, val)
|
|
#define bfin_read_PORTG_SET() bfin_read16(PORTG_SET)
|
|
#define bfin_write_PORTG_SET(val) bfin_write16(PORTG_SET, val)
|
|
#define bfin_read_PORTG_CLEAR() bfin_read16(PORTG_CLEAR)
|
|
#define bfin_write_PORTG_CLEAR(val) bfin_write16(PORTG_CLEAR, val)
|
|
#define bfin_read_PORTG_DIR_SET() bfin_read16(PORTG_DIR_SET)
|
|
#define bfin_write_PORTG_DIR_SET(val) bfin_write16(PORTG_DIR_SET, val)
|
|
#define bfin_read_PORTG_DIR_CLEAR() bfin_read16(PORTG_DIR_CLEAR)
|
|
#define bfin_write_PORTG_DIR_CLEAR(val) bfin_write16(PORTG_DIR_CLEAR, val)
|
|
#define bfin_read_PORTG_INEN() bfin_read16(PORTG_INEN)
|
|
#define bfin_write_PORTG_INEN(val) bfin_write16(PORTG_INEN, val)
|
|
#define bfin_read_PORTG_MUX() bfin_read32(PORTG_MUX)
|
|
#define bfin_write_PORTG_MUX(val) bfin_write32(PORTG_MUX, val)
|
|
|
|
/* Port H Registers */
|
|
|
|
#define bfin_read_PORTH_FER() bfin_read16(PORTH_FER)
|
|
#define bfin_write_PORTH_FER(val) bfin_write16(PORTH_FER, val)
|
|
#define bfin_read_PORTH() bfin_read16(PORTH)
|
|
#define bfin_write_PORTH(val) bfin_write16(PORTH, val)
|
|
#define bfin_read_PORTH_SET() bfin_read16(PORTH_SET)
|
|
#define bfin_write_PORTH_SET(val) bfin_write16(PORTH_SET, val)
|
|
#define bfin_read_PORTH_CLEAR() bfin_read16(PORTH_CLEAR)
|
|
#define bfin_write_PORTH_CLEAR(val) bfin_write16(PORTH_CLEAR, val)
|
|
#define bfin_read_PORTH_DIR_SET() bfin_read16(PORTH_DIR_SET)
|
|
#define bfin_write_PORTH_DIR_SET(val) bfin_write16(PORTH_DIR_SET, val)
|
|
#define bfin_read_PORTH_DIR_CLEAR() bfin_read16(PORTH_DIR_CLEAR)
|
|
#define bfin_write_PORTH_DIR_CLEAR(val) bfin_write16(PORTH_DIR_CLEAR, val)
|
|
#define bfin_read_PORTH_INEN() bfin_read16(PORTH_INEN)
|
|
#define bfin_write_PORTH_INEN(val) bfin_write16(PORTH_INEN, val)
|
|
#define bfin_read_PORTH_MUX() bfin_read32(PORTH_MUX)
|
|
#define bfin_write_PORTH_MUX(val) bfin_write32(PORTH_MUX, val)
|
|
|
|
/* Port I Registers */
|
|
|
|
#define bfin_read_PORTI_FER() bfin_read16(PORTI_FER)
|
|
#define bfin_write_PORTI_FER(val) bfin_write16(PORTI_FER, val)
|
|
#define bfin_read_PORTI() bfin_read16(PORTI)
|
|
#define bfin_write_PORTI(val) bfin_write16(PORTI, val)
|
|
#define bfin_read_PORTI_SET() bfin_read16(PORTI_SET)
|
|
#define bfin_write_PORTI_SET(val) bfin_write16(PORTI_SET, val)
|
|
#define bfin_read_PORTI_CLEAR() bfin_read16(PORTI_CLEAR)
|
|
#define bfin_write_PORTI_CLEAR(val) bfin_write16(PORTI_CLEAR, val)
|
|
#define bfin_read_PORTI_DIR_SET() bfin_read16(PORTI_DIR_SET)
|
|
#define bfin_write_PORTI_DIR_SET(val) bfin_write16(PORTI_DIR_SET, val)
|
|
#define bfin_read_PORTI_DIR_CLEAR() bfin_read16(PORTI_DIR_CLEAR)
|
|
#define bfin_write_PORTI_DIR_CLEAR(val) bfin_write16(PORTI_DIR_CLEAR, val)
|
|
#define bfin_read_PORTI_INEN() bfin_read16(PORTI_INEN)
|
|
#define bfin_write_PORTI_INEN(val) bfin_write16(PORTI_INEN, val)
|
|
#define bfin_read_PORTI_MUX() bfin_read32(PORTI_MUX)
|
|
#define bfin_write_PORTI_MUX(val) bfin_write32(PORTI_MUX, val)
|
|
|
|
/* Port J Registers */
|
|
|
|
#define bfin_read_PORTJ_FER() bfin_read16(PORTJ_FER)
|
|
#define bfin_write_PORTJ_FER(val) bfin_write16(PORTJ_FER, val)
|
|
#define bfin_read_PORTJ() bfin_read16(PORTJ)
|
|
#define bfin_write_PORTJ(val) bfin_write16(PORTJ, val)
|
|
#define bfin_read_PORTJ_SET() bfin_read16(PORTJ_SET)
|
|
#define bfin_write_PORTJ_SET(val) bfin_write16(PORTJ_SET, val)
|
|
#define bfin_read_PORTJ_CLEAR() bfin_read16(PORTJ_CLEAR)
|
|
#define bfin_write_PORTJ_CLEAR(val) bfin_write16(PORTJ_CLEAR, val)
|
|
#define bfin_read_PORTJ_DIR_SET() bfin_read16(PORTJ_DIR_SET)
|
|
#define bfin_write_PORTJ_DIR_SET(val) bfin_write16(PORTJ_DIR_SET, val)
|
|
#define bfin_read_PORTJ_DIR_CLEAR() bfin_read16(PORTJ_DIR_CLEAR)
|
|
#define bfin_write_PORTJ_DIR_CLEAR(val) bfin_write16(PORTJ_DIR_CLEAR, val)
|
|
#define bfin_read_PORTJ_INEN() bfin_read16(PORTJ_INEN)
|
|
#define bfin_write_PORTJ_INEN(val) bfin_write16(PORTJ_INEN, val)
|
|
#define bfin_read_PORTJ_MUX() bfin_read32(PORTJ_MUX)
|
|
#define bfin_write_PORTJ_MUX(val) bfin_write32(PORTJ_MUX, val)
|
|
|
|
/* PWM Timer Registers */
|
|
|
|
#define bfin_read_TIMER0_CONFIG() bfin_read16(TIMER0_CONFIG)
|
|
#define bfin_write_TIMER0_CONFIG(val) bfin_write16(TIMER0_CONFIG, val)
|
|
#define bfin_read_TIMER0_COUNTER() bfin_read32(TIMER0_COUNTER)
|
|
#define bfin_write_TIMER0_COUNTER(val) bfin_write32(TIMER0_COUNTER, val)
|
|
#define bfin_read_TIMER0_PERIOD() bfin_read32(TIMER0_PERIOD)
|
|
#define bfin_write_TIMER0_PERIOD(val) bfin_write32(TIMER0_PERIOD, val)
|
|
#define bfin_read_TIMER0_WIDTH() bfin_read32(TIMER0_WIDTH)
|
|
#define bfin_write_TIMER0_WIDTH(val) bfin_write32(TIMER0_WIDTH, val)
|
|
#define bfin_read_TIMER1_CONFIG() bfin_read16(TIMER1_CONFIG)
|
|
#define bfin_write_TIMER1_CONFIG(val) bfin_write16(TIMER1_CONFIG, val)
|
|
#define bfin_read_TIMER1_COUNTER() bfin_read32(TIMER1_COUNTER)
|
|
#define bfin_write_TIMER1_COUNTER(val) bfin_write32(TIMER1_COUNTER, val)
|
|
#define bfin_read_TIMER1_PERIOD() bfin_read32(TIMER1_PERIOD)
|
|
#define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD, val)
|
|
#define bfin_read_TIMER1_WIDTH() bfin_read32(TIMER1_WIDTH)
|
|
#define bfin_write_TIMER1_WIDTH(val) bfin_write32(TIMER1_WIDTH, val)
|
|
#define bfin_read_TIMER2_CONFIG() bfin_read16(TIMER2_CONFIG)
|
|
#define bfin_write_TIMER2_CONFIG(val) bfin_write16(TIMER2_CONFIG, val)
|
|
#define bfin_read_TIMER2_COUNTER() bfin_read32(TIMER2_COUNTER)
|
|
#define bfin_write_TIMER2_COUNTER(val) bfin_write32(TIMER2_COUNTER, val)
|
|
#define bfin_read_TIMER2_PERIOD() bfin_read32(TIMER2_PERIOD)
|
|
#define bfin_write_TIMER2_PERIOD(val) bfin_write32(TIMER2_PERIOD, val)
|
|
#define bfin_read_TIMER2_WIDTH() bfin_read32(TIMER2_WIDTH)
|
|
#define bfin_write_TIMER2_WIDTH(val) bfin_write32(TIMER2_WIDTH, val)
|
|
#define bfin_read_TIMER3_CONFIG() bfin_read16(TIMER3_CONFIG)
|
|
#define bfin_write_TIMER3_CONFIG(val) bfin_write16(TIMER3_CONFIG, val)
|
|
#define bfin_read_TIMER3_COUNTER() bfin_read32(TIMER3_COUNTER)
|
|
#define bfin_write_TIMER3_COUNTER(val) bfin_write32(TIMER3_COUNTER, val)
|
|
#define bfin_read_TIMER3_PERIOD() bfin_read32(TIMER3_PERIOD)
|
|
#define bfin_write_TIMER3_PERIOD(val) bfin_write32(TIMER3_PERIOD, val)
|
|
#define bfin_read_TIMER3_WIDTH() bfin_read32(TIMER3_WIDTH)
|
|
#define bfin_write_TIMER3_WIDTH(val) bfin_write32(TIMER3_WIDTH, val)
|
|
#define bfin_read_TIMER4_CONFIG() bfin_read16(TIMER4_CONFIG)
|
|
#define bfin_write_TIMER4_CONFIG(val) bfin_write16(TIMER4_CONFIG, val)
|
|
#define bfin_read_TIMER4_COUNTER() bfin_read32(TIMER4_COUNTER)
|
|
#define bfin_write_TIMER4_COUNTER(val) bfin_write32(TIMER4_COUNTER, val)
|
|
#define bfin_read_TIMER4_PERIOD() bfin_read32(TIMER4_PERIOD)
|
|
#define bfin_write_TIMER4_PERIOD(val) bfin_write32(TIMER4_PERIOD, val)
|
|
#define bfin_read_TIMER4_WIDTH() bfin_read32(TIMER4_WIDTH)
|
|
#define bfin_write_TIMER4_WIDTH(val) bfin_write32(TIMER4_WIDTH, val)
|
|
#define bfin_read_TIMER5_CONFIG() bfin_read16(TIMER5_CONFIG)
|
|
#define bfin_write_TIMER5_CONFIG(val) bfin_write16(TIMER5_CONFIG, val)
|
|
#define bfin_read_TIMER5_COUNTER() bfin_read32(TIMER5_COUNTER)
|
|
#define bfin_write_TIMER5_COUNTER(val) bfin_write32(TIMER5_COUNTER, val)
|
|
#define bfin_read_TIMER5_PERIOD() bfin_read32(TIMER5_PERIOD)
|
|
#define bfin_write_TIMER5_PERIOD(val) bfin_write32(TIMER5_PERIOD, val)
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#define bfin_read_TIMER5_WIDTH() bfin_read32(TIMER5_WIDTH)
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#define bfin_write_TIMER5_WIDTH(val) bfin_write32(TIMER5_WIDTH, val)
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#define bfin_read_TIMER6_CONFIG() bfin_read16(TIMER6_CONFIG)
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#define bfin_write_TIMER6_CONFIG(val) bfin_write16(TIMER6_CONFIG, val)
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#define bfin_read_TIMER6_COUNTER() bfin_read32(TIMER6_COUNTER)
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#define bfin_write_TIMER6_COUNTER(val) bfin_write32(TIMER6_COUNTER, val)
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#define bfin_read_TIMER6_PERIOD() bfin_read32(TIMER6_PERIOD)
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#define bfin_write_TIMER6_PERIOD(val) bfin_write32(TIMER6_PERIOD, val)
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#define bfin_read_TIMER6_WIDTH() bfin_read32(TIMER6_WIDTH)
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#define bfin_write_TIMER6_WIDTH(val) bfin_write32(TIMER6_WIDTH, val)
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#define bfin_read_TIMER7_CONFIG() bfin_read16(TIMER7_CONFIG)
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#define bfin_write_TIMER7_CONFIG(val) bfin_write16(TIMER7_CONFIG, val)
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#define bfin_read_TIMER7_COUNTER() bfin_read32(TIMER7_COUNTER)
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#define bfin_write_TIMER7_COUNTER(val) bfin_write32(TIMER7_COUNTER, val)
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#define bfin_read_TIMER7_PERIOD() bfin_read32(TIMER7_PERIOD)
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#define bfin_write_TIMER7_PERIOD(val) bfin_write32(TIMER7_PERIOD, val)
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#define bfin_read_TIMER7_WIDTH() bfin_read32(TIMER7_WIDTH)
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#define bfin_write_TIMER7_WIDTH(val) bfin_write32(TIMER7_WIDTH, val)
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/* Timer Groubfin_read_() of 8 */
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#define bfin_read_TIMER_ENABLE0() bfin_read16(TIMER_ENABLE0)
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#define bfin_write_TIMER_ENABLE0(val) bfin_write16(TIMER_ENABLE0, val)
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#define bfin_read_TIMER_DISABLE0() bfin_read16(TIMER_DISABLE0)
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#define bfin_write_TIMER_DISABLE0(val) bfin_write16(TIMER_DISABLE0, val)
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#define bfin_read_TIMER_STATUS0() bfin_read32(TIMER_STATUS0)
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#define bfin_write_TIMER_STATUS0(val) bfin_write32(TIMER_STATUS0, val)
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/* DMAC1 Registers */
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#define bfin_read_DMAC1_TCPER() bfin_read16(DMAC1_TCPER)
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#define bfin_write_DMAC1_TCPER(val) bfin_write16(DMAC1_TCPER, val)
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#define bfin_read_DMAC1_TCCNT() bfin_read16(DMAC1_TCCNT)
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#define bfin_write_DMAC1_TCCNT(val) bfin_write16(DMAC1_TCCNT, val)
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/* DMA Channel 12 Registers */
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#define bfin_read_DMA12_NEXT_DESC_PTR() bfin_read32(DMA12_NEXT_DESC_PTR)
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#define bfin_write_DMA12_NEXT_DESC_PTR(val) bfin_write32(DMA12_NEXT_DESC_PTR, val)
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#define bfin_read_DMA12_START_ADDR() bfin_read32(DMA12_START_ADDR)
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#define bfin_write_DMA12_START_ADDR(val) bfin_write32(DMA12_START_ADDR, val)
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#define bfin_read_DMA12_CONFIG() bfin_read16(DMA12_CONFIG)
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#define bfin_write_DMA12_CONFIG(val) bfin_write16(DMA12_CONFIG, val)
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#define bfin_read_DMA12_X_COUNT() bfin_read16(DMA12_X_COUNT)
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#define bfin_write_DMA12_X_COUNT(val) bfin_write16(DMA12_X_COUNT, val)
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#define bfin_read_DMA12_X_MODIFY() bfin_read16(DMA12_X_MODIFY)
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#define bfin_write_DMA12_X_MODIFY(val) bfin_write16(DMA12_X_MODIFY, val)
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#define bfin_read_DMA12_Y_COUNT() bfin_read16(DMA12_Y_COUNT)
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#define bfin_write_DMA12_Y_COUNT(val) bfin_write16(DMA12_Y_COUNT, val)
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#define bfin_read_DMA12_Y_MODIFY() bfin_read16(DMA12_Y_MODIFY)
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#define bfin_write_DMA12_Y_MODIFY(val) bfin_write16(DMA12_Y_MODIFY, val)
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#define bfin_read_DMA12_CURR_DESC_PTR() bfin_read32(DMA12_CURR_DESC_PTR)
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#define bfin_write_DMA12_CURR_DESC_PTR(val) bfin_write32(DMA12_CURR_DESC_PTR, val)
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#define bfin_read_DMA12_CURR_ADDR() bfin_read32(DMA12_CURR_ADDR)
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#define bfin_write_DMA12_CURR_ADDR(val) bfin_write32(DMA12_CURR_ADDR, val)
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#define bfin_read_DMA12_IRQ_STATUS() bfin_read16(DMA12_IRQ_STATUS)
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#define bfin_write_DMA12_IRQ_STATUS(val) bfin_write16(DMA12_IRQ_STATUS, val)
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#define bfin_read_DMA12_PERIPHERAL_MAP() bfin_read16(DMA12_PERIPHERAL_MAP)
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#define bfin_write_DMA12_PERIPHERAL_MAP(val) bfin_write16(DMA12_PERIPHERAL_MAP, val)
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#define bfin_read_DMA12_CURR_X_COUNT() bfin_read16(DMA12_CURR_X_COUNT)
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#define bfin_write_DMA12_CURR_X_COUNT(val) bfin_write16(DMA12_CURR_X_COUNT, val)
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#define bfin_read_DMA12_CURR_Y_COUNT() bfin_read16(DMA12_CURR_Y_COUNT)
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#define bfin_write_DMA12_CURR_Y_COUNT(val) bfin_write16(DMA12_CURR_Y_COUNT, val)
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/* DMA Channel 13 Registers */
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#define bfin_read_DMA13_NEXT_DESC_PTR() bfin_read32(DMA13_NEXT_DESC_PTR)
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#define bfin_write_DMA13_NEXT_DESC_PTR(val) bfin_write32(DMA13_NEXT_DESC_PTR, val)
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#define bfin_read_DMA13_START_ADDR() bfin_read32(DMA13_START_ADDR)
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#define bfin_write_DMA13_START_ADDR(val) bfin_write32(DMA13_START_ADDR, val)
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#define bfin_read_DMA13_CONFIG() bfin_read16(DMA13_CONFIG)
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|
#define bfin_write_DMA13_CONFIG(val) bfin_write16(DMA13_CONFIG, val)
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|
#define bfin_read_DMA13_X_COUNT() bfin_read16(DMA13_X_COUNT)
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|
#define bfin_write_DMA13_X_COUNT(val) bfin_write16(DMA13_X_COUNT, val)
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#define bfin_read_DMA13_X_MODIFY() bfin_read16(DMA13_X_MODIFY)
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#define bfin_write_DMA13_X_MODIFY(val) bfin_write16(DMA13_X_MODIFY, val)
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|
#define bfin_read_DMA13_Y_COUNT() bfin_read16(DMA13_Y_COUNT)
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|
#define bfin_write_DMA13_Y_COUNT(val) bfin_write16(DMA13_Y_COUNT, val)
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|
#define bfin_read_DMA13_Y_MODIFY() bfin_read16(DMA13_Y_MODIFY)
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|
#define bfin_write_DMA13_Y_MODIFY(val) bfin_write16(DMA13_Y_MODIFY, val)
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#define bfin_read_DMA13_CURR_DESC_PTR() bfin_read32(DMA13_CURR_DESC_PTR)
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#define bfin_write_DMA13_CURR_DESC_PTR(val) bfin_write32(DMA13_CURR_DESC_PTR, val)
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|
#define bfin_read_DMA13_CURR_ADDR() bfin_read32(DMA13_CURR_ADDR)
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|
#define bfin_write_DMA13_CURR_ADDR(val) bfin_write32(DMA13_CURR_ADDR, val)
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|
#define bfin_read_DMA13_IRQ_STATUS() bfin_read16(DMA13_IRQ_STATUS)
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|
#define bfin_write_DMA13_IRQ_STATUS(val) bfin_write16(DMA13_IRQ_STATUS, val)
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|
#define bfin_read_DMA13_PERIPHERAL_MAP() bfin_read16(DMA13_PERIPHERAL_MAP)
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|
#define bfin_write_DMA13_PERIPHERAL_MAP(val) bfin_write16(DMA13_PERIPHERAL_MAP, val)
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|
#define bfin_read_DMA13_CURR_X_COUNT() bfin_read16(DMA13_CURR_X_COUNT)
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|
#define bfin_write_DMA13_CURR_X_COUNT(val) bfin_write16(DMA13_CURR_X_COUNT, val)
|
|
#define bfin_read_DMA13_CURR_Y_COUNT() bfin_read16(DMA13_CURR_Y_COUNT)
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|
#define bfin_write_DMA13_CURR_Y_COUNT(val) bfin_write16(DMA13_CURR_Y_COUNT, val)
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|
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/* DMA Channel 14 Registers */
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|
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#define bfin_read_DMA14_NEXT_DESC_PTR() bfin_read32(DMA14_NEXT_DESC_PTR)
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|
#define bfin_write_DMA14_NEXT_DESC_PTR(val) bfin_write32(DMA14_NEXT_DESC_PTR, val)
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|
#define bfin_read_DMA14_START_ADDR() bfin_read32(DMA14_START_ADDR)
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|
#define bfin_write_DMA14_START_ADDR(val) bfin_write32(DMA14_START_ADDR, val)
|
|
#define bfin_read_DMA14_CONFIG() bfin_read16(DMA14_CONFIG)
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|
#define bfin_write_DMA14_CONFIG(val) bfin_write16(DMA14_CONFIG, val)
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|
#define bfin_read_DMA14_X_COUNT() bfin_read16(DMA14_X_COUNT)
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|
#define bfin_write_DMA14_X_COUNT(val) bfin_write16(DMA14_X_COUNT, val)
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#define bfin_read_DMA14_X_MODIFY() bfin_read16(DMA14_X_MODIFY)
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|
#define bfin_write_DMA14_X_MODIFY(val) bfin_write16(DMA14_X_MODIFY, val)
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|
#define bfin_read_DMA14_Y_COUNT() bfin_read16(DMA14_Y_COUNT)
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|
#define bfin_write_DMA14_Y_COUNT(val) bfin_write16(DMA14_Y_COUNT, val)
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|
#define bfin_read_DMA14_Y_MODIFY() bfin_read16(DMA14_Y_MODIFY)
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|
#define bfin_write_DMA14_Y_MODIFY(val) bfin_write16(DMA14_Y_MODIFY, val)
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#define bfin_read_DMA14_CURR_DESC_PTR() bfin_read32(DMA14_CURR_DESC_PTR)
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|
#define bfin_write_DMA14_CURR_DESC_PTR(val) bfin_write32(DMA14_CURR_DESC_PTR, val)
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#define bfin_read_DMA14_CURR_ADDR() bfin_read32(DMA14_CURR_ADDR)
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#define bfin_write_DMA14_CURR_ADDR(val) bfin_write32(DMA14_CURR_ADDR, val)
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|
#define bfin_read_DMA14_IRQ_STATUS() bfin_read16(DMA14_IRQ_STATUS)
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#define bfin_write_DMA14_IRQ_STATUS(val) bfin_write16(DMA14_IRQ_STATUS, val)
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#define bfin_read_DMA14_PERIPHERAL_MAP() bfin_read16(DMA14_PERIPHERAL_MAP)
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|
#define bfin_write_DMA14_PERIPHERAL_MAP(val) bfin_write16(DMA14_PERIPHERAL_MAP, val)
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|
#define bfin_read_DMA14_CURR_X_COUNT() bfin_read16(DMA14_CURR_X_COUNT)
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#define bfin_write_DMA14_CURR_X_COUNT(val) bfin_write16(DMA14_CURR_X_COUNT, val)
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|
#define bfin_read_DMA14_CURR_Y_COUNT() bfin_read16(DMA14_CURR_Y_COUNT)
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#define bfin_write_DMA14_CURR_Y_COUNT(val) bfin_write16(DMA14_CURR_Y_COUNT, val)
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|
|
|
/* DMA Channel 15 Registers */
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|
|
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#define bfin_read_DMA15_NEXT_DESC_PTR() bfin_read32(DMA15_NEXT_DESC_PTR)
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|
#define bfin_write_DMA15_NEXT_DESC_PTR(val) bfin_write32(DMA15_NEXT_DESC_PTR, val)
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|
#define bfin_read_DMA15_START_ADDR() bfin_read32(DMA15_START_ADDR)
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|
#define bfin_write_DMA15_START_ADDR(val) bfin_write32(DMA15_START_ADDR, val)
|
|
#define bfin_read_DMA15_CONFIG() bfin_read16(DMA15_CONFIG)
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|
#define bfin_write_DMA15_CONFIG(val) bfin_write16(DMA15_CONFIG, val)
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|
#define bfin_read_DMA15_X_COUNT() bfin_read16(DMA15_X_COUNT)
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|
#define bfin_write_DMA15_X_COUNT(val) bfin_write16(DMA15_X_COUNT, val)
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#define bfin_read_DMA15_X_MODIFY() bfin_read16(DMA15_X_MODIFY)
|
|
#define bfin_write_DMA15_X_MODIFY(val) bfin_write16(DMA15_X_MODIFY, val)
|
|
#define bfin_read_DMA15_Y_COUNT() bfin_read16(DMA15_Y_COUNT)
|
|
#define bfin_write_DMA15_Y_COUNT(val) bfin_write16(DMA15_Y_COUNT, val)
|
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#define bfin_read_DMA15_Y_MODIFY() bfin_read16(DMA15_Y_MODIFY)
|
|
#define bfin_write_DMA15_Y_MODIFY(val) bfin_write16(DMA15_Y_MODIFY, val)
|
|
#define bfin_read_DMA15_CURR_DESC_PTR() bfin_read32(DMA15_CURR_DESC_PTR)
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|
#define bfin_write_DMA15_CURR_DESC_PTR(val) bfin_write32(DMA15_CURR_DESC_PTR, val)
|
|
#define bfin_read_DMA15_CURR_ADDR() bfin_read32(DMA15_CURR_ADDR)
|
|
#define bfin_write_DMA15_CURR_ADDR(val) bfin_write32(DMA15_CURR_ADDR, val)
|
|
#define bfin_read_DMA15_IRQ_STATUS() bfin_read16(DMA15_IRQ_STATUS)
|
|
#define bfin_write_DMA15_IRQ_STATUS(val) bfin_write16(DMA15_IRQ_STATUS, val)
|
|
#define bfin_read_DMA15_PERIPHERAL_MAP() bfin_read16(DMA15_PERIPHERAL_MAP)
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|
#define bfin_write_DMA15_PERIPHERAL_MAP(val) bfin_write16(DMA15_PERIPHERAL_MAP, val)
|
|
#define bfin_read_DMA15_CURR_X_COUNT() bfin_read16(DMA15_CURR_X_COUNT)
|
|
#define bfin_write_DMA15_CURR_X_COUNT(val) bfin_write16(DMA15_CURR_X_COUNT, val)
|
|
#define bfin_read_DMA15_CURR_Y_COUNT() bfin_read16(DMA15_CURR_Y_COUNT)
|
|
#define bfin_write_DMA15_CURR_Y_COUNT(val) bfin_write16(DMA15_CURR_Y_COUNT, val)
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|
|
|
/* DMA Channel 16 Registers */
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|
|
|
#define bfin_read_DMA16_NEXT_DESC_PTR() bfin_read32(DMA16_NEXT_DESC_PTR)
|
|
#define bfin_write_DMA16_NEXT_DESC_PTR(val) bfin_write32(DMA16_NEXT_DESC_PTR, val)
|
|
#define bfin_read_DMA16_START_ADDR() bfin_read32(DMA16_START_ADDR)
|
|
#define bfin_write_DMA16_START_ADDR(val) bfin_write32(DMA16_START_ADDR, val)
|
|
#define bfin_read_DMA16_CONFIG() bfin_read16(DMA16_CONFIG)
|
|
#define bfin_write_DMA16_CONFIG(val) bfin_write16(DMA16_CONFIG, val)
|
|
#define bfin_read_DMA16_X_COUNT() bfin_read16(DMA16_X_COUNT)
|
|
#define bfin_write_DMA16_X_COUNT(val) bfin_write16(DMA16_X_COUNT, val)
|
|
#define bfin_read_DMA16_X_MODIFY() bfin_read16(DMA16_X_MODIFY)
|
|
#define bfin_write_DMA16_X_MODIFY(val) bfin_write16(DMA16_X_MODIFY, val)
|
|
#define bfin_read_DMA16_Y_COUNT() bfin_read16(DMA16_Y_COUNT)
|
|
#define bfin_write_DMA16_Y_COUNT(val) bfin_write16(DMA16_Y_COUNT, val)
|
|
#define bfin_read_DMA16_Y_MODIFY() bfin_read16(DMA16_Y_MODIFY)
|
|
#define bfin_write_DMA16_Y_MODIFY(val) bfin_write16(DMA16_Y_MODIFY, val)
|
|
#define bfin_read_DMA16_CURR_DESC_PTR() bfin_read32(DMA16_CURR_DESC_PTR)
|
|
#define bfin_write_DMA16_CURR_DESC_PTR(val) bfin_write32(DMA16_CURR_DESC_PTR, val)
|
|
#define bfin_read_DMA16_CURR_ADDR() bfin_read32(DMA16_CURR_ADDR)
|
|
#define bfin_write_DMA16_CURR_ADDR(val) bfin_write32(DMA16_CURR_ADDR, val)
|
|
#define bfin_read_DMA16_IRQ_STATUS() bfin_read16(DMA16_IRQ_STATUS)
|
|
#define bfin_write_DMA16_IRQ_STATUS(val) bfin_write16(DMA16_IRQ_STATUS, val)
|
|
#define bfin_read_DMA16_PERIPHERAL_MAP() bfin_read16(DMA16_PERIPHERAL_MAP)
|
|
#define bfin_write_DMA16_PERIPHERAL_MAP(val) bfin_write16(DMA16_PERIPHERAL_MAP, val)
|
|
#define bfin_read_DMA16_CURR_X_COUNT() bfin_read16(DMA16_CURR_X_COUNT)
|
|
#define bfin_write_DMA16_CURR_X_COUNT(val) bfin_write16(DMA16_CURR_X_COUNT, val)
|
|
#define bfin_read_DMA16_CURR_Y_COUNT() bfin_read16(DMA16_CURR_Y_COUNT)
|
|
#define bfin_write_DMA16_CURR_Y_COUNT(val) bfin_write16(DMA16_CURR_Y_COUNT, val)
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|
|
|
/* DMA Channel 17 Registers */
|
|
|
|
#define bfin_read_DMA17_NEXT_DESC_PTR() bfin_read32(DMA17_NEXT_DESC_PTR)
|
|
#define bfin_write_DMA17_NEXT_DESC_PTR(val) bfin_write32(DMA17_NEXT_DESC_PTR, val)
|
|
#define bfin_read_DMA17_START_ADDR() bfin_read32(DMA17_START_ADDR)
|
|
#define bfin_write_DMA17_START_ADDR(val) bfin_write32(DMA17_START_ADDR, val)
|
|
#define bfin_read_DMA17_CONFIG() bfin_read16(DMA17_CONFIG)
|
|
#define bfin_write_DMA17_CONFIG(val) bfin_write16(DMA17_CONFIG, val)
|
|
#define bfin_read_DMA17_X_COUNT() bfin_read16(DMA17_X_COUNT)
|
|
#define bfin_write_DMA17_X_COUNT(val) bfin_write16(DMA17_X_COUNT, val)
|
|
#define bfin_read_DMA17_X_MODIFY() bfin_read16(DMA17_X_MODIFY)
|
|
#define bfin_write_DMA17_X_MODIFY(val) bfin_write16(DMA17_X_MODIFY, val)
|
|
#define bfin_read_DMA17_Y_COUNT() bfin_read16(DMA17_Y_COUNT)
|
|
#define bfin_write_DMA17_Y_COUNT(val) bfin_write16(DMA17_Y_COUNT, val)
|
|
#define bfin_read_DMA17_Y_MODIFY() bfin_read16(DMA17_Y_MODIFY)
|
|
#define bfin_write_DMA17_Y_MODIFY(val) bfin_write16(DMA17_Y_MODIFY, val)
|
|
#define bfin_read_DMA17_CURR_DESC_PTR() bfin_read32(DMA17_CURR_DESC_PTR)
|
|
#define bfin_write_DMA17_CURR_DESC_PTR(val) bfin_write32(DMA17_CURR_DESC_PTR, val)
|
|
#define bfin_read_DMA17_CURR_ADDR() bfin_read32(DMA17_CURR_ADDR)
|
|
#define bfin_write_DMA17_CURR_ADDR(val) bfin_write32(DMA17_CURR_ADDR, val)
|
|
#define bfin_read_DMA17_IRQ_STATUS() bfin_read16(DMA17_IRQ_STATUS)
|
|
#define bfin_write_DMA17_IRQ_STATUS(val) bfin_write16(DMA17_IRQ_STATUS, val)
|
|
#define bfin_read_DMA17_PERIPHERAL_MAP() bfin_read16(DMA17_PERIPHERAL_MAP)
|
|
#define bfin_write_DMA17_PERIPHERAL_MAP(val) bfin_write16(DMA17_PERIPHERAL_MAP, val)
|
|
#define bfin_read_DMA17_CURR_X_COUNT() bfin_read16(DMA17_CURR_X_COUNT)
|
|
#define bfin_write_DMA17_CURR_X_COUNT(val) bfin_write16(DMA17_CURR_X_COUNT, val)
|
|
#define bfin_read_DMA17_CURR_Y_COUNT() bfin_read16(DMA17_CURR_Y_COUNT)
|
|
#define bfin_write_DMA17_CURR_Y_COUNT(val) bfin_write16(DMA17_CURR_Y_COUNT, val)
|
|
|
|
/* DMA Channel 18 Registers */
|
|
|
|
#define bfin_read_DMA18_NEXT_DESC_PTR() bfin_read32(DMA18_NEXT_DESC_PTR)
|
|
#define bfin_write_DMA18_NEXT_DESC_PTR(val) bfin_write32(DMA18_NEXT_DESC_PTR, val)
|
|
#define bfin_read_DMA18_START_ADDR() bfin_read32(DMA18_START_ADDR)
|
|
#define bfin_write_DMA18_START_ADDR(val) bfin_write32(DMA18_START_ADDR, val)
|
|
#define bfin_read_DMA18_CONFIG() bfin_read16(DMA18_CONFIG)
|
|
#define bfin_write_DMA18_CONFIG(val) bfin_write16(DMA18_CONFIG, val)
|
|
#define bfin_read_DMA18_X_COUNT() bfin_read16(DMA18_X_COUNT)
|
|
#define bfin_write_DMA18_X_COUNT(val) bfin_write16(DMA18_X_COUNT, val)
|
|
#define bfin_read_DMA18_X_MODIFY() bfin_read16(DMA18_X_MODIFY)
|
|
#define bfin_write_DMA18_X_MODIFY(val) bfin_write16(DMA18_X_MODIFY, val)
|
|
#define bfin_read_DMA18_Y_COUNT() bfin_read16(DMA18_Y_COUNT)
|
|
#define bfin_write_DMA18_Y_COUNT(val) bfin_write16(DMA18_Y_COUNT, val)
|
|
#define bfin_read_DMA18_Y_MODIFY() bfin_read16(DMA18_Y_MODIFY)
|
|
#define bfin_write_DMA18_Y_MODIFY(val) bfin_write16(DMA18_Y_MODIFY, val)
|
|
#define bfin_read_DMA18_CURR_DESC_PTR() bfin_read32(DMA18_CURR_DESC_PTR)
|
|
#define bfin_write_DMA18_CURR_DESC_PTR(val) bfin_write32(DMA18_CURR_DESC_PTR, val)
|
|
#define bfin_read_DMA18_CURR_ADDR() bfin_read32(DMA18_CURR_ADDR)
|
|
#define bfin_write_DMA18_CURR_ADDR(val) bfin_write32(DMA18_CURR_ADDR, val)
|
|
#define bfin_read_DMA18_IRQ_STATUS() bfin_read16(DMA18_IRQ_STATUS)
|
|
#define bfin_write_DMA18_IRQ_STATUS(val) bfin_write16(DMA18_IRQ_STATUS, val)
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#define bfin_read_DMA18_PERIPHERAL_MAP() bfin_read16(DMA18_PERIPHERAL_MAP)
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#define bfin_write_DMA18_PERIPHERAL_MAP(val) bfin_write16(DMA18_PERIPHERAL_MAP, val)
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#define bfin_read_DMA18_CURR_X_COUNT() bfin_read16(DMA18_CURR_X_COUNT)
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#define bfin_write_DMA18_CURR_X_COUNT(val) bfin_write16(DMA18_CURR_X_COUNT, val)
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#define bfin_read_DMA18_CURR_Y_COUNT() bfin_read16(DMA18_CURR_Y_COUNT)
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#define bfin_write_DMA18_CURR_Y_COUNT(val) bfin_write16(DMA18_CURR_Y_COUNT, val)
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|
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/* DMA Channel 19 Registers */
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#define bfin_read_DMA19_NEXT_DESC_PTR() bfin_read32(DMA19_NEXT_DESC_PTR)
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#define bfin_write_DMA19_NEXT_DESC_PTR(val) bfin_write32(DMA19_NEXT_DESC_PTR, val)
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#define bfin_read_DMA19_START_ADDR() bfin_read32(DMA19_START_ADDR)
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#define bfin_write_DMA19_START_ADDR(val) bfin_write32(DMA19_START_ADDR, val)
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#define bfin_read_DMA19_CONFIG() bfin_read16(DMA19_CONFIG)
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#define bfin_write_DMA19_CONFIG(val) bfin_write16(DMA19_CONFIG, val)
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#define bfin_read_DMA19_X_COUNT() bfin_read16(DMA19_X_COUNT)
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#define bfin_write_DMA19_X_COUNT(val) bfin_write16(DMA19_X_COUNT, val)
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#define bfin_read_DMA19_X_MODIFY() bfin_read16(DMA19_X_MODIFY)
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#define bfin_write_DMA19_X_MODIFY(val) bfin_write16(DMA19_X_MODIFY, val)
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#define bfin_read_DMA19_Y_COUNT() bfin_read16(DMA19_Y_COUNT)
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#define bfin_write_DMA19_Y_COUNT(val) bfin_write16(DMA19_Y_COUNT, val)
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#define bfin_read_DMA19_Y_MODIFY() bfin_read16(DMA19_Y_MODIFY)
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#define bfin_write_DMA19_Y_MODIFY(val) bfin_write16(DMA19_Y_MODIFY, val)
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#define bfin_read_DMA19_CURR_DESC_PTR() bfin_read32(DMA19_CURR_DESC_PTR)
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#define bfin_write_DMA19_CURR_DESC_PTR(val) bfin_write32(DMA19_CURR_DESC_PTR, val)
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#define bfin_read_DMA19_CURR_ADDR() bfin_read32(DMA19_CURR_ADDR)
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#define bfin_write_DMA19_CURR_ADDR(val) bfin_write32(DMA19_CURR_ADDR, val)
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#define bfin_read_DMA19_IRQ_STATUS() bfin_read16(DMA19_IRQ_STATUS)
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#define bfin_write_DMA19_IRQ_STATUS(val) bfin_write16(DMA19_IRQ_STATUS, val)
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#define bfin_read_DMA19_PERIPHERAL_MAP() bfin_read16(DMA19_PERIPHERAL_MAP)
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#define bfin_write_DMA19_PERIPHERAL_MAP(val) bfin_write16(DMA19_PERIPHERAL_MAP, val)
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#define bfin_read_DMA19_CURR_X_COUNT() bfin_read16(DMA19_CURR_X_COUNT)
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#define bfin_write_DMA19_CURR_X_COUNT(val) bfin_write16(DMA19_CURR_X_COUNT, val)
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#define bfin_read_DMA19_CURR_Y_COUNT() bfin_read16(DMA19_CURR_Y_COUNT)
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#define bfin_write_DMA19_CURR_Y_COUNT(val) bfin_write16(DMA19_CURR_Y_COUNT, val)
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/* DMA Channel 20 Registers */
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#define bfin_read_DMA20_NEXT_DESC_PTR() bfin_read32(DMA20_NEXT_DESC_PTR)
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#define bfin_write_DMA20_NEXT_DESC_PTR(val) bfin_write32(DMA20_NEXT_DESC_PTR, val)
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#define bfin_read_DMA20_START_ADDR() bfin_read32(DMA20_START_ADDR)
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#define bfin_write_DMA20_START_ADDR(val) bfin_write32(DMA20_START_ADDR, val)
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#define bfin_read_DMA20_CONFIG() bfin_read16(DMA20_CONFIG)
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#define bfin_write_DMA20_CONFIG(val) bfin_write16(DMA20_CONFIG, val)
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#define bfin_read_DMA20_X_COUNT() bfin_read16(DMA20_X_COUNT)
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#define bfin_write_DMA20_X_COUNT(val) bfin_write16(DMA20_X_COUNT, val)
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#define bfin_read_DMA20_X_MODIFY() bfin_read16(DMA20_X_MODIFY)
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#define bfin_write_DMA20_X_MODIFY(val) bfin_write16(DMA20_X_MODIFY, val)
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#define bfin_read_DMA20_Y_COUNT() bfin_read16(DMA20_Y_COUNT)
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#define bfin_write_DMA20_Y_COUNT(val) bfin_write16(DMA20_Y_COUNT, val)
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#define bfin_read_DMA20_Y_MODIFY() bfin_read16(DMA20_Y_MODIFY)
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#define bfin_write_DMA20_Y_MODIFY(val) bfin_write16(DMA20_Y_MODIFY, val)
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#define bfin_read_DMA20_CURR_DESC_PTR() bfin_read32(DMA20_CURR_DESC_PTR)
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#define bfin_write_DMA20_CURR_DESC_PTR(val) bfin_write32(DMA20_CURR_DESC_PTR, val)
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#define bfin_read_DMA20_CURR_ADDR() bfin_read32(DMA20_CURR_ADDR)
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#define bfin_write_DMA20_CURR_ADDR(val) bfin_write32(DMA20_CURR_ADDR, val)
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#define bfin_read_DMA20_IRQ_STATUS() bfin_read16(DMA20_IRQ_STATUS)
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#define bfin_write_DMA20_IRQ_STATUS(val) bfin_write16(DMA20_IRQ_STATUS, val)
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#define bfin_read_DMA20_PERIPHERAL_MAP() bfin_read16(DMA20_PERIPHERAL_MAP)
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#define bfin_write_DMA20_PERIPHERAL_MAP(val) bfin_write16(DMA20_PERIPHERAL_MAP, val)
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#define bfin_read_DMA20_CURR_X_COUNT() bfin_read16(DMA20_CURR_X_COUNT)
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#define bfin_write_DMA20_CURR_X_COUNT(val) bfin_write16(DMA20_CURR_X_COUNT, val)
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|
#define bfin_read_DMA20_CURR_Y_COUNT() bfin_read16(DMA20_CURR_Y_COUNT)
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#define bfin_write_DMA20_CURR_Y_COUNT(val) bfin_write16(DMA20_CURR_Y_COUNT, val)
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/* DMA Channel 21 Registers */
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#define bfin_read_DMA21_NEXT_DESC_PTR() bfin_read32(DMA21_NEXT_DESC_PTR)
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#define bfin_write_DMA21_NEXT_DESC_PTR(val) bfin_write32(DMA21_NEXT_DESC_PTR, val)
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#define bfin_read_DMA21_START_ADDR() bfin_read32(DMA21_START_ADDR)
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#define bfin_write_DMA21_START_ADDR(val) bfin_write32(DMA21_START_ADDR, val)
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#define bfin_read_DMA21_CONFIG() bfin_read16(DMA21_CONFIG)
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#define bfin_write_DMA21_CONFIG(val) bfin_write16(DMA21_CONFIG, val)
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#define bfin_read_DMA21_X_COUNT() bfin_read16(DMA21_X_COUNT)
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#define bfin_write_DMA21_X_COUNT(val) bfin_write16(DMA21_X_COUNT, val)
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#define bfin_read_DMA21_X_MODIFY() bfin_read16(DMA21_X_MODIFY)
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#define bfin_write_DMA21_X_MODIFY(val) bfin_write16(DMA21_X_MODIFY, val)
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#define bfin_read_DMA21_Y_COUNT() bfin_read16(DMA21_Y_COUNT)
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#define bfin_write_DMA21_Y_COUNT(val) bfin_write16(DMA21_Y_COUNT, val)
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#define bfin_read_DMA21_Y_MODIFY() bfin_read16(DMA21_Y_MODIFY)
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|
#define bfin_write_DMA21_Y_MODIFY(val) bfin_write16(DMA21_Y_MODIFY, val)
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#define bfin_read_DMA21_CURR_DESC_PTR() bfin_read32(DMA21_CURR_DESC_PTR)
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#define bfin_write_DMA21_CURR_DESC_PTR(val) bfin_write32(DMA21_CURR_DESC_PTR, val)
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#define bfin_read_DMA21_CURR_ADDR() bfin_read32(DMA21_CURR_ADDR)
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#define bfin_write_DMA21_CURR_ADDR(val) bfin_write32(DMA21_CURR_ADDR, val)
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#define bfin_read_DMA21_IRQ_STATUS() bfin_read16(DMA21_IRQ_STATUS)
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#define bfin_write_DMA21_IRQ_STATUS(val) bfin_write16(DMA21_IRQ_STATUS, val)
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#define bfin_read_DMA21_PERIPHERAL_MAP() bfin_read16(DMA21_PERIPHERAL_MAP)
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#define bfin_write_DMA21_PERIPHERAL_MAP(val) bfin_write16(DMA21_PERIPHERAL_MAP, val)
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#define bfin_read_DMA21_CURR_X_COUNT() bfin_read16(DMA21_CURR_X_COUNT)
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#define bfin_write_DMA21_CURR_X_COUNT(val) bfin_write16(DMA21_CURR_X_COUNT, val)
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|
#define bfin_read_DMA21_CURR_Y_COUNT() bfin_read16(DMA21_CURR_Y_COUNT)
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#define bfin_write_DMA21_CURR_Y_COUNT(val) bfin_write16(DMA21_CURR_Y_COUNT, val)
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/* DMA Channel 22 Registers */
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#define bfin_read_DMA22_NEXT_DESC_PTR() bfin_read32(DMA22_NEXT_DESC_PTR)
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#define bfin_write_DMA22_NEXT_DESC_PTR(val) bfin_write32(DMA22_NEXT_DESC_PTR, val)
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#define bfin_read_DMA22_START_ADDR() bfin_read32(DMA22_START_ADDR)
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#define bfin_write_DMA22_START_ADDR(val) bfin_write32(DMA22_START_ADDR, val)
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#define bfin_read_DMA22_CONFIG() bfin_read16(DMA22_CONFIG)
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#define bfin_write_DMA22_CONFIG(val) bfin_write16(DMA22_CONFIG, val)
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#define bfin_read_DMA22_X_COUNT() bfin_read16(DMA22_X_COUNT)
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#define bfin_write_DMA22_X_COUNT(val) bfin_write16(DMA22_X_COUNT, val)
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#define bfin_read_DMA22_X_MODIFY() bfin_read16(DMA22_X_MODIFY)
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#define bfin_write_DMA22_X_MODIFY(val) bfin_write16(DMA22_X_MODIFY, val)
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#define bfin_read_DMA22_Y_COUNT() bfin_read16(DMA22_Y_COUNT)
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#define bfin_write_DMA22_Y_COUNT(val) bfin_write16(DMA22_Y_COUNT, val)
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#define bfin_read_DMA22_Y_MODIFY() bfin_read16(DMA22_Y_MODIFY)
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#define bfin_write_DMA22_Y_MODIFY(val) bfin_write16(DMA22_Y_MODIFY, val)
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#define bfin_read_DMA22_CURR_DESC_PTR() bfin_read32(DMA22_CURR_DESC_PTR)
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#define bfin_write_DMA22_CURR_DESC_PTR(val) bfin_write32(DMA22_CURR_DESC_PTR, val)
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#define bfin_read_DMA22_CURR_ADDR() bfin_read32(DMA22_CURR_ADDR)
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#define bfin_write_DMA22_CURR_ADDR(val) bfin_write32(DMA22_CURR_ADDR, val)
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#define bfin_read_DMA22_IRQ_STATUS() bfin_read16(DMA22_IRQ_STATUS)
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#define bfin_write_DMA22_IRQ_STATUS(val) bfin_write16(DMA22_IRQ_STATUS, val)
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#define bfin_read_DMA22_PERIPHERAL_MAP() bfin_read16(DMA22_PERIPHERAL_MAP)
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#define bfin_write_DMA22_PERIPHERAL_MAP(val) bfin_write16(DMA22_PERIPHERAL_MAP, val)
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#define bfin_read_DMA22_CURR_X_COUNT() bfin_read16(DMA22_CURR_X_COUNT)
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#define bfin_write_DMA22_CURR_X_COUNT(val) bfin_write16(DMA22_CURR_X_COUNT, val)
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#define bfin_read_DMA22_CURR_Y_COUNT() bfin_read16(DMA22_CURR_Y_COUNT)
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#define bfin_write_DMA22_CURR_Y_COUNT(val) bfin_write16(DMA22_CURR_Y_COUNT, val)
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|
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/* DMA Channel 23 Registers */
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#define bfin_read_DMA23_NEXT_DESC_PTR() bfin_read32(DMA23_NEXT_DESC_PTR)
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#define bfin_write_DMA23_NEXT_DESC_PTR(val) bfin_write32(DMA23_NEXT_DESC_PTR, val)
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#define bfin_read_DMA23_START_ADDR() bfin_read32(DMA23_START_ADDR)
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#define bfin_write_DMA23_START_ADDR(val) bfin_write32(DMA23_START_ADDR, val)
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#define bfin_read_DMA23_CONFIG() bfin_read16(DMA23_CONFIG)
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#define bfin_write_DMA23_CONFIG(val) bfin_write16(DMA23_CONFIG, val)
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#define bfin_read_DMA23_X_COUNT() bfin_read16(DMA23_X_COUNT)
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#define bfin_write_DMA23_X_COUNT(val) bfin_write16(DMA23_X_COUNT, val)
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#define bfin_read_DMA23_X_MODIFY() bfin_read16(DMA23_X_MODIFY)
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#define bfin_write_DMA23_X_MODIFY(val) bfin_write16(DMA23_X_MODIFY, val)
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#define bfin_read_DMA23_Y_COUNT() bfin_read16(DMA23_Y_COUNT)
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#define bfin_write_DMA23_Y_COUNT(val) bfin_write16(DMA23_Y_COUNT, val)
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#define bfin_read_DMA23_Y_MODIFY() bfin_read16(DMA23_Y_MODIFY)
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|
#define bfin_write_DMA23_Y_MODIFY(val) bfin_write16(DMA23_Y_MODIFY, val)
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#define bfin_read_DMA23_CURR_DESC_PTR() bfin_read32(DMA23_CURR_DESC_PTR)
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|
#define bfin_write_DMA23_CURR_DESC_PTR(val) bfin_write32(DMA23_CURR_DESC_PTR, val)
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#define bfin_read_DMA23_CURR_ADDR() bfin_read32(DMA23_CURR_ADDR)
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#define bfin_write_DMA23_CURR_ADDR(val) bfin_write32(DMA23_CURR_ADDR, val)
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#define bfin_read_DMA23_IRQ_STATUS() bfin_read16(DMA23_IRQ_STATUS)
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#define bfin_write_DMA23_IRQ_STATUS(val) bfin_write16(DMA23_IRQ_STATUS, val)
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#define bfin_read_DMA23_PERIPHERAL_MAP() bfin_read16(DMA23_PERIPHERAL_MAP)
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|
#define bfin_write_DMA23_PERIPHERAL_MAP(val) bfin_write16(DMA23_PERIPHERAL_MAP, val)
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|
#define bfin_read_DMA23_CURR_X_COUNT() bfin_read16(DMA23_CURR_X_COUNT)
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|
#define bfin_write_DMA23_CURR_X_COUNT(val) bfin_write16(DMA23_CURR_X_COUNT, val)
|
|
#define bfin_read_DMA23_CURR_Y_COUNT() bfin_read16(DMA23_CURR_Y_COUNT)
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#define bfin_write_DMA23_CURR_Y_COUNT(val) bfin_write16(DMA23_CURR_Y_COUNT, val)
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|
|
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/* MDMA Stream 2 Registers */
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|
|
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#define bfin_read_MDMA_D2_NEXT_DESC_PTR() bfin_read32(MDMA_D2_NEXT_DESC_PTR)
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#define bfin_write_MDMA_D2_NEXT_DESC_PTR(val) bfin_write32(MDMA_D2_NEXT_DESC_PTR, val)
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#define bfin_read_MDMA_D2_START_ADDR() bfin_read32(MDMA_D2_START_ADDR)
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#define bfin_write_MDMA_D2_START_ADDR(val) bfin_write32(MDMA_D2_START_ADDR, val)
|
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#define bfin_read_MDMA_D2_CONFIG() bfin_read16(MDMA_D2_CONFIG)
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#define bfin_write_MDMA_D2_CONFIG(val) bfin_write16(MDMA_D2_CONFIG, val)
|
|
#define bfin_read_MDMA_D2_X_COUNT() bfin_read16(MDMA_D2_X_COUNT)
|
|
#define bfin_write_MDMA_D2_X_COUNT(val) bfin_write16(MDMA_D2_X_COUNT, val)
|
|
#define bfin_read_MDMA_D2_X_MODIFY() bfin_read16(MDMA_D2_X_MODIFY)
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|
#define bfin_write_MDMA_D2_X_MODIFY(val) bfin_write16(MDMA_D2_X_MODIFY, val)
|
|
#define bfin_read_MDMA_D2_Y_COUNT() bfin_read16(MDMA_D2_Y_COUNT)
|
|
#define bfin_write_MDMA_D2_Y_COUNT(val) bfin_write16(MDMA_D2_Y_COUNT, val)
|
|
#define bfin_read_MDMA_D2_Y_MODIFY() bfin_read16(MDMA_D2_Y_MODIFY)
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|
#define bfin_write_MDMA_D2_Y_MODIFY(val) bfin_write16(MDMA_D2_Y_MODIFY, val)
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|
#define bfin_read_MDMA_D2_CURR_DESC_PTR() bfin_read32(MDMA_D2_CURR_DESC_PTR)
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|
#define bfin_write_MDMA_D2_CURR_DESC_PTR(val) bfin_write32(MDMA_D2_CURR_DESC_PTR, val)
|
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#define bfin_read_MDMA_D2_CURR_ADDR() bfin_read32(MDMA_D2_CURR_ADDR)
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|
#define bfin_write_MDMA_D2_CURR_ADDR(val) bfin_write32(MDMA_D2_CURR_ADDR, val)
|
|
#define bfin_read_MDMA_D2_IRQ_STATUS() bfin_read16(MDMA_D2_IRQ_STATUS)
|
|
#define bfin_write_MDMA_D2_IRQ_STATUS(val) bfin_write16(MDMA_D2_IRQ_STATUS, val)
|
|
#define bfin_read_MDMA_D2_PERIPHERAL_MAP() bfin_read16(MDMA_D2_PERIPHERAL_MAP)
|
|
#define bfin_write_MDMA_D2_PERIPHERAL_MAP(val) bfin_write16(MDMA_D2_PERIPHERAL_MAP, val)
|
|
#define bfin_read_MDMA_D2_CURR_X_COUNT() bfin_read16(MDMA_D2_CURR_X_COUNT)
|
|
#define bfin_write_MDMA_D2_CURR_X_COUNT(val) bfin_write16(MDMA_D2_CURR_X_COUNT, val)
|
|
#define bfin_read_MDMA_D2_CURR_Y_COUNT() bfin_read16(MDMA_D2_CURR_Y_COUNT)
|
|
#define bfin_write_MDMA_D2_CURR_Y_COUNT(val) bfin_write16(MDMA_D2_CURR_Y_COUNT, val)
|
|
#define bfin_read_MDMA_S2_NEXT_DESC_PTR() bfin_read32(MDMA_S2_NEXT_DESC_PTR)
|
|
#define bfin_write_MDMA_S2_NEXT_DESC_PTR(val) bfin_write32(MDMA_S2_NEXT_DESC_PTR, val)
|
|
#define bfin_read_MDMA_S2_START_ADDR() bfin_read32(MDMA_S2_START_ADDR)
|
|
#define bfin_write_MDMA_S2_START_ADDR(val) bfin_write32(MDMA_S2_START_ADDR, val)
|
|
#define bfin_read_MDMA_S2_CONFIG() bfin_read16(MDMA_S2_CONFIG)
|
|
#define bfin_write_MDMA_S2_CONFIG(val) bfin_write16(MDMA_S2_CONFIG, val)
|
|
#define bfin_read_MDMA_S2_X_COUNT() bfin_read16(MDMA_S2_X_COUNT)
|
|
#define bfin_write_MDMA_S2_X_COUNT(val) bfin_write16(MDMA_S2_X_COUNT, val)
|
|
#define bfin_read_MDMA_S2_X_MODIFY() bfin_read16(MDMA_S2_X_MODIFY)
|
|
#define bfin_write_MDMA_S2_X_MODIFY(val) bfin_write16(MDMA_S2_X_MODIFY, val)
|
|
#define bfin_read_MDMA_S2_Y_COUNT() bfin_read16(MDMA_S2_Y_COUNT)
|
|
#define bfin_write_MDMA_S2_Y_COUNT(val) bfin_write16(MDMA_S2_Y_COUNT, val)
|
|
#define bfin_read_MDMA_S2_Y_MODIFY() bfin_read16(MDMA_S2_Y_MODIFY)
|
|
#define bfin_write_MDMA_S2_Y_MODIFY(val) bfin_write16(MDMA_S2_Y_MODIFY, val)
|
|
#define bfin_read_MDMA_S2_CURR_DESC_PTR() bfin_read32(MDMA_S2_CURR_DESC_PTR)
|
|
#define bfin_write_MDMA_S2_CURR_DESC_PTR(val) bfin_write32(MDMA_S2_CURR_DESC_PTR, val)
|
|
#define bfin_read_MDMA_S2_CURR_ADDR() bfin_read32(MDMA_S2_CURR_ADDR)
|
|
#define bfin_write_MDMA_S2_CURR_ADDR(val) bfin_write32(MDMA_S2_CURR_ADDR, val)
|
|
#define bfin_read_MDMA_S2_IRQ_STATUS() bfin_read16(MDMA_S2_IRQ_STATUS)
|
|
#define bfin_write_MDMA_S2_IRQ_STATUS(val) bfin_write16(MDMA_S2_IRQ_STATUS, val)
|
|
#define bfin_read_MDMA_S2_PERIPHERAL_MAP() bfin_read16(MDMA_S2_PERIPHERAL_MAP)
|
|
#define bfin_write_MDMA_S2_PERIPHERAL_MAP(val) bfin_write16(MDMA_S2_PERIPHERAL_MAP, val)
|
|
#define bfin_read_MDMA_S2_CURR_X_COUNT() bfin_read16(MDMA_S2_CURR_X_COUNT)
|
|
#define bfin_write_MDMA_S2_CURR_X_COUNT(val) bfin_write16(MDMA_S2_CURR_X_COUNT, val)
|
|
#define bfin_read_MDMA_S2_CURR_Y_COUNT() bfin_read16(MDMA_S2_CURR_Y_COUNT)
|
|
#define bfin_write_MDMA_S2_CURR_Y_COUNT(val) bfin_write16(MDMA_S2_CURR_Y_COUNT, val)
|
|
|
|
/* MDMA Stream 3 Registers */
|
|
|
|
#define bfin_read_MDMA_D3_NEXT_DESC_PTR() bfin_read32(MDMA_D3_NEXT_DESC_PTR)
|
|
#define bfin_write_MDMA_D3_NEXT_DESC_PTR(val) bfin_write32(MDMA_D3_NEXT_DESC_PTR, val)
|
|
#define bfin_read_MDMA_D3_START_ADDR() bfin_read32(MDMA_D3_START_ADDR)
|
|
#define bfin_write_MDMA_D3_START_ADDR(val) bfin_write32(MDMA_D3_START_ADDR, val)
|
|
#define bfin_read_MDMA_D3_CONFIG() bfin_read16(MDMA_D3_CONFIG)
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#define bfin_write_MDMA_D3_CONFIG(val) bfin_write16(MDMA_D3_CONFIG, val)
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#define bfin_read_MDMA_D3_X_COUNT() bfin_read16(MDMA_D3_X_COUNT)
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#define bfin_write_MDMA_D3_X_COUNT(val) bfin_write16(MDMA_D3_X_COUNT, val)
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#define bfin_read_MDMA_D3_X_MODIFY() bfin_read16(MDMA_D3_X_MODIFY)
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#define bfin_write_MDMA_D3_X_MODIFY(val) bfin_write16(MDMA_D3_X_MODIFY, val)
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#define bfin_read_MDMA_D3_Y_COUNT() bfin_read16(MDMA_D3_Y_COUNT)
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#define bfin_write_MDMA_D3_Y_COUNT(val) bfin_write16(MDMA_D3_Y_COUNT, val)
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#define bfin_read_MDMA_D3_Y_MODIFY() bfin_read16(MDMA_D3_Y_MODIFY)
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#define bfin_write_MDMA_D3_Y_MODIFY(val) bfin_write16(MDMA_D3_Y_MODIFY, val)
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#define bfin_read_MDMA_D3_CURR_DESC_PTR() bfin_read32(MDMA_D3_CURR_DESC_PTR)
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#define bfin_write_MDMA_D3_CURR_DESC_PTR(val) bfin_write32(MDMA_D3_CURR_DESC_PTR, val)
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#define bfin_read_MDMA_D3_CURR_ADDR() bfin_read32(MDMA_D3_CURR_ADDR)
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#define bfin_write_MDMA_D3_CURR_ADDR(val) bfin_write32(MDMA_D3_CURR_ADDR, val)
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#define bfin_read_MDMA_D3_IRQ_STATUS() bfin_read16(MDMA_D3_IRQ_STATUS)
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#define bfin_write_MDMA_D3_IRQ_STATUS(val) bfin_write16(MDMA_D3_IRQ_STATUS, val)
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#define bfin_read_MDMA_D3_PERIPHERAL_MAP() bfin_read16(MDMA_D3_PERIPHERAL_MAP)
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#define bfin_write_MDMA_D3_PERIPHERAL_MAP(val) bfin_write16(MDMA_D3_PERIPHERAL_MAP, val)
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#define bfin_read_MDMA_D3_CURR_X_COUNT() bfin_read16(MDMA_D3_CURR_X_COUNT)
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#define bfin_write_MDMA_D3_CURR_X_COUNT(val) bfin_write16(MDMA_D3_CURR_X_COUNT, val)
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#define bfin_read_MDMA_D3_CURR_Y_COUNT() bfin_read16(MDMA_D3_CURR_Y_COUNT)
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#define bfin_write_MDMA_D3_CURR_Y_COUNT(val) bfin_write16(MDMA_D3_CURR_Y_COUNT, val)
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#define bfin_read_MDMA_S3_NEXT_DESC_PTR() bfin_read32(MDMA_S3_NEXT_DESC_PTR)
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#define bfin_write_MDMA_S3_NEXT_DESC_PTR(val) bfin_write32(MDMA_S3_NEXT_DESC_PTR, val)
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#define bfin_read_MDMA_S3_START_ADDR() bfin_read32(MDMA_S3_START_ADDR)
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#define bfin_write_MDMA_S3_START_ADDR(val) bfin_write32(MDMA_S3_START_ADDR, val)
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#define bfin_read_MDMA_S3_CONFIG() bfin_read16(MDMA_S3_CONFIG)
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#define bfin_write_MDMA_S3_CONFIG(val) bfin_write16(MDMA_S3_CONFIG, val)
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#define bfin_read_MDMA_S3_X_COUNT() bfin_read16(MDMA_S3_X_COUNT)
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#define bfin_write_MDMA_S3_X_COUNT(val) bfin_write16(MDMA_S3_X_COUNT, val)
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#define bfin_read_MDMA_S3_X_MODIFY() bfin_read16(MDMA_S3_X_MODIFY)
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#define bfin_write_MDMA_S3_X_MODIFY(val) bfin_write16(MDMA_S3_X_MODIFY, val)
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#define bfin_read_MDMA_S3_Y_COUNT() bfin_read16(MDMA_S3_Y_COUNT)
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#define bfin_write_MDMA_S3_Y_COUNT(val) bfin_write16(MDMA_S3_Y_COUNT, val)
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#define bfin_read_MDMA_S3_Y_MODIFY() bfin_read16(MDMA_S3_Y_MODIFY)
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#define bfin_write_MDMA_S3_Y_MODIFY(val) bfin_write16(MDMA_S3_Y_MODIFY, val)
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#define bfin_read_MDMA_S3_CURR_DESC_PTR() bfin_read32(MDMA_S3_CURR_DESC_PTR)
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#define bfin_write_MDMA_S3_CURR_DESC_PTR(val) bfin_write32(MDMA_S3_CURR_DESC_PTR, val)
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#define bfin_read_MDMA_S3_CURR_ADDR() bfin_read32(MDMA_S3_CURR_ADDR)
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#define bfin_write_MDMA_S3_CURR_ADDR(val) bfin_write32(MDMA_S3_CURR_ADDR, val)
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#define bfin_read_MDMA_S3_IRQ_STATUS() bfin_read16(MDMA_S3_IRQ_STATUS)
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#define bfin_write_MDMA_S3_IRQ_STATUS(val) bfin_write16(MDMA_S3_IRQ_STATUS, val)
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#define bfin_read_MDMA_S3_PERIPHERAL_MAP() bfin_read16(MDMA_S3_PERIPHERAL_MAP)
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#define bfin_write_MDMA_S3_PERIPHERAL_MAP(val) bfin_write16(MDMA_S3_PERIPHERAL_MAP, val)
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#define bfin_read_MDMA_S3_CURR_X_COUNT() bfin_read16(MDMA_S3_CURR_X_COUNT)
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#define bfin_write_MDMA_S3_CURR_X_COUNT(val) bfin_write16(MDMA_S3_CURR_X_COUNT, val)
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#define bfin_read_MDMA_S3_CURR_Y_COUNT() bfin_read16(MDMA_S3_CURR_Y_COUNT)
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#define bfin_write_MDMA_S3_CURR_Y_COUNT(val) bfin_write16(MDMA_S3_CURR_Y_COUNT, val)
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/* UART1 Registers */
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#define bfin_read_UART1_DLL() bfin_read16(UART1_DLL)
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#define bfin_write_UART1_DLL(val) bfin_write16(UART1_DLL, val)
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#define bfin_read_UART1_DLH() bfin_read16(UART1_DLH)
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#define bfin_write_UART1_DLH(val) bfin_write16(UART1_DLH, val)
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#define bfin_read_UART1_GCTL() bfin_read16(UART1_GCTL)
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#define bfin_write_UART1_GCTL(val) bfin_write16(UART1_GCTL, val)
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#define bfin_read_UART1_LCR() bfin_read16(UART1_LCR)
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#define bfin_write_UART1_LCR(val) bfin_write16(UART1_LCR, val)
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#define bfin_read_UART1_MCR() bfin_read16(UART1_MCR)
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#define bfin_write_UART1_MCR(val) bfin_write16(UART1_MCR, val)
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#define bfin_read_UART1_LSR() bfin_read16(UART1_LSR)
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#define bfin_write_UART1_LSR(val) bfin_write16(UART1_LSR, val)
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#define bfin_read_UART1_MSR() bfin_read16(UART1_MSR)
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#define bfin_write_UART1_MSR(val) bfin_write16(UART1_MSR, val)
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#define bfin_read_UART1_SCR() bfin_read16(UART1_SCR)
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#define bfin_write_UART1_SCR(val) bfin_write16(UART1_SCR, val)
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#define bfin_read_UART1_IER_SET() bfin_read16(UART1_IER_SET)
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#define bfin_write_UART1_IER_SET(val) bfin_write16(UART1_IER_SET, val)
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#define bfin_read_UART1_IER_CLEAR() bfin_read16(UART1_IER_CLEAR)
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#define bfin_write_UART1_IER_CLEAR(val) bfin_write16(UART1_IER_CLEAR, val)
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#define bfin_read_UART1_THR() bfin_read16(UART1_THR)
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#define bfin_write_UART1_THR(val) bfin_write16(UART1_THR, val)
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#define bfin_read_UART1_RBR() bfin_read16(UART1_RBR)
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#define bfin_write_UART1_RBR(val) bfin_write16(UART1_RBR, val)
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/* UART2 is not defined in the shared file because it is not available on the ADSP-BF542 and ADSP-BF544 bfin_read_()rocessors */
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/* SPI1 Registers */
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#define bfin_read_SPI1_CTL() bfin_read16(SPI1_CTL)
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#define bfin_write_SPI1_CTL(val) bfin_write16(SPI1_CTL, val)
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#define bfin_read_SPI1_FLG() bfin_read16(SPI1_FLG)
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#define bfin_write_SPI1_FLG(val) bfin_write16(SPI1_FLG, val)
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#define bfin_read_SPI1_STAT() bfin_read16(SPI1_STAT)
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#define bfin_write_SPI1_STAT(val) bfin_write16(SPI1_STAT, val)
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#define bfin_read_SPI1_TDBR() bfin_read16(SPI1_TDBR)
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#define bfin_write_SPI1_TDBR(val) bfin_write16(SPI1_TDBR, val)
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#define bfin_read_SPI1_RDBR() bfin_read16(SPI1_RDBR)
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#define bfin_write_SPI1_RDBR(val) bfin_write16(SPI1_RDBR, val)
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#define bfin_read_SPI1_BAUD() bfin_read16(SPI1_BAUD)
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#define bfin_write_SPI1_BAUD(val) bfin_write16(SPI1_BAUD, val)
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#define bfin_read_SPI1_SHADOW() bfin_read16(SPI1_SHADOW)
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#define bfin_write_SPI1_SHADOW(val) bfin_write16(SPI1_SHADOW, val)
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/* SPORT2 Registers */
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#define bfin_read_SPORT2_TCR1() bfin_read16(SPORT2_TCR1)
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#define bfin_write_SPORT2_TCR1(val) bfin_write16(SPORT2_TCR1, val)
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#define bfin_read_SPORT2_TCR2() bfin_read16(SPORT2_TCR2)
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#define bfin_write_SPORT2_TCR2(val) bfin_write16(SPORT2_TCR2, val)
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#define bfin_read_SPORT2_TCLKDIV() bfin_read16(SPORT2_TCLKDIV)
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#define bfin_write_SPORT2_TCLKDIV(val) bfin_write16(SPORT2_TCLKDIV, val)
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#define bfin_read_SPORT2_TFSDIV() bfin_read16(SPORT2_TFSDIV)
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#define bfin_write_SPORT2_TFSDIV(val) bfin_write16(SPORT2_TFSDIV, val)
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#define bfin_read_SPORT2_TX() bfin_read32(SPORT2_TX)
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#define bfin_write_SPORT2_TX(val) bfin_write32(SPORT2_TX, val)
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#define bfin_read_SPORT2_RX() bfin_read32(SPORT2_RX)
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#define bfin_write_SPORT2_RX(val) bfin_write32(SPORT2_RX, val)
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#define bfin_read_SPORT2_RCR1() bfin_read16(SPORT2_RCR1)
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#define bfin_write_SPORT2_RCR1(val) bfin_write16(SPORT2_RCR1, val)
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#define bfin_read_SPORT2_RCR2() bfin_read16(SPORT2_RCR2)
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#define bfin_write_SPORT2_RCR2(val) bfin_write16(SPORT2_RCR2, val)
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#define bfin_read_SPORT2_RCLKDIV() bfin_read16(SPORT2_RCLKDIV)
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#define bfin_write_SPORT2_RCLKDIV(val) bfin_write16(SPORT2_RCLKDIV, val)
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#define bfin_read_SPORT2_RFSDIV() bfin_read16(SPORT2_RFSDIV)
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#define bfin_write_SPORT2_RFSDIV(val) bfin_write16(SPORT2_RFSDIV, val)
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#define bfin_read_SPORT2_STAT() bfin_read16(SPORT2_STAT)
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#define bfin_write_SPORT2_STAT(val) bfin_write16(SPORT2_STAT, val)
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#define bfin_read_SPORT2_CHNL() bfin_read16(SPORT2_CHNL)
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#define bfin_write_SPORT2_CHNL(val) bfin_write16(SPORT2_CHNL, val)
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#define bfin_read_SPORT2_MCMC1() bfin_read16(SPORT2_MCMC1)
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#define bfin_write_SPORT2_MCMC1(val) bfin_write16(SPORT2_MCMC1, val)
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#define bfin_read_SPORT2_MCMC2() bfin_read16(SPORT2_MCMC2)
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#define bfin_write_SPORT2_MCMC2(val) bfin_write16(SPORT2_MCMC2, val)
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#define bfin_read_SPORT2_MTCS0() bfin_read32(SPORT2_MTCS0)
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#define bfin_write_SPORT2_MTCS0(val) bfin_write32(SPORT2_MTCS0, val)
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#define bfin_read_SPORT2_MTCS1() bfin_read32(SPORT2_MTCS1)
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#define bfin_write_SPORT2_MTCS1(val) bfin_write32(SPORT2_MTCS1, val)
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#define bfin_read_SPORT2_MTCS2() bfin_read32(SPORT2_MTCS2)
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#define bfin_write_SPORT2_MTCS2(val) bfin_write32(SPORT2_MTCS2, val)
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#define bfin_read_SPORT2_MTCS3() bfin_read32(SPORT2_MTCS3)
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#define bfin_write_SPORT2_MTCS3(val) bfin_write32(SPORT2_MTCS3, val)
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#define bfin_read_SPORT2_MRCS0() bfin_read32(SPORT2_MRCS0)
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#define bfin_write_SPORT2_MRCS0(val) bfin_write32(SPORT2_MRCS0, val)
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#define bfin_read_SPORT2_MRCS1() bfin_read32(SPORT2_MRCS1)
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#define bfin_write_SPORT2_MRCS1(val) bfin_write32(SPORT2_MRCS1, val)
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#define bfin_read_SPORT2_MRCS2() bfin_read32(SPORT2_MRCS2)
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#define bfin_write_SPORT2_MRCS2(val) bfin_write32(SPORT2_MRCS2, val)
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#define bfin_read_SPORT2_MRCS3() bfin_read32(SPORT2_MRCS3)
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#define bfin_write_SPORT2_MRCS3(val) bfin_write32(SPORT2_MRCS3, val)
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|
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/* SPORT3 Registers */
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|
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#define bfin_read_SPORT3_TCR1() bfin_read16(SPORT3_TCR1)
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#define bfin_write_SPORT3_TCR1(val) bfin_write16(SPORT3_TCR1, val)
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#define bfin_read_SPORT3_TCR2() bfin_read16(SPORT3_TCR2)
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#define bfin_write_SPORT3_TCR2(val) bfin_write16(SPORT3_TCR2, val)
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#define bfin_read_SPORT3_TCLKDIV() bfin_read16(SPORT3_TCLKDIV)
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#define bfin_write_SPORT3_TCLKDIV(val) bfin_write16(SPORT3_TCLKDIV, val)
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#define bfin_read_SPORT3_TFSDIV() bfin_read16(SPORT3_TFSDIV)
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#define bfin_write_SPORT3_TFSDIV(val) bfin_write16(SPORT3_TFSDIV, val)
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#define bfin_read_SPORT3_TX() bfin_read32(SPORT3_TX)
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#define bfin_write_SPORT3_TX(val) bfin_write32(SPORT3_TX, val)
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#define bfin_read_SPORT3_RX() bfin_read32(SPORT3_RX)
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#define bfin_write_SPORT3_RX(val) bfin_write32(SPORT3_RX, val)
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#define bfin_read_SPORT3_RCR1() bfin_read16(SPORT3_RCR1)
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#define bfin_write_SPORT3_RCR1(val) bfin_write16(SPORT3_RCR1, val)
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#define bfin_read_SPORT3_RCR2() bfin_read16(SPORT3_RCR2)
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#define bfin_write_SPORT3_RCR2(val) bfin_write16(SPORT3_RCR2, val)
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#define bfin_read_SPORT3_RCLKDIV() bfin_read16(SPORT3_RCLKDIV)
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|
#define bfin_write_SPORT3_RCLKDIV(val) bfin_write16(SPORT3_RCLKDIV, val)
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|
#define bfin_read_SPORT3_RFSDIV() bfin_read16(SPORT3_RFSDIV)
|
|
#define bfin_write_SPORT3_RFSDIV(val) bfin_write16(SPORT3_RFSDIV, val)
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|
#define bfin_read_SPORT3_STAT() bfin_read16(SPORT3_STAT)
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|
#define bfin_write_SPORT3_STAT(val) bfin_write16(SPORT3_STAT, val)
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#define bfin_read_SPORT3_CHNL() bfin_read16(SPORT3_CHNL)
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|
#define bfin_write_SPORT3_CHNL(val) bfin_write16(SPORT3_CHNL, val)
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|
#define bfin_read_SPORT3_MCMC1() bfin_read16(SPORT3_MCMC1)
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|
#define bfin_write_SPORT3_MCMC1(val) bfin_write16(SPORT3_MCMC1, val)
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|
#define bfin_read_SPORT3_MCMC2() bfin_read16(SPORT3_MCMC2)
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|
#define bfin_write_SPORT3_MCMC2(val) bfin_write16(SPORT3_MCMC2, val)
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|
#define bfin_read_SPORT3_MTCS0() bfin_read32(SPORT3_MTCS0)
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|
#define bfin_write_SPORT3_MTCS0(val) bfin_write32(SPORT3_MTCS0, val)
|
|
#define bfin_read_SPORT3_MTCS1() bfin_read32(SPORT3_MTCS1)
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|
#define bfin_write_SPORT3_MTCS1(val) bfin_write32(SPORT3_MTCS1, val)
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|
#define bfin_read_SPORT3_MTCS2() bfin_read32(SPORT3_MTCS2)
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|
#define bfin_write_SPORT3_MTCS2(val) bfin_write32(SPORT3_MTCS2, val)
|
|
#define bfin_read_SPORT3_MTCS3() bfin_read32(SPORT3_MTCS3)
|
|
#define bfin_write_SPORT3_MTCS3(val) bfin_write32(SPORT3_MTCS3, val)
|
|
#define bfin_read_SPORT3_MRCS0() bfin_read32(SPORT3_MRCS0)
|
|
#define bfin_write_SPORT3_MRCS0(val) bfin_write32(SPORT3_MRCS0, val)
|
|
#define bfin_read_SPORT3_MRCS1() bfin_read32(SPORT3_MRCS1)
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|
#define bfin_write_SPORT3_MRCS1(val) bfin_write32(SPORT3_MRCS1, val)
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|
#define bfin_read_SPORT3_MRCS2() bfin_read32(SPORT3_MRCS2)
|
|
#define bfin_write_SPORT3_MRCS2(val) bfin_write32(SPORT3_MRCS2, val)
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|
#define bfin_read_SPORT3_MRCS3() bfin_read32(SPORT3_MRCS3)
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|
#define bfin_write_SPORT3_MRCS3(val) bfin_write32(SPORT3_MRCS3, val)
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|
|
|
/* EPPI2 Registers */
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|
|
|
#define bfin_read_EPPI2_STATUS() bfin_read16(EPPI2_STATUS)
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|
#define bfin_write_EPPI2_STATUS(val) bfin_write16(EPPI2_STATUS, val)
|
|
#define bfin_read_EPPI2_HCOUNT() bfin_read16(EPPI2_HCOUNT)
|
|
#define bfin_write_EPPI2_HCOUNT(val) bfin_write16(EPPI2_HCOUNT, val)
|
|
#define bfin_read_EPPI2_HDELAY() bfin_read16(EPPI2_HDELAY)
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|
#define bfin_write_EPPI2_HDELAY(val) bfin_write16(EPPI2_HDELAY, val)
|
|
#define bfin_read_EPPI2_VCOUNT() bfin_read16(EPPI2_VCOUNT)
|
|
#define bfin_write_EPPI2_VCOUNT(val) bfin_write16(EPPI2_VCOUNT, val)
|
|
#define bfin_read_EPPI2_VDELAY() bfin_read16(EPPI2_VDELAY)
|
|
#define bfin_write_EPPI2_VDELAY(val) bfin_write16(EPPI2_VDELAY, val)
|
|
#define bfin_read_EPPI2_FRAME() bfin_read16(EPPI2_FRAME)
|
|
#define bfin_write_EPPI2_FRAME(val) bfin_write16(EPPI2_FRAME, val)
|
|
#define bfin_read_EPPI2_LINE() bfin_read16(EPPI2_LINE)
|
|
#define bfin_write_EPPI2_LINE(val) bfin_write16(EPPI2_LINE, val)
|
|
#define bfin_read_EPPI2_CLKDIV() bfin_read16(EPPI2_CLKDIV)
|
|
#define bfin_write_EPPI2_CLKDIV(val) bfin_write16(EPPI2_CLKDIV, val)
|
|
#define bfin_read_EPPI2_CONTROL() bfin_read32(EPPI2_CONTROL)
|
|
#define bfin_write_EPPI2_CONTROL(val) bfin_write32(EPPI2_CONTROL, val)
|
|
#define bfin_read_EPPI2_FS1W_HBL() bfin_read32(EPPI2_FS1W_HBL)
|
|
#define bfin_write_EPPI2_FS1W_HBL(val) bfin_write32(EPPI2_FS1W_HBL, val)
|
|
#define bfin_read_EPPI2_FS1P_AVPL() bfin_read32(EPPI2_FS1P_AVPL)
|
|
#define bfin_write_EPPI2_FS1P_AVPL(val) bfin_write32(EPPI2_FS1P_AVPL, val)
|
|
#define bfin_read_EPPI2_FS2W_LVB() bfin_read32(EPPI2_FS2W_LVB)
|
|
#define bfin_write_EPPI2_FS2W_LVB(val) bfin_write32(EPPI2_FS2W_LVB, val)
|
|
#define bfin_read_EPPI2_FS2P_LAVF() bfin_read32(EPPI2_FS2P_LAVF)
|
|
#define bfin_write_EPPI2_FS2P_LAVF(val) bfin_write32(EPPI2_FS2P_LAVF, val)
|
|
#define bfin_read_EPPI2_CLIP() bfin_read32(EPPI2_CLIP)
|
|
#define bfin_write_EPPI2_CLIP(val) bfin_write32(EPPI2_CLIP, val)
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/* CAN Controller 0 Config 1 Registers */
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#define bfin_read_CAN0_MC1() bfin_read16(CAN0_MC1)
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#define bfin_write_CAN0_MC1(val) bfin_write16(CAN0_MC1, val)
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#define bfin_read_CAN0_MD1() bfin_read16(CAN0_MD1)
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#define bfin_write_CAN0_MD1(val) bfin_write16(CAN0_MD1, val)
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#define bfin_read_CAN0_TRS1() bfin_read16(CAN0_TRS1)
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#define bfin_write_CAN0_TRS1(val) bfin_write16(CAN0_TRS1, val)
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#define bfin_read_CAN0_TRR1() bfin_read16(CAN0_TRR1)
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#define bfin_write_CAN0_TRR1(val) bfin_write16(CAN0_TRR1, val)
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#define bfin_read_CAN0_TA1() bfin_read16(CAN0_TA1)
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#define bfin_write_CAN0_TA1(val) bfin_write16(CAN0_TA1, val)
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#define bfin_read_CAN0_AA1() bfin_read16(CAN0_AA1)
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#define bfin_write_CAN0_AA1(val) bfin_write16(CAN0_AA1, val)
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#define bfin_read_CAN0_RMP1() bfin_read16(CAN0_RMP1)
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#define bfin_write_CAN0_RMP1(val) bfin_write16(CAN0_RMP1, val)
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#define bfin_read_CAN0_RML1() bfin_read16(CAN0_RML1)
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#define bfin_write_CAN0_RML1(val) bfin_write16(CAN0_RML1, val)
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#define bfin_read_CAN0_MBTIF1() bfin_read16(CAN0_MBTIF1)
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#define bfin_write_CAN0_MBTIF1(val) bfin_write16(CAN0_MBTIF1, val)
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#define bfin_read_CAN0_MBRIF1() bfin_read16(CAN0_MBRIF1)
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#define bfin_write_CAN0_MBRIF1(val) bfin_write16(CAN0_MBRIF1, val)
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#define bfin_read_CAN0_MBIM1() bfin_read16(CAN0_MBIM1)
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#define bfin_write_CAN0_MBIM1(val) bfin_write16(CAN0_MBIM1, val)
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#define bfin_read_CAN0_RFH1() bfin_read16(CAN0_RFH1)
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#define bfin_write_CAN0_RFH1(val) bfin_write16(CAN0_RFH1, val)
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#define bfin_read_CAN0_OPSS1() bfin_read16(CAN0_OPSS1)
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#define bfin_write_CAN0_OPSS1(val) bfin_write16(CAN0_OPSS1, val)
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/* CAN Controller 0 Config 2 Registers */
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#define bfin_read_CAN0_MC2() bfin_read16(CAN0_MC2)
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#define bfin_write_CAN0_MC2(val) bfin_write16(CAN0_MC2, val)
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#define bfin_read_CAN0_MD2() bfin_read16(CAN0_MD2)
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#define bfin_write_CAN0_MD2(val) bfin_write16(CAN0_MD2, val)
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#define bfin_read_CAN0_TRS2() bfin_read16(CAN0_TRS2)
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#define bfin_write_CAN0_TRS2(val) bfin_write16(CAN0_TRS2, val)
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#define bfin_read_CAN0_TRR2() bfin_read16(CAN0_TRR2)
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#define bfin_write_CAN0_TRR2(val) bfin_write16(CAN0_TRR2, val)
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#define bfin_read_CAN0_TA2() bfin_read16(CAN0_TA2)
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#define bfin_write_CAN0_TA2(val) bfin_write16(CAN0_TA2, val)
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#define bfin_read_CAN0_AA2() bfin_read16(CAN0_AA2)
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#define bfin_write_CAN0_AA2(val) bfin_write16(CAN0_AA2, val)
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#define bfin_read_CAN0_RMP2() bfin_read16(CAN0_RMP2)
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#define bfin_write_CAN0_RMP2(val) bfin_write16(CAN0_RMP2, val)
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#define bfin_read_CAN0_RML2() bfin_read16(CAN0_RML2)
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#define bfin_write_CAN0_RML2(val) bfin_write16(CAN0_RML2, val)
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#define bfin_read_CAN0_MBTIF2() bfin_read16(CAN0_MBTIF2)
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#define bfin_write_CAN0_MBTIF2(val) bfin_write16(CAN0_MBTIF2, val)
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#define bfin_read_CAN0_MBRIF2() bfin_read16(CAN0_MBRIF2)
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#define bfin_write_CAN0_MBRIF2(val) bfin_write16(CAN0_MBRIF2, val)
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#define bfin_read_CAN0_MBIM2() bfin_read16(CAN0_MBIM2)
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#define bfin_write_CAN0_MBIM2(val) bfin_write16(CAN0_MBIM2, val)
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#define bfin_read_CAN0_RFH2() bfin_read16(CAN0_RFH2)
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#define bfin_write_CAN0_RFH2(val) bfin_write16(CAN0_RFH2, val)
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#define bfin_read_CAN0_OPSS2() bfin_read16(CAN0_OPSS2)
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#define bfin_write_CAN0_OPSS2(val) bfin_write16(CAN0_OPSS2, val)
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/* CAN Controller 0 Clock/Interrubfin_read_()t/Counter Registers */
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#define bfin_read_CAN0_CLOCK() bfin_read16(CAN0_CLOCK)
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#define bfin_write_CAN0_CLOCK(val) bfin_write16(CAN0_CLOCK, val)
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#define bfin_read_CAN0_TIMING() bfin_read16(CAN0_TIMING)
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#define bfin_write_CAN0_TIMING(val) bfin_write16(CAN0_TIMING, val)
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#define bfin_read_CAN0_DEBUG() bfin_read16(CAN0_DEBUG)
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#define bfin_write_CAN0_DEBUG(val) bfin_write16(CAN0_DEBUG, val)
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#define bfin_read_CAN0_STATUS() bfin_read16(CAN0_STATUS)
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#define bfin_write_CAN0_STATUS(val) bfin_write16(CAN0_STATUS, val)
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#define bfin_read_CAN0_CEC() bfin_read16(CAN0_CEC)
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#define bfin_write_CAN0_CEC(val) bfin_write16(CAN0_CEC, val)
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#define bfin_read_CAN0_GIS() bfin_read16(CAN0_GIS)
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#define bfin_write_CAN0_GIS(val) bfin_write16(CAN0_GIS, val)
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#define bfin_read_CAN0_GIM() bfin_read16(CAN0_GIM)
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#define bfin_write_CAN0_GIM(val) bfin_write16(CAN0_GIM, val)
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#define bfin_read_CAN0_GIF() bfin_read16(CAN0_GIF)
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#define bfin_write_CAN0_GIF(val) bfin_write16(CAN0_GIF, val)
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#define bfin_read_CAN0_CONTROL() bfin_read16(CAN0_CONTROL)
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#define bfin_write_CAN0_CONTROL(val) bfin_write16(CAN0_CONTROL, val)
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#define bfin_read_CAN0_INTR() bfin_read16(CAN0_INTR)
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#define bfin_write_CAN0_INTR(val) bfin_write16(CAN0_INTR, val)
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#define bfin_read_CAN0_MBTD() bfin_read16(CAN0_MBTD)
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#define bfin_write_CAN0_MBTD(val) bfin_write16(CAN0_MBTD, val)
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#define bfin_read_CAN0_EWR() bfin_read16(CAN0_EWR)
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#define bfin_write_CAN0_EWR(val) bfin_write16(CAN0_EWR, val)
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#define bfin_read_CAN0_ESR() bfin_read16(CAN0_ESR)
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#define bfin_write_CAN0_ESR(val) bfin_write16(CAN0_ESR, val)
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#define bfin_read_CAN0_UCCNT() bfin_read16(CAN0_UCCNT)
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#define bfin_write_CAN0_UCCNT(val) bfin_write16(CAN0_UCCNT, val)
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#define bfin_read_CAN0_UCRC() bfin_read16(CAN0_UCRC)
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#define bfin_write_CAN0_UCRC(val) bfin_write16(CAN0_UCRC, val)
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#define bfin_read_CAN0_UCCNF() bfin_read16(CAN0_UCCNF)
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#define bfin_write_CAN0_UCCNF(val) bfin_write16(CAN0_UCCNF, val)
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/* CAN Controller 0 Accebfin_read_()tance Registers */
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#define bfin_read_CAN0_AM00L() bfin_read16(CAN0_AM00L)
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#define bfin_write_CAN0_AM00L(val) bfin_write16(CAN0_AM00L, val)
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#define bfin_read_CAN0_AM00H() bfin_read16(CAN0_AM00H)
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#define bfin_write_CAN0_AM00H(val) bfin_write16(CAN0_AM00H, val)
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#define bfin_read_CAN0_AM01L() bfin_read16(CAN0_AM01L)
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#define bfin_write_CAN0_AM01L(val) bfin_write16(CAN0_AM01L, val)
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#define bfin_read_CAN0_AM01H() bfin_read16(CAN0_AM01H)
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#define bfin_write_CAN0_AM01H(val) bfin_write16(CAN0_AM01H, val)
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#define bfin_read_CAN0_AM02L() bfin_read16(CAN0_AM02L)
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#define bfin_write_CAN0_AM02L(val) bfin_write16(CAN0_AM02L, val)
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#define bfin_read_CAN0_AM02H() bfin_read16(CAN0_AM02H)
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#define bfin_write_CAN0_AM02H(val) bfin_write16(CAN0_AM02H, val)
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#define bfin_read_CAN0_AM03L() bfin_read16(CAN0_AM03L)
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#define bfin_write_CAN0_AM03L(val) bfin_write16(CAN0_AM03L, val)
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#define bfin_read_CAN0_AM03H() bfin_read16(CAN0_AM03H)
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#define bfin_write_CAN0_AM03H(val) bfin_write16(CAN0_AM03H, val)
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#define bfin_read_CAN0_AM04L() bfin_read16(CAN0_AM04L)
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#define bfin_write_CAN0_AM04L(val) bfin_write16(CAN0_AM04L, val)
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#define bfin_read_CAN0_AM04H() bfin_read16(CAN0_AM04H)
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#define bfin_write_CAN0_AM04H(val) bfin_write16(CAN0_AM04H, val)
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#define bfin_read_CAN0_AM05L() bfin_read16(CAN0_AM05L)
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#define bfin_write_CAN0_AM05L(val) bfin_write16(CAN0_AM05L, val)
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#define bfin_read_CAN0_AM05H() bfin_read16(CAN0_AM05H)
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#define bfin_write_CAN0_AM05H(val) bfin_write16(CAN0_AM05H, val)
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#define bfin_read_CAN0_AM06L() bfin_read16(CAN0_AM06L)
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#define bfin_write_CAN0_AM06L(val) bfin_write16(CAN0_AM06L, val)
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#define bfin_read_CAN0_AM06H() bfin_read16(CAN0_AM06H)
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#define bfin_write_CAN0_AM06H(val) bfin_write16(CAN0_AM06H, val)
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#define bfin_read_CAN0_AM07L() bfin_read16(CAN0_AM07L)
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#define bfin_write_CAN0_AM07L(val) bfin_write16(CAN0_AM07L, val)
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#define bfin_read_CAN0_AM07H() bfin_read16(CAN0_AM07H)
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#define bfin_write_CAN0_AM07H(val) bfin_write16(CAN0_AM07H, val)
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#define bfin_read_CAN0_AM08L() bfin_read16(CAN0_AM08L)
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#define bfin_write_CAN0_AM08L(val) bfin_write16(CAN0_AM08L, val)
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#define bfin_read_CAN0_AM08H() bfin_read16(CAN0_AM08H)
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#define bfin_write_CAN0_AM08H(val) bfin_write16(CAN0_AM08H, val)
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#define bfin_read_CAN0_AM09L() bfin_read16(CAN0_AM09L)
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#define bfin_write_CAN0_AM09L(val) bfin_write16(CAN0_AM09L, val)
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#define bfin_read_CAN0_AM09H() bfin_read16(CAN0_AM09H)
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#define bfin_write_CAN0_AM09H(val) bfin_write16(CAN0_AM09H, val)
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#define bfin_read_CAN0_AM10L() bfin_read16(CAN0_AM10L)
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#define bfin_write_CAN0_AM10L(val) bfin_write16(CAN0_AM10L, val)
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#define bfin_read_CAN0_AM10H() bfin_read16(CAN0_AM10H)
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#define bfin_write_CAN0_AM10H(val) bfin_write16(CAN0_AM10H, val)
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#define bfin_read_CAN0_AM11L() bfin_read16(CAN0_AM11L)
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#define bfin_write_CAN0_AM11L(val) bfin_write16(CAN0_AM11L, val)
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#define bfin_read_CAN0_AM11H() bfin_read16(CAN0_AM11H)
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#define bfin_write_CAN0_AM11H(val) bfin_write16(CAN0_AM11H, val)
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#define bfin_read_CAN0_AM12L() bfin_read16(CAN0_AM12L)
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#define bfin_write_CAN0_AM12L(val) bfin_write16(CAN0_AM12L, val)
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#define bfin_read_CAN0_AM12H() bfin_read16(CAN0_AM12H)
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#define bfin_write_CAN0_AM12H(val) bfin_write16(CAN0_AM12H, val)
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#define bfin_read_CAN0_AM13L() bfin_read16(CAN0_AM13L)
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#define bfin_write_CAN0_AM13L(val) bfin_write16(CAN0_AM13L, val)
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#define bfin_read_CAN0_AM13H() bfin_read16(CAN0_AM13H)
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#define bfin_write_CAN0_AM13H(val) bfin_write16(CAN0_AM13H, val)
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#define bfin_read_CAN0_AM14L() bfin_read16(CAN0_AM14L)
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#define bfin_write_CAN0_AM14L(val) bfin_write16(CAN0_AM14L, val)
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#define bfin_read_CAN0_AM14H() bfin_read16(CAN0_AM14H)
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#define bfin_write_CAN0_AM14H(val) bfin_write16(CAN0_AM14H, val)
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#define bfin_read_CAN0_AM15L() bfin_read16(CAN0_AM15L)
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#define bfin_write_CAN0_AM15L(val) bfin_write16(CAN0_AM15L, val)
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#define bfin_read_CAN0_AM15H() bfin_read16(CAN0_AM15H)
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#define bfin_write_CAN0_AM15H(val) bfin_write16(CAN0_AM15H, val)
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/* CAN Controller 0 Accebfin_read_()tance Registers */
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#define bfin_read_CAN0_AM16L() bfin_read16(CAN0_AM16L)
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#define bfin_write_CAN0_AM16L(val) bfin_write16(CAN0_AM16L, val)
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#define bfin_read_CAN0_AM16H() bfin_read16(CAN0_AM16H)
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#define bfin_write_CAN0_AM16H(val) bfin_write16(CAN0_AM16H, val)
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#define bfin_read_CAN0_AM17L() bfin_read16(CAN0_AM17L)
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#define bfin_write_CAN0_AM17L(val) bfin_write16(CAN0_AM17L, val)
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#define bfin_read_CAN0_AM17H() bfin_read16(CAN0_AM17H)
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#define bfin_write_CAN0_AM17H(val) bfin_write16(CAN0_AM17H, val)
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#define bfin_read_CAN0_AM18L() bfin_read16(CAN0_AM18L)
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#define bfin_write_CAN0_AM18L(val) bfin_write16(CAN0_AM18L, val)
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#define bfin_read_CAN0_AM18H() bfin_read16(CAN0_AM18H)
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#define bfin_write_CAN0_AM18H(val) bfin_write16(CAN0_AM18H, val)
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#define bfin_read_CAN0_AM19L() bfin_read16(CAN0_AM19L)
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#define bfin_write_CAN0_AM19L(val) bfin_write16(CAN0_AM19L, val)
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#define bfin_read_CAN0_AM19H() bfin_read16(CAN0_AM19H)
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#define bfin_write_CAN0_AM19H(val) bfin_write16(CAN0_AM19H, val)
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#define bfin_read_CAN0_AM20L() bfin_read16(CAN0_AM20L)
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#define bfin_write_CAN0_AM20L(val) bfin_write16(CAN0_AM20L, val)
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#define bfin_read_CAN0_AM20H() bfin_read16(CAN0_AM20H)
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#define bfin_write_CAN0_AM20H(val) bfin_write16(CAN0_AM20H, val)
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#define bfin_read_CAN0_AM21L() bfin_read16(CAN0_AM21L)
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#define bfin_write_CAN0_AM21L(val) bfin_write16(CAN0_AM21L, val)
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#define bfin_read_CAN0_AM21H() bfin_read16(CAN0_AM21H)
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#define bfin_write_CAN0_AM21H(val) bfin_write16(CAN0_AM21H, val)
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#define bfin_read_CAN0_AM22L() bfin_read16(CAN0_AM22L)
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#define bfin_write_CAN0_AM22L(val) bfin_write16(CAN0_AM22L, val)
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#define bfin_read_CAN0_AM22H() bfin_read16(CAN0_AM22H)
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#define bfin_write_CAN0_AM22H(val) bfin_write16(CAN0_AM22H, val)
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#define bfin_read_CAN0_AM23L() bfin_read16(CAN0_AM23L)
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#define bfin_write_CAN0_AM23L(val) bfin_write16(CAN0_AM23L, val)
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#define bfin_read_CAN0_AM23H() bfin_read16(CAN0_AM23H)
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#define bfin_write_CAN0_AM23H(val) bfin_write16(CAN0_AM23H, val)
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#define bfin_read_CAN0_AM24L() bfin_read16(CAN0_AM24L)
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#define bfin_write_CAN0_AM24L(val) bfin_write16(CAN0_AM24L, val)
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#define bfin_read_CAN0_AM24H() bfin_read16(CAN0_AM24H)
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#define bfin_write_CAN0_AM24H(val) bfin_write16(CAN0_AM24H, val)
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#define bfin_read_CAN0_AM25L() bfin_read16(CAN0_AM25L)
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#define bfin_write_CAN0_AM25L(val) bfin_write16(CAN0_AM25L, val)
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#define bfin_read_CAN0_AM25H() bfin_read16(CAN0_AM25H)
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#define bfin_write_CAN0_AM25H(val) bfin_write16(CAN0_AM25H, val)
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#define bfin_read_CAN0_AM26L() bfin_read16(CAN0_AM26L)
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#define bfin_write_CAN0_AM26L(val) bfin_write16(CAN0_AM26L, val)
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#define bfin_read_CAN0_AM26H() bfin_read16(CAN0_AM26H)
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#define bfin_write_CAN0_AM26H(val) bfin_write16(CAN0_AM26H, val)
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#define bfin_read_CAN0_AM27L() bfin_read16(CAN0_AM27L)
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#define bfin_write_CAN0_AM27L(val) bfin_write16(CAN0_AM27L, val)
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#define bfin_read_CAN0_AM27H() bfin_read16(CAN0_AM27H)
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#define bfin_write_CAN0_AM27H(val) bfin_write16(CAN0_AM27H, val)
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#define bfin_read_CAN0_AM28L() bfin_read16(CAN0_AM28L)
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#define bfin_write_CAN0_AM28L(val) bfin_write16(CAN0_AM28L, val)
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#define bfin_read_CAN0_AM28H() bfin_read16(CAN0_AM28H)
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#define bfin_write_CAN0_AM28H(val) bfin_write16(CAN0_AM28H, val)
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#define bfin_read_CAN0_AM29L() bfin_read16(CAN0_AM29L)
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#define bfin_write_CAN0_AM29L(val) bfin_write16(CAN0_AM29L, val)
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#define bfin_read_CAN0_AM29H() bfin_read16(CAN0_AM29H)
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#define bfin_write_CAN0_AM29H(val) bfin_write16(CAN0_AM29H, val)
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#define bfin_read_CAN0_AM30L() bfin_read16(CAN0_AM30L)
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#define bfin_write_CAN0_AM30L(val) bfin_write16(CAN0_AM30L, val)
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#define bfin_read_CAN0_AM30H() bfin_read16(CAN0_AM30H)
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#define bfin_write_CAN0_AM30H(val) bfin_write16(CAN0_AM30H, val)
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#define bfin_read_CAN0_AM31L() bfin_read16(CAN0_AM31L)
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#define bfin_write_CAN0_AM31L(val) bfin_write16(CAN0_AM31L, val)
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#define bfin_read_CAN0_AM31H() bfin_read16(CAN0_AM31H)
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#define bfin_write_CAN0_AM31H(val) bfin_write16(CAN0_AM31H, val)
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/* CAN Controller 0 Mailbox Data Registers */
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#define bfin_read_CAN0_MB00_DATA0() bfin_read16(CAN0_MB00_DATA0)
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#define bfin_write_CAN0_MB00_DATA0(val) bfin_write16(CAN0_MB00_DATA0, val)
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#define bfin_read_CAN0_MB00_DATA1() bfin_read16(CAN0_MB00_DATA1)
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#define bfin_write_CAN0_MB00_DATA1(val) bfin_write16(CAN0_MB00_DATA1, val)
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#define bfin_read_CAN0_MB00_DATA2() bfin_read16(CAN0_MB00_DATA2)
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#define bfin_write_CAN0_MB00_DATA2(val) bfin_write16(CAN0_MB00_DATA2, val)
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#define bfin_read_CAN0_MB00_DATA3() bfin_read16(CAN0_MB00_DATA3)
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#define bfin_write_CAN0_MB00_DATA3(val) bfin_write16(CAN0_MB00_DATA3, val)
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#define bfin_read_CAN0_MB00_LENGTH() bfin_read16(CAN0_MB00_LENGTH)
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#define bfin_write_CAN0_MB00_LENGTH(val) bfin_write16(CAN0_MB00_LENGTH, val)
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#define bfin_read_CAN0_MB00_TIMESTAMP() bfin_read16(CAN0_MB00_TIMESTAMP)
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#define bfin_write_CAN0_MB00_TIMESTAMP(val) bfin_write16(CAN0_MB00_TIMESTAMP, val)
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#define bfin_read_CAN0_MB00_ID0() bfin_read16(CAN0_MB00_ID0)
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#define bfin_write_CAN0_MB00_ID0(val) bfin_write16(CAN0_MB00_ID0, val)
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#define bfin_read_CAN0_MB00_ID1() bfin_read16(CAN0_MB00_ID1)
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#define bfin_write_CAN0_MB00_ID1(val) bfin_write16(CAN0_MB00_ID1, val)
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#define bfin_read_CAN0_MB01_DATA0() bfin_read16(CAN0_MB01_DATA0)
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#define bfin_write_CAN0_MB01_DATA0(val) bfin_write16(CAN0_MB01_DATA0, val)
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#define bfin_read_CAN0_MB01_DATA1() bfin_read16(CAN0_MB01_DATA1)
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#define bfin_write_CAN0_MB01_DATA1(val) bfin_write16(CAN0_MB01_DATA1, val)
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#define bfin_read_CAN0_MB01_DATA2() bfin_read16(CAN0_MB01_DATA2)
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#define bfin_write_CAN0_MB01_DATA2(val) bfin_write16(CAN0_MB01_DATA2, val)
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#define bfin_read_CAN0_MB01_DATA3() bfin_read16(CAN0_MB01_DATA3)
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#define bfin_write_CAN0_MB01_DATA3(val) bfin_write16(CAN0_MB01_DATA3, val)
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#define bfin_read_CAN0_MB01_LENGTH() bfin_read16(CAN0_MB01_LENGTH)
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#define bfin_write_CAN0_MB01_LENGTH(val) bfin_write16(CAN0_MB01_LENGTH, val)
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#define bfin_read_CAN0_MB01_TIMESTAMP() bfin_read16(CAN0_MB01_TIMESTAMP)
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#define bfin_write_CAN0_MB01_TIMESTAMP(val) bfin_write16(CAN0_MB01_TIMESTAMP, val)
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#define bfin_read_CAN0_MB01_ID0() bfin_read16(CAN0_MB01_ID0)
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#define bfin_write_CAN0_MB01_ID0(val) bfin_write16(CAN0_MB01_ID0, val)
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#define bfin_read_CAN0_MB01_ID1() bfin_read16(CAN0_MB01_ID1)
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#define bfin_write_CAN0_MB01_ID1(val) bfin_write16(CAN0_MB01_ID1, val)
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#define bfin_read_CAN0_MB02_DATA0() bfin_read16(CAN0_MB02_DATA0)
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#define bfin_write_CAN0_MB02_DATA0(val) bfin_write16(CAN0_MB02_DATA0, val)
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#define bfin_read_CAN0_MB02_DATA1() bfin_read16(CAN0_MB02_DATA1)
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#define bfin_write_CAN0_MB02_DATA1(val) bfin_write16(CAN0_MB02_DATA1, val)
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#define bfin_read_CAN0_MB02_DATA2() bfin_read16(CAN0_MB02_DATA2)
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#define bfin_write_CAN0_MB02_DATA2(val) bfin_write16(CAN0_MB02_DATA2, val)
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#define bfin_read_CAN0_MB02_DATA3() bfin_read16(CAN0_MB02_DATA3)
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#define bfin_write_CAN0_MB02_DATA3(val) bfin_write16(CAN0_MB02_DATA3, val)
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#define bfin_read_CAN0_MB02_LENGTH() bfin_read16(CAN0_MB02_LENGTH)
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#define bfin_write_CAN0_MB02_LENGTH(val) bfin_write16(CAN0_MB02_LENGTH, val)
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#define bfin_read_CAN0_MB02_TIMESTAMP() bfin_read16(CAN0_MB02_TIMESTAMP)
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#define bfin_write_CAN0_MB02_TIMESTAMP(val) bfin_write16(CAN0_MB02_TIMESTAMP, val)
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#define bfin_read_CAN0_MB02_ID0() bfin_read16(CAN0_MB02_ID0)
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#define bfin_write_CAN0_MB02_ID0(val) bfin_write16(CAN0_MB02_ID0, val)
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#define bfin_read_CAN0_MB02_ID1() bfin_read16(CAN0_MB02_ID1)
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#define bfin_write_CAN0_MB02_ID1(val) bfin_write16(CAN0_MB02_ID1, val)
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#define bfin_read_CAN0_MB03_DATA0() bfin_read16(CAN0_MB03_DATA0)
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#define bfin_write_CAN0_MB03_DATA0(val) bfin_write16(CAN0_MB03_DATA0, val)
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#define bfin_read_CAN0_MB03_DATA1() bfin_read16(CAN0_MB03_DATA1)
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#define bfin_write_CAN0_MB03_DATA1(val) bfin_write16(CAN0_MB03_DATA1, val)
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#define bfin_read_CAN0_MB03_DATA2() bfin_read16(CAN0_MB03_DATA2)
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#define bfin_write_CAN0_MB03_DATA2(val) bfin_write16(CAN0_MB03_DATA2, val)
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#define bfin_read_CAN0_MB03_DATA3() bfin_read16(CAN0_MB03_DATA3)
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#define bfin_write_CAN0_MB03_DATA3(val) bfin_write16(CAN0_MB03_DATA3, val)
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#define bfin_read_CAN0_MB03_LENGTH() bfin_read16(CAN0_MB03_LENGTH)
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#define bfin_write_CAN0_MB03_LENGTH(val) bfin_write16(CAN0_MB03_LENGTH, val)
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#define bfin_read_CAN0_MB03_TIMESTAMP() bfin_read16(CAN0_MB03_TIMESTAMP)
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#define bfin_write_CAN0_MB03_TIMESTAMP(val) bfin_write16(CAN0_MB03_TIMESTAMP, val)
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#define bfin_read_CAN0_MB03_ID0() bfin_read16(CAN0_MB03_ID0)
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#define bfin_write_CAN0_MB03_ID0(val) bfin_write16(CAN0_MB03_ID0, val)
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#define bfin_read_CAN0_MB03_ID1() bfin_read16(CAN0_MB03_ID1)
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#define bfin_write_CAN0_MB03_ID1(val) bfin_write16(CAN0_MB03_ID1, val)
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#define bfin_read_CAN0_MB04_DATA0() bfin_read16(CAN0_MB04_DATA0)
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#define bfin_write_CAN0_MB04_DATA0(val) bfin_write16(CAN0_MB04_DATA0, val)
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#define bfin_read_CAN0_MB04_DATA1() bfin_read16(CAN0_MB04_DATA1)
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#define bfin_write_CAN0_MB04_DATA1(val) bfin_write16(CAN0_MB04_DATA1, val)
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#define bfin_read_CAN0_MB04_DATA2() bfin_read16(CAN0_MB04_DATA2)
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#define bfin_write_CAN0_MB04_DATA2(val) bfin_write16(CAN0_MB04_DATA2, val)
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#define bfin_read_CAN0_MB04_DATA3() bfin_read16(CAN0_MB04_DATA3)
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#define bfin_write_CAN0_MB04_DATA3(val) bfin_write16(CAN0_MB04_DATA3, val)
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#define bfin_read_CAN0_MB04_LENGTH() bfin_read16(CAN0_MB04_LENGTH)
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#define bfin_write_CAN0_MB04_LENGTH(val) bfin_write16(CAN0_MB04_LENGTH, val)
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#define bfin_read_CAN0_MB04_TIMESTAMP() bfin_read16(CAN0_MB04_TIMESTAMP)
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#define bfin_write_CAN0_MB04_TIMESTAMP(val) bfin_write16(CAN0_MB04_TIMESTAMP, val)
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#define bfin_read_CAN0_MB04_ID0() bfin_read16(CAN0_MB04_ID0)
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#define bfin_write_CAN0_MB04_ID0(val) bfin_write16(CAN0_MB04_ID0, val)
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#define bfin_read_CAN0_MB04_ID1() bfin_read16(CAN0_MB04_ID1)
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#define bfin_write_CAN0_MB04_ID1(val) bfin_write16(CAN0_MB04_ID1, val)
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#define bfin_read_CAN0_MB05_DATA0() bfin_read16(CAN0_MB05_DATA0)
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#define bfin_write_CAN0_MB05_DATA0(val) bfin_write16(CAN0_MB05_DATA0, val)
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#define bfin_read_CAN0_MB05_DATA1() bfin_read16(CAN0_MB05_DATA1)
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#define bfin_write_CAN0_MB05_DATA1(val) bfin_write16(CAN0_MB05_DATA1, val)
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#define bfin_read_CAN0_MB05_DATA2() bfin_read16(CAN0_MB05_DATA2)
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#define bfin_write_CAN0_MB05_DATA2(val) bfin_write16(CAN0_MB05_DATA2, val)
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#define bfin_read_CAN0_MB05_DATA3() bfin_read16(CAN0_MB05_DATA3)
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#define bfin_write_CAN0_MB05_DATA3(val) bfin_write16(CAN0_MB05_DATA3, val)
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#define bfin_read_CAN0_MB05_LENGTH() bfin_read16(CAN0_MB05_LENGTH)
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#define bfin_write_CAN0_MB05_LENGTH(val) bfin_write16(CAN0_MB05_LENGTH, val)
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#define bfin_read_CAN0_MB05_TIMESTAMP() bfin_read16(CAN0_MB05_TIMESTAMP)
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#define bfin_write_CAN0_MB05_TIMESTAMP(val) bfin_write16(CAN0_MB05_TIMESTAMP, val)
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#define bfin_read_CAN0_MB05_ID0() bfin_read16(CAN0_MB05_ID0)
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#define bfin_write_CAN0_MB05_ID0(val) bfin_write16(CAN0_MB05_ID0, val)
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#define bfin_read_CAN0_MB05_ID1() bfin_read16(CAN0_MB05_ID1)
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#define bfin_write_CAN0_MB05_ID1(val) bfin_write16(CAN0_MB05_ID1, val)
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#define bfin_read_CAN0_MB06_DATA0() bfin_read16(CAN0_MB06_DATA0)
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#define bfin_write_CAN0_MB06_DATA0(val) bfin_write16(CAN0_MB06_DATA0, val)
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#define bfin_read_CAN0_MB06_DATA1() bfin_read16(CAN0_MB06_DATA1)
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#define bfin_write_CAN0_MB06_DATA1(val) bfin_write16(CAN0_MB06_DATA1, val)
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#define bfin_read_CAN0_MB06_DATA2() bfin_read16(CAN0_MB06_DATA2)
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#define bfin_write_CAN0_MB06_DATA2(val) bfin_write16(CAN0_MB06_DATA2, val)
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#define bfin_read_CAN0_MB06_DATA3() bfin_read16(CAN0_MB06_DATA3)
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#define bfin_write_CAN0_MB06_DATA3(val) bfin_write16(CAN0_MB06_DATA3, val)
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#define bfin_read_CAN0_MB06_LENGTH() bfin_read16(CAN0_MB06_LENGTH)
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#define bfin_write_CAN0_MB06_LENGTH(val) bfin_write16(CAN0_MB06_LENGTH, val)
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#define bfin_read_CAN0_MB06_TIMESTAMP() bfin_read16(CAN0_MB06_TIMESTAMP)
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#define bfin_write_CAN0_MB06_TIMESTAMP(val) bfin_write16(CAN0_MB06_TIMESTAMP, val)
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#define bfin_read_CAN0_MB06_ID0() bfin_read16(CAN0_MB06_ID0)
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#define bfin_write_CAN0_MB06_ID0(val) bfin_write16(CAN0_MB06_ID0, val)
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#define bfin_read_CAN0_MB06_ID1() bfin_read16(CAN0_MB06_ID1)
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#define bfin_write_CAN0_MB06_ID1(val) bfin_write16(CAN0_MB06_ID1, val)
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#define bfin_read_CAN0_MB07_DATA0() bfin_read16(CAN0_MB07_DATA0)
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#define bfin_write_CAN0_MB07_DATA0(val) bfin_write16(CAN0_MB07_DATA0, val)
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#define bfin_read_CAN0_MB07_DATA1() bfin_read16(CAN0_MB07_DATA1)
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#define bfin_write_CAN0_MB07_DATA1(val) bfin_write16(CAN0_MB07_DATA1, val)
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#define bfin_read_CAN0_MB07_DATA2() bfin_read16(CAN0_MB07_DATA2)
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#define bfin_write_CAN0_MB07_DATA2(val) bfin_write16(CAN0_MB07_DATA2, val)
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#define bfin_read_CAN0_MB07_DATA3() bfin_read16(CAN0_MB07_DATA3)
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#define bfin_write_CAN0_MB07_DATA3(val) bfin_write16(CAN0_MB07_DATA3, val)
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#define bfin_read_CAN0_MB07_LENGTH() bfin_read16(CAN0_MB07_LENGTH)
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#define bfin_write_CAN0_MB07_LENGTH(val) bfin_write16(CAN0_MB07_LENGTH, val)
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#define bfin_read_CAN0_MB07_TIMESTAMP() bfin_read16(CAN0_MB07_TIMESTAMP)
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#define bfin_write_CAN0_MB07_TIMESTAMP(val) bfin_write16(CAN0_MB07_TIMESTAMP, val)
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#define bfin_read_CAN0_MB07_ID0() bfin_read16(CAN0_MB07_ID0)
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#define bfin_write_CAN0_MB07_ID0(val) bfin_write16(CAN0_MB07_ID0, val)
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#define bfin_read_CAN0_MB07_ID1() bfin_read16(CAN0_MB07_ID1)
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#define bfin_write_CAN0_MB07_ID1(val) bfin_write16(CAN0_MB07_ID1, val)
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#define bfin_read_CAN0_MB08_DATA0() bfin_read16(CAN0_MB08_DATA0)
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#define bfin_write_CAN0_MB08_DATA0(val) bfin_write16(CAN0_MB08_DATA0, val)
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#define bfin_read_CAN0_MB08_DATA1() bfin_read16(CAN0_MB08_DATA1)
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#define bfin_write_CAN0_MB08_DATA1(val) bfin_write16(CAN0_MB08_DATA1, val)
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#define bfin_read_CAN0_MB08_DATA2() bfin_read16(CAN0_MB08_DATA2)
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#define bfin_write_CAN0_MB08_DATA2(val) bfin_write16(CAN0_MB08_DATA2, val)
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#define bfin_read_CAN0_MB08_DATA3() bfin_read16(CAN0_MB08_DATA3)
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#define bfin_write_CAN0_MB08_DATA3(val) bfin_write16(CAN0_MB08_DATA3, val)
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#define bfin_read_CAN0_MB08_LENGTH() bfin_read16(CAN0_MB08_LENGTH)
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#define bfin_write_CAN0_MB08_LENGTH(val) bfin_write16(CAN0_MB08_LENGTH, val)
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#define bfin_read_CAN0_MB08_TIMESTAMP() bfin_read16(CAN0_MB08_TIMESTAMP)
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#define bfin_write_CAN0_MB08_TIMESTAMP(val) bfin_write16(CAN0_MB08_TIMESTAMP, val)
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#define bfin_read_CAN0_MB08_ID0() bfin_read16(CAN0_MB08_ID0)
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#define bfin_write_CAN0_MB08_ID0(val) bfin_write16(CAN0_MB08_ID0, val)
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#define bfin_read_CAN0_MB08_ID1() bfin_read16(CAN0_MB08_ID1)
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#define bfin_write_CAN0_MB08_ID1(val) bfin_write16(CAN0_MB08_ID1, val)
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#define bfin_read_CAN0_MB09_DATA0() bfin_read16(CAN0_MB09_DATA0)
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#define bfin_write_CAN0_MB09_DATA0(val) bfin_write16(CAN0_MB09_DATA0, val)
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#define bfin_read_CAN0_MB09_DATA1() bfin_read16(CAN0_MB09_DATA1)
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#define bfin_write_CAN0_MB09_DATA1(val) bfin_write16(CAN0_MB09_DATA1, val)
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#define bfin_read_CAN0_MB09_DATA2() bfin_read16(CAN0_MB09_DATA2)
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#define bfin_write_CAN0_MB09_DATA2(val) bfin_write16(CAN0_MB09_DATA2, val)
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#define bfin_read_CAN0_MB09_DATA3() bfin_read16(CAN0_MB09_DATA3)
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#define bfin_write_CAN0_MB09_DATA3(val) bfin_write16(CAN0_MB09_DATA3, val)
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#define bfin_read_CAN0_MB09_LENGTH() bfin_read16(CAN0_MB09_LENGTH)
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#define bfin_write_CAN0_MB09_LENGTH(val) bfin_write16(CAN0_MB09_LENGTH, val)
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#define bfin_read_CAN0_MB09_TIMESTAMP() bfin_read16(CAN0_MB09_TIMESTAMP)
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#define bfin_write_CAN0_MB09_TIMESTAMP(val) bfin_write16(CAN0_MB09_TIMESTAMP, val)
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#define bfin_read_CAN0_MB09_ID0() bfin_read16(CAN0_MB09_ID0)
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#define bfin_write_CAN0_MB09_ID0(val) bfin_write16(CAN0_MB09_ID0, val)
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#define bfin_read_CAN0_MB09_ID1() bfin_read16(CAN0_MB09_ID1)
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#define bfin_write_CAN0_MB09_ID1(val) bfin_write16(CAN0_MB09_ID1, val)
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#define bfin_read_CAN0_MB10_DATA0() bfin_read16(CAN0_MB10_DATA0)
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#define bfin_write_CAN0_MB10_DATA0(val) bfin_write16(CAN0_MB10_DATA0, val)
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#define bfin_read_CAN0_MB10_DATA1() bfin_read16(CAN0_MB10_DATA1)
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#define bfin_write_CAN0_MB10_DATA1(val) bfin_write16(CAN0_MB10_DATA1, val)
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#define bfin_read_CAN0_MB10_DATA2() bfin_read16(CAN0_MB10_DATA2)
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#define bfin_write_CAN0_MB10_DATA2(val) bfin_write16(CAN0_MB10_DATA2, val)
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#define bfin_read_CAN0_MB10_DATA3() bfin_read16(CAN0_MB10_DATA3)
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#define bfin_write_CAN0_MB10_DATA3(val) bfin_write16(CAN0_MB10_DATA3, val)
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#define bfin_read_CAN0_MB10_LENGTH() bfin_read16(CAN0_MB10_LENGTH)
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#define bfin_write_CAN0_MB10_LENGTH(val) bfin_write16(CAN0_MB10_LENGTH, val)
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#define bfin_read_CAN0_MB10_TIMESTAMP() bfin_read16(CAN0_MB10_TIMESTAMP)
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#define bfin_write_CAN0_MB10_TIMESTAMP(val) bfin_write16(CAN0_MB10_TIMESTAMP, val)
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#define bfin_read_CAN0_MB10_ID0() bfin_read16(CAN0_MB10_ID0)
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#define bfin_write_CAN0_MB10_ID0(val) bfin_write16(CAN0_MB10_ID0, val)
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#define bfin_read_CAN0_MB10_ID1() bfin_read16(CAN0_MB10_ID1)
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#define bfin_write_CAN0_MB10_ID1(val) bfin_write16(CAN0_MB10_ID1, val)
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#define bfin_read_CAN0_MB11_DATA0() bfin_read16(CAN0_MB11_DATA0)
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#define bfin_write_CAN0_MB11_DATA0(val) bfin_write16(CAN0_MB11_DATA0, val)
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#define bfin_read_CAN0_MB11_DATA1() bfin_read16(CAN0_MB11_DATA1)
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#define bfin_write_CAN0_MB11_DATA1(val) bfin_write16(CAN0_MB11_DATA1, val)
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#define bfin_read_CAN0_MB11_DATA2() bfin_read16(CAN0_MB11_DATA2)
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#define bfin_write_CAN0_MB11_DATA2(val) bfin_write16(CAN0_MB11_DATA2, val)
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#define bfin_read_CAN0_MB11_DATA3() bfin_read16(CAN0_MB11_DATA3)
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#define bfin_write_CAN0_MB11_DATA3(val) bfin_write16(CAN0_MB11_DATA3, val)
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#define bfin_read_CAN0_MB11_LENGTH() bfin_read16(CAN0_MB11_LENGTH)
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#define bfin_write_CAN0_MB11_LENGTH(val) bfin_write16(CAN0_MB11_LENGTH, val)
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#define bfin_read_CAN0_MB11_TIMESTAMP() bfin_read16(CAN0_MB11_TIMESTAMP)
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#define bfin_write_CAN0_MB11_TIMESTAMP(val) bfin_write16(CAN0_MB11_TIMESTAMP, val)
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#define bfin_read_CAN0_MB11_ID0() bfin_read16(CAN0_MB11_ID0)
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#define bfin_write_CAN0_MB11_ID0(val) bfin_write16(CAN0_MB11_ID0, val)
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#define bfin_read_CAN0_MB11_ID1() bfin_read16(CAN0_MB11_ID1)
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#define bfin_write_CAN0_MB11_ID1(val) bfin_write16(CAN0_MB11_ID1, val)
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#define bfin_read_CAN0_MB12_DATA0() bfin_read16(CAN0_MB12_DATA0)
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#define bfin_write_CAN0_MB12_DATA0(val) bfin_write16(CAN0_MB12_DATA0, val)
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#define bfin_read_CAN0_MB12_DATA1() bfin_read16(CAN0_MB12_DATA1)
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#define bfin_write_CAN0_MB12_DATA1(val) bfin_write16(CAN0_MB12_DATA1, val)
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#define bfin_read_CAN0_MB12_DATA2() bfin_read16(CAN0_MB12_DATA2)
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#define bfin_write_CAN0_MB12_DATA2(val) bfin_write16(CAN0_MB12_DATA2, val)
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#define bfin_read_CAN0_MB12_DATA3() bfin_read16(CAN0_MB12_DATA3)
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#define bfin_write_CAN0_MB12_DATA3(val) bfin_write16(CAN0_MB12_DATA3, val)
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#define bfin_read_CAN0_MB12_LENGTH() bfin_read16(CAN0_MB12_LENGTH)
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#define bfin_write_CAN0_MB12_LENGTH(val) bfin_write16(CAN0_MB12_LENGTH, val)
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#define bfin_read_CAN0_MB12_TIMESTAMP() bfin_read16(CAN0_MB12_TIMESTAMP)
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#define bfin_write_CAN0_MB12_TIMESTAMP(val) bfin_write16(CAN0_MB12_TIMESTAMP, val)
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#define bfin_read_CAN0_MB12_ID0() bfin_read16(CAN0_MB12_ID0)
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#define bfin_write_CAN0_MB12_ID0(val) bfin_write16(CAN0_MB12_ID0, val)
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#define bfin_read_CAN0_MB12_ID1() bfin_read16(CAN0_MB12_ID1)
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#define bfin_write_CAN0_MB12_ID1(val) bfin_write16(CAN0_MB12_ID1, val)
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#define bfin_read_CAN0_MB13_DATA0() bfin_read16(CAN0_MB13_DATA0)
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#define bfin_write_CAN0_MB13_DATA0(val) bfin_write16(CAN0_MB13_DATA0, val)
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#define bfin_read_CAN0_MB13_DATA1() bfin_read16(CAN0_MB13_DATA1)
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#define bfin_write_CAN0_MB13_DATA1(val) bfin_write16(CAN0_MB13_DATA1, val)
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#define bfin_read_CAN0_MB13_DATA2() bfin_read16(CAN0_MB13_DATA2)
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#define bfin_write_CAN0_MB13_DATA2(val) bfin_write16(CAN0_MB13_DATA2, val)
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#define bfin_read_CAN0_MB13_DATA3() bfin_read16(CAN0_MB13_DATA3)
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#define bfin_write_CAN0_MB13_DATA3(val) bfin_write16(CAN0_MB13_DATA3, val)
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#define bfin_read_CAN0_MB13_LENGTH() bfin_read16(CAN0_MB13_LENGTH)
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#define bfin_write_CAN0_MB13_LENGTH(val) bfin_write16(CAN0_MB13_LENGTH, val)
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#define bfin_read_CAN0_MB13_TIMESTAMP() bfin_read16(CAN0_MB13_TIMESTAMP)
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#define bfin_write_CAN0_MB13_TIMESTAMP(val) bfin_write16(CAN0_MB13_TIMESTAMP, val)
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#define bfin_read_CAN0_MB13_ID0() bfin_read16(CAN0_MB13_ID0)
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#define bfin_write_CAN0_MB13_ID0(val) bfin_write16(CAN0_MB13_ID0, val)
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#define bfin_read_CAN0_MB13_ID1() bfin_read16(CAN0_MB13_ID1)
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#define bfin_write_CAN0_MB13_ID1(val) bfin_write16(CAN0_MB13_ID1, val)
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#define bfin_read_CAN0_MB14_DATA0() bfin_read16(CAN0_MB14_DATA0)
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#define bfin_write_CAN0_MB14_DATA0(val) bfin_write16(CAN0_MB14_DATA0, val)
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#define bfin_read_CAN0_MB14_DATA1() bfin_read16(CAN0_MB14_DATA1)
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#define bfin_write_CAN0_MB14_DATA1(val) bfin_write16(CAN0_MB14_DATA1, val)
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#define bfin_read_CAN0_MB14_DATA2() bfin_read16(CAN0_MB14_DATA2)
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#define bfin_write_CAN0_MB14_DATA2(val) bfin_write16(CAN0_MB14_DATA2, val)
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#define bfin_read_CAN0_MB14_DATA3() bfin_read16(CAN0_MB14_DATA3)
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#define bfin_write_CAN0_MB14_DATA3(val) bfin_write16(CAN0_MB14_DATA3, val)
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#define bfin_read_CAN0_MB14_LENGTH() bfin_read16(CAN0_MB14_LENGTH)
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#define bfin_write_CAN0_MB14_LENGTH(val) bfin_write16(CAN0_MB14_LENGTH, val)
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#define bfin_read_CAN0_MB14_TIMESTAMP() bfin_read16(CAN0_MB14_TIMESTAMP)
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#define bfin_write_CAN0_MB14_TIMESTAMP(val) bfin_write16(CAN0_MB14_TIMESTAMP, val)
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#define bfin_read_CAN0_MB14_ID0() bfin_read16(CAN0_MB14_ID0)
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#define bfin_write_CAN0_MB14_ID0(val) bfin_write16(CAN0_MB14_ID0, val)
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#define bfin_read_CAN0_MB14_ID1() bfin_read16(CAN0_MB14_ID1)
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#define bfin_write_CAN0_MB14_ID1(val) bfin_write16(CAN0_MB14_ID1, val)
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#define bfin_read_CAN0_MB15_DATA0() bfin_read16(CAN0_MB15_DATA0)
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#define bfin_write_CAN0_MB15_DATA0(val) bfin_write16(CAN0_MB15_DATA0, val)
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#define bfin_read_CAN0_MB15_DATA1() bfin_read16(CAN0_MB15_DATA1)
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#define bfin_write_CAN0_MB15_DATA1(val) bfin_write16(CAN0_MB15_DATA1, val)
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#define bfin_read_CAN0_MB15_DATA2() bfin_read16(CAN0_MB15_DATA2)
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#define bfin_write_CAN0_MB15_DATA2(val) bfin_write16(CAN0_MB15_DATA2, val)
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#define bfin_read_CAN0_MB15_DATA3() bfin_read16(CAN0_MB15_DATA3)
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#define bfin_write_CAN0_MB15_DATA3(val) bfin_write16(CAN0_MB15_DATA3, val)
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#define bfin_read_CAN0_MB15_LENGTH() bfin_read16(CAN0_MB15_LENGTH)
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#define bfin_write_CAN0_MB15_LENGTH(val) bfin_write16(CAN0_MB15_LENGTH, val)
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#define bfin_read_CAN0_MB15_TIMESTAMP() bfin_read16(CAN0_MB15_TIMESTAMP)
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#define bfin_write_CAN0_MB15_TIMESTAMP(val) bfin_write16(CAN0_MB15_TIMESTAMP, val)
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#define bfin_read_CAN0_MB15_ID0() bfin_read16(CAN0_MB15_ID0)
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#define bfin_write_CAN0_MB15_ID0(val) bfin_write16(CAN0_MB15_ID0, val)
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#define bfin_read_CAN0_MB15_ID1() bfin_read16(CAN0_MB15_ID1)
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#define bfin_write_CAN0_MB15_ID1(val) bfin_write16(CAN0_MB15_ID1, val)
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/* CAN Controller 0 Mailbox Data Registers */
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#define bfin_read_CAN0_MB16_DATA0() bfin_read16(CAN0_MB16_DATA0)
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#define bfin_write_CAN0_MB16_DATA0(val) bfin_write16(CAN0_MB16_DATA0, val)
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#define bfin_read_CAN0_MB16_DATA1() bfin_read16(CAN0_MB16_DATA1)
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#define bfin_write_CAN0_MB16_DATA1(val) bfin_write16(CAN0_MB16_DATA1, val)
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#define bfin_read_CAN0_MB16_DATA2() bfin_read16(CAN0_MB16_DATA2)
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#define bfin_write_CAN0_MB16_DATA2(val) bfin_write16(CAN0_MB16_DATA2, val)
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#define bfin_read_CAN0_MB16_DATA3() bfin_read16(CAN0_MB16_DATA3)
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#define bfin_write_CAN0_MB16_DATA3(val) bfin_write16(CAN0_MB16_DATA3, val)
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#define bfin_read_CAN0_MB16_LENGTH() bfin_read16(CAN0_MB16_LENGTH)
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#define bfin_write_CAN0_MB16_LENGTH(val) bfin_write16(CAN0_MB16_LENGTH, val)
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#define bfin_read_CAN0_MB16_TIMESTAMP() bfin_read16(CAN0_MB16_TIMESTAMP)
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#define bfin_write_CAN0_MB16_TIMESTAMP(val) bfin_write16(CAN0_MB16_TIMESTAMP, val)
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#define bfin_read_CAN0_MB16_ID0() bfin_read16(CAN0_MB16_ID0)
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#define bfin_write_CAN0_MB16_ID0(val) bfin_write16(CAN0_MB16_ID0, val)
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#define bfin_read_CAN0_MB16_ID1() bfin_read16(CAN0_MB16_ID1)
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#define bfin_write_CAN0_MB16_ID1(val) bfin_write16(CAN0_MB16_ID1, val)
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#define bfin_read_CAN0_MB17_DATA0() bfin_read16(CAN0_MB17_DATA0)
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#define bfin_write_CAN0_MB17_DATA0(val) bfin_write16(CAN0_MB17_DATA0, val)
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#define bfin_read_CAN0_MB17_DATA1() bfin_read16(CAN0_MB17_DATA1)
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#define bfin_write_CAN0_MB17_DATA1(val) bfin_write16(CAN0_MB17_DATA1, val)
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#define bfin_read_CAN0_MB17_DATA2() bfin_read16(CAN0_MB17_DATA2)
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#define bfin_write_CAN0_MB17_DATA2(val) bfin_write16(CAN0_MB17_DATA2, val)
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#define bfin_read_CAN0_MB17_DATA3() bfin_read16(CAN0_MB17_DATA3)
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#define bfin_write_CAN0_MB17_DATA3(val) bfin_write16(CAN0_MB17_DATA3, val)
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#define bfin_read_CAN0_MB17_LENGTH() bfin_read16(CAN0_MB17_LENGTH)
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#define bfin_write_CAN0_MB17_LENGTH(val) bfin_write16(CAN0_MB17_LENGTH, val)
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#define bfin_read_CAN0_MB17_TIMESTAMP() bfin_read16(CAN0_MB17_TIMESTAMP)
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#define bfin_write_CAN0_MB17_TIMESTAMP(val) bfin_write16(CAN0_MB17_TIMESTAMP, val)
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#define bfin_read_CAN0_MB17_ID0() bfin_read16(CAN0_MB17_ID0)
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#define bfin_write_CAN0_MB17_ID0(val) bfin_write16(CAN0_MB17_ID0, val)
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#define bfin_read_CAN0_MB17_ID1() bfin_read16(CAN0_MB17_ID1)
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#define bfin_write_CAN0_MB17_ID1(val) bfin_write16(CAN0_MB17_ID1, val)
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#define bfin_read_CAN0_MB18_DATA0() bfin_read16(CAN0_MB18_DATA0)
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#define bfin_write_CAN0_MB18_DATA0(val) bfin_write16(CAN0_MB18_DATA0, val)
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#define bfin_read_CAN0_MB18_DATA1() bfin_read16(CAN0_MB18_DATA1)
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#define bfin_write_CAN0_MB18_DATA1(val) bfin_write16(CAN0_MB18_DATA1, val)
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#define bfin_read_CAN0_MB18_DATA2() bfin_read16(CAN0_MB18_DATA2)
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#define bfin_write_CAN0_MB18_DATA2(val) bfin_write16(CAN0_MB18_DATA2, val)
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#define bfin_read_CAN0_MB18_DATA3() bfin_read16(CAN0_MB18_DATA3)
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#define bfin_write_CAN0_MB18_DATA3(val) bfin_write16(CAN0_MB18_DATA3, val)
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#define bfin_read_CAN0_MB18_LENGTH() bfin_read16(CAN0_MB18_LENGTH)
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#define bfin_write_CAN0_MB18_LENGTH(val) bfin_write16(CAN0_MB18_LENGTH, val)
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#define bfin_read_CAN0_MB18_TIMESTAMP() bfin_read16(CAN0_MB18_TIMESTAMP)
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#define bfin_write_CAN0_MB18_TIMESTAMP(val) bfin_write16(CAN0_MB18_TIMESTAMP, val)
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#define bfin_read_CAN0_MB18_ID0() bfin_read16(CAN0_MB18_ID0)
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#define bfin_write_CAN0_MB18_ID0(val) bfin_write16(CAN0_MB18_ID0, val)
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#define bfin_read_CAN0_MB18_ID1() bfin_read16(CAN0_MB18_ID1)
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#define bfin_write_CAN0_MB18_ID1(val) bfin_write16(CAN0_MB18_ID1, val)
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#define bfin_read_CAN0_MB19_DATA0() bfin_read16(CAN0_MB19_DATA0)
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#define bfin_write_CAN0_MB19_DATA0(val) bfin_write16(CAN0_MB19_DATA0, val)
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#define bfin_read_CAN0_MB19_DATA1() bfin_read16(CAN0_MB19_DATA1)
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#define bfin_write_CAN0_MB19_DATA1(val) bfin_write16(CAN0_MB19_DATA1, val)
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#define bfin_read_CAN0_MB19_DATA2() bfin_read16(CAN0_MB19_DATA2)
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#define bfin_write_CAN0_MB19_DATA2(val) bfin_write16(CAN0_MB19_DATA2, val)
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#define bfin_read_CAN0_MB19_DATA3() bfin_read16(CAN0_MB19_DATA3)
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#define bfin_write_CAN0_MB19_DATA3(val) bfin_write16(CAN0_MB19_DATA3, val)
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#define bfin_read_CAN0_MB19_LENGTH() bfin_read16(CAN0_MB19_LENGTH)
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#define bfin_write_CAN0_MB19_LENGTH(val) bfin_write16(CAN0_MB19_LENGTH, val)
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#define bfin_read_CAN0_MB19_TIMESTAMP() bfin_read16(CAN0_MB19_TIMESTAMP)
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#define bfin_write_CAN0_MB19_TIMESTAMP(val) bfin_write16(CAN0_MB19_TIMESTAMP, val)
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#define bfin_read_CAN0_MB19_ID0() bfin_read16(CAN0_MB19_ID0)
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#define bfin_write_CAN0_MB19_ID0(val) bfin_write16(CAN0_MB19_ID0, val)
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#define bfin_read_CAN0_MB19_ID1() bfin_read16(CAN0_MB19_ID1)
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#define bfin_write_CAN0_MB19_ID1(val) bfin_write16(CAN0_MB19_ID1, val)
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#define bfin_read_CAN0_MB20_DATA0() bfin_read16(CAN0_MB20_DATA0)
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#define bfin_write_CAN0_MB20_DATA0(val) bfin_write16(CAN0_MB20_DATA0, val)
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#define bfin_read_CAN0_MB20_DATA1() bfin_read16(CAN0_MB20_DATA1)
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#define bfin_write_CAN0_MB20_DATA1(val) bfin_write16(CAN0_MB20_DATA1, val)
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#define bfin_read_CAN0_MB20_DATA2() bfin_read16(CAN0_MB20_DATA2)
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#define bfin_write_CAN0_MB20_DATA2(val) bfin_write16(CAN0_MB20_DATA2, val)
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#define bfin_read_CAN0_MB20_DATA3() bfin_read16(CAN0_MB20_DATA3)
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#define bfin_write_CAN0_MB20_DATA3(val) bfin_write16(CAN0_MB20_DATA3, val)
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#define bfin_read_CAN0_MB20_LENGTH() bfin_read16(CAN0_MB20_LENGTH)
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#define bfin_write_CAN0_MB20_LENGTH(val) bfin_write16(CAN0_MB20_LENGTH, val)
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#define bfin_read_CAN0_MB20_TIMESTAMP() bfin_read16(CAN0_MB20_TIMESTAMP)
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#define bfin_write_CAN0_MB20_TIMESTAMP(val) bfin_write16(CAN0_MB20_TIMESTAMP, val)
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#define bfin_read_CAN0_MB20_ID0() bfin_read16(CAN0_MB20_ID0)
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#define bfin_write_CAN0_MB20_ID0(val) bfin_write16(CAN0_MB20_ID0, val)
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#define bfin_read_CAN0_MB20_ID1() bfin_read16(CAN0_MB20_ID1)
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#define bfin_write_CAN0_MB20_ID1(val) bfin_write16(CAN0_MB20_ID1, val)
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#define bfin_read_CAN0_MB21_DATA0() bfin_read16(CAN0_MB21_DATA0)
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#define bfin_write_CAN0_MB21_DATA0(val) bfin_write16(CAN0_MB21_DATA0, val)
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#define bfin_read_CAN0_MB21_DATA1() bfin_read16(CAN0_MB21_DATA1)
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#define bfin_write_CAN0_MB21_DATA1(val) bfin_write16(CAN0_MB21_DATA1, val)
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#define bfin_read_CAN0_MB21_DATA2() bfin_read16(CAN0_MB21_DATA2)
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#define bfin_write_CAN0_MB21_DATA2(val) bfin_write16(CAN0_MB21_DATA2, val)
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#define bfin_read_CAN0_MB21_DATA3() bfin_read16(CAN0_MB21_DATA3)
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#define bfin_write_CAN0_MB21_DATA3(val) bfin_write16(CAN0_MB21_DATA3, val)
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#define bfin_read_CAN0_MB21_LENGTH() bfin_read16(CAN0_MB21_LENGTH)
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#define bfin_write_CAN0_MB21_LENGTH(val) bfin_write16(CAN0_MB21_LENGTH, val)
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#define bfin_read_CAN0_MB21_TIMESTAMP() bfin_read16(CAN0_MB21_TIMESTAMP)
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#define bfin_write_CAN0_MB21_TIMESTAMP(val) bfin_write16(CAN0_MB21_TIMESTAMP, val)
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#define bfin_read_CAN0_MB21_ID0() bfin_read16(CAN0_MB21_ID0)
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#define bfin_write_CAN0_MB21_ID0(val) bfin_write16(CAN0_MB21_ID0, val)
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#define bfin_read_CAN0_MB21_ID1() bfin_read16(CAN0_MB21_ID1)
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#define bfin_write_CAN0_MB21_ID1(val) bfin_write16(CAN0_MB21_ID1, val)
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#define bfin_read_CAN0_MB22_DATA0() bfin_read16(CAN0_MB22_DATA0)
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#define bfin_write_CAN0_MB22_DATA0(val) bfin_write16(CAN0_MB22_DATA0, val)
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#define bfin_read_CAN0_MB22_DATA1() bfin_read16(CAN0_MB22_DATA1)
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#define bfin_write_CAN0_MB22_DATA1(val) bfin_write16(CAN0_MB22_DATA1, val)
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#define bfin_read_CAN0_MB22_DATA2() bfin_read16(CAN0_MB22_DATA2)
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#define bfin_write_CAN0_MB22_DATA2(val) bfin_write16(CAN0_MB22_DATA2, val)
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#define bfin_read_CAN0_MB22_DATA3() bfin_read16(CAN0_MB22_DATA3)
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#define bfin_write_CAN0_MB22_DATA3(val) bfin_write16(CAN0_MB22_DATA3, val)
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#define bfin_read_CAN0_MB22_LENGTH() bfin_read16(CAN0_MB22_LENGTH)
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#define bfin_write_CAN0_MB22_LENGTH(val) bfin_write16(CAN0_MB22_LENGTH, val)
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#define bfin_read_CAN0_MB22_TIMESTAMP() bfin_read16(CAN0_MB22_TIMESTAMP)
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#define bfin_write_CAN0_MB22_TIMESTAMP(val) bfin_write16(CAN0_MB22_TIMESTAMP, val)
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#define bfin_read_CAN0_MB22_ID0() bfin_read16(CAN0_MB22_ID0)
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#define bfin_write_CAN0_MB22_ID0(val) bfin_write16(CAN0_MB22_ID0, val)
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#define bfin_read_CAN0_MB22_ID1() bfin_read16(CAN0_MB22_ID1)
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#define bfin_write_CAN0_MB22_ID1(val) bfin_write16(CAN0_MB22_ID1, val)
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#define bfin_read_CAN0_MB23_DATA0() bfin_read16(CAN0_MB23_DATA0)
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#define bfin_write_CAN0_MB23_DATA0(val) bfin_write16(CAN0_MB23_DATA0, val)
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#define bfin_read_CAN0_MB23_DATA1() bfin_read16(CAN0_MB23_DATA1)
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#define bfin_write_CAN0_MB23_DATA1(val) bfin_write16(CAN0_MB23_DATA1, val)
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#define bfin_read_CAN0_MB23_DATA2() bfin_read16(CAN0_MB23_DATA2)
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#define bfin_write_CAN0_MB23_DATA2(val) bfin_write16(CAN0_MB23_DATA2, val)
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#define bfin_read_CAN0_MB23_DATA3() bfin_read16(CAN0_MB23_DATA3)
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#define bfin_write_CAN0_MB23_DATA3(val) bfin_write16(CAN0_MB23_DATA3, val)
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#define bfin_read_CAN0_MB23_LENGTH() bfin_read16(CAN0_MB23_LENGTH)
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#define bfin_write_CAN0_MB23_LENGTH(val) bfin_write16(CAN0_MB23_LENGTH, val)
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#define bfin_read_CAN0_MB23_TIMESTAMP() bfin_read16(CAN0_MB23_TIMESTAMP)
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#define bfin_write_CAN0_MB23_TIMESTAMP(val) bfin_write16(CAN0_MB23_TIMESTAMP, val)
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#define bfin_read_CAN0_MB23_ID0() bfin_read16(CAN0_MB23_ID0)
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#define bfin_write_CAN0_MB23_ID0(val) bfin_write16(CAN0_MB23_ID0, val)
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#define bfin_read_CAN0_MB23_ID1() bfin_read16(CAN0_MB23_ID1)
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#define bfin_write_CAN0_MB23_ID1(val) bfin_write16(CAN0_MB23_ID1, val)
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#define bfin_read_CAN0_MB24_DATA0() bfin_read16(CAN0_MB24_DATA0)
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#define bfin_write_CAN0_MB24_DATA0(val) bfin_write16(CAN0_MB24_DATA0, val)
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#define bfin_read_CAN0_MB24_DATA1() bfin_read16(CAN0_MB24_DATA1)
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#define bfin_write_CAN0_MB24_DATA1(val) bfin_write16(CAN0_MB24_DATA1, val)
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#define bfin_read_CAN0_MB24_DATA2() bfin_read16(CAN0_MB24_DATA2)
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#define bfin_write_CAN0_MB24_DATA2(val) bfin_write16(CAN0_MB24_DATA2, val)
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#define bfin_read_CAN0_MB24_DATA3() bfin_read16(CAN0_MB24_DATA3)
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#define bfin_write_CAN0_MB24_DATA3(val) bfin_write16(CAN0_MB24_DATA3, val)
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#define bfin_read_CAN0_MB24_LENGTH() bfin_read16(CAN0_MB24_LENGTH)
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#define bfin_write_CAN0_MB24_LENGTH(val) bfin_write16(CAN0_MB24_LENGTH, val)
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#define bfin_read_CAN0_MB24_TIMESTAMP() bfin_read16(CAN0_MB24_TIMESTAMP)
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#define bfin_write_CAN0_MB24_TIMESTAMP(val) bfin_write16(CAN0_MB24_TIMESTAMP, val)
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#define bfin_read_CAN0_MB24_ID0() bfin_read16(CAN0_MB24_ID0)
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#define bfin_write_CAN0_MB24_ID0(val) bfin_write16(CAN0_MB24_ID0, val)
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#define bfin_read_CAN0_MB24_ID1() bfin_read16(CAN0_MB24_ID1)
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#define bfin_write_CAN0_MB24_ID1(val) bfin_write16(CAN0_MB24_ID1, val)
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#define bfin_read_CAN0_MB25_DATA0() bfin_read16(CAN0_MB25_DATA0)
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#define bfin_write_CAN0_MB25_DATA0(val) bfin_write16(CAN0_MB25_DATA0, val)
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#define bfin_read_CAN0_MB25_DATA1() bfin_read16(CAN0_MB25_DATA1)
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#define bfin_write_CAN0_MB25_DATA1(val) bfin_write16(CAN0_MB25_DATA1, val)
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#define bfin_read_CAN0_MB25_DATA2() bfin_read16(CAN0_MB25_DATA2)
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#define bfin_write_CAN0_MB25_DATA2(val) bfin_write16(CAN0_MB25_DATA2, val)
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#define bfin_read_CAN0_MB25_DATA3() bfin_read16(CAN0_MB25_DATA3)
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#define bfin_write_CAN0_MB25_DATA3(val) bfin_write16(CAN0_MB25_DATA3, val)
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#define bfin_read_CAN0_MB25_LENGTH() bfin_read16(CAN0_MB25_LENGTH)
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#define bfin_write_CAN0_MB25_LENGTH(val) bfin_write16(CAN0_MB25_LENGTH, val)
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#define bfin_read_CAN0_MB25_TIMESTAMP() bfin_read16(CAN0_MB25_TIMESTAMP)
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#define bfin_write_CAN0_MB25_TIMESTAMP(val) bfin_write16(CAN0_MB25_TIMESTAMP, val)
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#define bfin_read_CAN0_MB25_ID0() bfin_read16(CAN0_MB25_ID0)
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#define bfin_write_CAN0_MB25_ID0(val) bfin_write16(CAN0_MB25_ID0, val)
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#define bfin_read_CAN0_MB25_ID1() bfin_read16(CAN0_MB25_ID1)
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#define bfin_write_CAN0_MB25_ID1(val) bfin_write16(CAN0_MB25_ID1, val)
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#define bfin_read_CAN0_MB26_DATA0() bfin_read16(CAN0_MB26_DATA0)
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#define bfin_write_CAN0_MB26_DATA0(val) bfin_write16(CAN0_MB26_DATA0, val)
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#define bfin_read_CAN0_MB26_DATA1() bfin_read16(CAN0_MB26_DATA1)
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#define bfin_write_CAN0_MB26_DATA1(val) bfin_write16(CAN0_MB26_DATA1, val)
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#define bfin_read_CAN0_MB26_DATA2() bfin_read16(CAN0_MB26_DATA2)
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#define bfin_write_CAN0_MB26_DATA2(val) bfin_write16(CAN0_MB26_DATA2, val)
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#define bfin_read_CAN0_MB26_DATA3() bfin_read16(CAN0_MB26_DATA3)
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#define bfin_write_CAN0_MB26_DATA3(val) bfin_write16(CAN0_MB26_DATA3, val)
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#define bfin_read_CAN0_MB26_LENGTH() bfin_read16(CAN0_MB26_LENGTH)
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#define bfin_write_CAN0_MB26_LENGTH(val) bfin_write16(CAN0_MB26_LENGTH, val)
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#define bfin_read_CAN0_MB26_TIMESTAMP() bfin_read16(CAN0_MB26_TIMESTAMP)
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#define bfin_write_CAN0_MB26_TIMESTAMP(val) bfin_write16(CAN0_MB26_TIMESTAMP, val)
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#define bfin_read_CAN0_MB26_ID0() bfin_read16(CAN0_MB26_ID0)
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#define bfin_write_CAN0_MB26_ID0(val) bfin_write16(CAN0_MB26_ID0, val)
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#define bfin_read_CAN0_MB26_ID1() bfin_read16(CAN0_MB26_ID1)
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#define bfin_write_CAN0_MB26_ID1(val) bfin_write16(CAN0_MB26_ID1, val)
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#define bfin_read_CAN0_MB27_DATA0() bfin_read16(CAN0_MB27_DATA0)
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#define bfin_write_CAN0_MB27_DATA0(val) bfin_write16(CAN0_MB27_DATA0, val)
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#define bfin_read_CAN0_MB27_DATA1() bfin_read16(CAN0_MB27_DATA1)
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#define bfin_write_CAN0_MB27_DATA1(val) bfin_write16(CAN0_MB27_DATA1, val)
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#define bfin_read_CAN0_MB27_DATA2() bfin_read16(CAN0_MB27_DATA2)
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#define bfin_write_CAN0_MB27_DATA2(val) bfin_write16(CAN0_MB27_DATA2, val)
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#define bfin_read_CAN0_MB27_DATA3() bfin_read16(CAN0_MB27_DATA3)
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#define bfin_write_CAN0_MB27_DATA3(val) bfin_write16(CAN0_MB27_DATA3, val)
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#define bfin_read_CAN0_MB27_LENGTH() bfin_read16(CAN0_MB27_LENGTH)
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#define bfin_write_CAN0_MB27_LENGTH(val) bfin_write16(CAN0_MB27_LENGTH, val)
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#define bfin_read_CAN0_MB27_TIMESTAMP() bfin_read16(CAN0_MB27_TIMESTAMP)
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#define bfin_write_CAN0_MB27_TIMESTAMP(val) bfin_write16(CAN0_MB27_TIMESTAMP, val)
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#define bfin_read_CAN0_MB27_ID0() bfin_read16(CAN0_MB27_ID0)
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#define bfin_write_CAN0_MB27_ID0(val) bfin_write16(CAN0_MB27_ID0, val)
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#define bfin_read_CAN0_MB27_ID1() bfin_read16(CAN0_MB27_ID1)
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#define bfin_write_CAN0_MB27_ID1(val) bfin_write16(CAN0_MB27_ID1, val)
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#define bfin_read_CAN0_MB28_DATA0() bfin_read16(CAN0_MB28_DATA0)
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#define bfin_write_CAN0_MB28_DATA0(val) bfin_write16(CAN0_MB28_DATA0, val)
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#define bfin_read_CAN0_MB28_DATA1() bfin_read16(CAN0_MB28_DATA1)
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#define bfin_write_CAN0_MB28_DATA1(val) bfin_write16(CAN0_MB28_DATA1, val)
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#define bfin_read_CAN0_MB28_DATA2() bfin_read16(CAN0_MB28_DATA2)
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#define bfin_write_CAN0_MB28_DATA2(val) bfin_write16(CAN0_MB28_DATA2, val)
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#define bfin_read_CAN0_MB28_DATA3() bfin_read16(CAN0_MB28_DATA3)
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#define bfin_write_CAN0_MB28_DATA3(val) bfin_write16(CAN0_MB28_DATA3, val)
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#define bfin_read_CAN0_MB28_LENGTH() bfin_read16(CAN0_MB28_LENGTH)
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#define bfin_write_CAN0_MB28_LENGTH(val) bfin_write16(CAN0_MB28_LENGTH, val)
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#define bfin_read_CAN0_MB28_TIMESTAMP() bfin_read16(CAN0_MB28_TIMESTAMP)
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#define bfin_write_CAN0_MB28_TIMESTAMP(val) bfin_write16(CAN0_MB28_TIMESTAMP, val)
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#define bfin_read_CAN0_MB28_ID0() bfin_read16(CAN0_MB28_ID0)
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#define bfin_write_CAN0_MB28_ID0(val) bfin_write16(CAN0_MB28_ID0, val)
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#define bfin_read_CAN0_MB28_ID1() bfin_read16(CAN0_MB28_ID1)
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#define bfin_write_CAN0_MB28_ID1(val) bfin_write16(CAN0_MB28_ID1, val)
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#define bfin_read_CAN0_MB29_DATA0() bfin_read16(CAN0_MB29_DATA0)
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#define bfin_write_CAN0_MB29_DATA0(val) bfin_write16(CAN0_MB29_DATA0, val)
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#define bfin_read_CAN0_MB29_DATA1() bfin_read16(CAN0_MB29_DATA1)
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#define bfin_write_CAN0_MB29_DATA1(val) bfin_write16(CAN0_MB29_DATA1, val)
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#define bfin_read_CAN0_MB29_DATA2() bfin_read16(CAN0_MB29_DATA2)
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#define bfin_write_CAN0_MB29_DATA2(val) bfin_write16(CAN0_MB29_DATA2, val)
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#define bfin_read_CAN0_MB29_DATA3() bfin_read16(CAN0_MB29_DATA3)
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#define bfin_write_CAN0_MB29_DATA3(val) bfin_write16(CAN0_MB29_DATA3, val)
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#define bfin_read_CAN0_MB29_LENGTH() bfin_read16(CAN0_MB29_LENGTH)
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#define bfin_write_CAN0_MB29_LENGTH(val) bfin_write16(CAN0_MB29_LENGTH, val)
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#define bfin_read_CAN0_MB29_TIMESTAMP() bfin_read16(CAN0_MB29_TIMESTAMP)
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#define bfin_write_CAN0_MB29_TIMESTAMP(val) bfin_write16(CAN0_MB29_TIMESTAMP, val)
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#define bfin_read_CAN0_MB29_ID0() bfin_read16(CAN0_MB29_ID0)
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#define bfin_write_CAN0_MB29_ID0(val) bfin_write16(CAN0_MB29_ID0, val)
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#define bfin_read_CAN0_MB29_ID1() bfin_read16(CAN0_MB29_ID1)
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#define bfin_write_CAN0_MB29_ID1(val) bfin_write16(CAN0_MB29_ID1, val)
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#define bfin_read_CAN0_MB30_DATA0() bfin_read16(CAN0_MB30_DATA0)
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#define bfin_write_CAN0_MB30_DATA0(val) bfin_write16(CAN0_MB30_DATA0, val)
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#define bfin_read_CAN0_MB30_DATA1() bfin_read16(CAN0_MB30_DATA1)
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#define bfin_write_CAN0_MB30_DATA1(val) bfin_write16(CAN0_MB30_DATA1, val)
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#define bfin_read_CAN0_MB30_DATA2() bfin_read16(CAN0_MB30_DATA2)
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#define bfin_write_CAN0_MB30_DATA2(val) bfin_write16(CAN0_MB30_DATA2, val)
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#define bfin_read_CAN0_MB30_DATA3() bfin_read16(CAN0_MB30_DATA3)
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#define bfin_write_CAN0_MB30_DATA3(val) bfin_write16(CAN0_MB30_DATA3, val)
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#define bfin_read_CAN0_MB30_LENGTH() bfin_read16(CAN0_MB30_LENGTH)
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#define bfin_write_CAN0_MB30_LENGTH(val) bfin_write16(CAN0_MB30_LENGTH, val)
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#define bfin_read_CAN0_MB30_TIMESTAMP() bfin_read16(CAN0_MB30_TIMESTAMP)
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#define bfin_write_CAN0_MB30_TIMESTAMP(val) bfin_write16(CAN0_MB30_TIMESTAMP, val)
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#define bfin_read_CAN0_MB30_ID0() bfin_read16(CAN0_MB30_ID0)
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#define bfin_write_CAN0_MB30_ID0(val) bfin_write16(CAN0_MB30_ID0, val)
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#define bfin_read_CAN0_MB30_ID1() bfin_read16(CAN0_MB30_ID1)
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#define bfin_write_CAN0_MB30_ID1(val) bfin_write16(CAN0_MB30_ID1, val)
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#define bfin_read_CAN0_MB31_DATA0() bfin_read16(CAN0_MB31_DATA0)
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#define bfin_write_CAN0_MB31_DATA0(val) bfin_write16(CAN0_MB31_DATA0, val)
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#define bfin_read_CAN0_MB31_DATA1() bfin_read16(CAN0_MB31_DATA1)
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#define bfin_write_CAN0_MB31_DATA1(val) bfin_write16(CAN0_MB31_DATA1, val)
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#define bfin_read_CAN0_MB31_DATA2() bfin_read16(CAN0_MB31_DATA2)
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#define bfin_write_CAN0_MB31_DATA2(val) bfin_write16(CAN0_MB31_DATA2, val)
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#define bfin_read_CAN0_MB31_DATA3() bfin_read16(CAN0_MB31_DATA3)
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#define bfin_write_CAN0_MB31_DATA3(val) bfin_write16(CAN0_MB31_DATA3, val)
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#define bfin_read_CAN0_MB31_LENGTH() bfin_read16(CAN0_MB31_LENGTH)
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#define bfin_write_CAN0_MB31_LENGTH(val) bfin_write16(CAN0_MB31_LENGTH, val)
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#define bfin_read_CAN0_MB31_TIMESTAMP() bfin_read16(CAN0_MB31_TIMESTAMP)
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#define bfin_write_CAN0_MB31_TIMESTAMP(val) bfin_write16(CAN0_MB31_TIMESTAMP, val)
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#define bfin_read_CAN0_MB31_ID0() bfin_read16(CAN0_MB31_ID0)
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#define bfin_write_CAN0_MB31_ID0(val) bfin_write16(CAN0_MB31_ID0, val)
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#define bfin_read_CAN0_MB31_ID1() bfin_read16(CAN0_MB31_ID1)
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#define bfin_write_CAN0_MB31_ID1(val) bfin_write16(CAN0_MB31_ID1, val)
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/* UART3 Registers */
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#define bfin_read_UART3_DLL() bfin_read16(UART3_DLL)
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#define bfin_write_UART3_DLL(val) bfin_write16(UART3_DLL, val)
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#define bfin_read_UART3_DLH() bfin_read16(UART3_DLH)
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#define bfin_write_UART3_DLH(val) bfin_write16(UART3_DLH, val)
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#define bfin_read_UART3_GCTL() bfin_read16(UART3_GCTL)
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#define bfin_write_UART3_GCTL(val) bfin_write16(UART3_GCTL, val)
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#define bfin_read_UART3_LCR() bfin_read16(UART3_LCR)
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#define bfin_write_UART3_LCR(val) bfin_write16(UART3_LCR, val)
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#define bfin_read_UART3_MCR() bfin_read16(UART3_MCR)
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#define bfin_write_UART3_MCR(val) bfin_write16(UART3_MCR, val)
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#define bfin_read_UART3_LSR() bfin_read16(UART3_LSR)
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#define bfin_write_UART3_LSR(val) bfin_write16(UART3_LSR, val)
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#define bfin_read_UART3_MSR() bfin_read16(UART3_MSR)
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#define bfin_write_UART3_MSR(val) bfin_write16(UART3_MSR, val)
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#define bfin_read_UART3_SCR() bfin_read16(UART3_SCR)
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#define bfin_write_UART3_SCR(val) bfin_write16(UART3_SCR, val)
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#define bfin_read_UART3_IER_SET() bfin_read16(UART3_IER_SET)
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#define bfin_write_UART3_IER_SET(val) bfin_write16(UART3_IER_SET, val)
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#define bfin_read_UART3_IER_CLEAR() bfin_read16(UART3_IER_CLEAR)
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#define bfin_write_UART3_IER_CLEAR(val) bfin_write16(UART3_IER_CLEAR, val)
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#define bfin_read_UART3_THR() bfin_read16(UART3_THR)
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#define bfin_write_UART3_THR(val) bfin_write16(UART3_THR, val)
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#define bfin_read_UART3_RBR() bfin_read16(UART3_RBR)
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#define bfin_write_UART3_RBR(val) bfin_write16(UART3_RBR, val)
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/* NFC Registers */
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#define bfin_read_NFC_CTL() bfin_read16(NFC_CTL)
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#define bfin_write_NFC_CTL(val) bfin_write16(NFC_CTL, val)
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#define bfin_read_NFC_STAT() bfin_read16(NFC_STAT)
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#define bfin_write_NFC_STAT(val) bfin_write16(NFC_STAT, val)
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#define bfin_read_NFC_IRQSTAT() bfin_read16(NFC_IRQSTAT)
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#define bfin_write_NFC_IRQSTAT(val) bfin_write16(NFC_IRQSTAT, val)
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#define bfin_read_NFC_IRQMASK() bfin_read16(NFC_IRQMASK)
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#define bfin_write_NFC_IRQMASK(val) bfin_write16(NFC_IRQMASK, val)
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#define bfin_read_NFC_ECC0() bfin_read16(NFC_ECC0)
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#define bfin_write_NFC_ECC0(val) bfin_write16(NFC_ECC0, val)
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#define bfin_read_NFC_ECC1() bfin_read16(NFC_ECC1)
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#define bfin_write_NFC_ECC1(val) bfin_write16(NFC_ECC1, val)
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#define bfin_read_NFC_ECC2() bfin_read16(NFC_ECC2)
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#define bfin_write_NFC_ECC2(val) bfin_write16(NFC_ECC2, val)
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#define bfin_read_NFC_ECC3() bfin_read16(NFC_ECC3)
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#define bfin_write_NFC_ECC3(val) bfin_write16(NFC_ECC3, val)
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#define bfin_read_NFC_COUNT() bfin_read16(NFC_COUNT)
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#define bfin_write_NFC_COUNT(val) bfin_write16(NFC_COUNT, val)
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#define bfin_read_NFC_RST() bfin_read16(NFC_RST)
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#define bfin_write_NFC_RST(val) bfin_write16(NFC_RST, val)
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#define bfin_read_NFC_PGCTL() bfin_read16(NFC_PGCTL)
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#define bfin_write_NFC_PGCTL(val) bfin_write16(NFC_PGCTL, val)
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#define bfin_read_NFC_READ() bfin_read16(NFC_READ)
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#define bfin_write_NFC_READ(val) bfin_write16(NFC_READ, val)
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#define bfin_read_NFC_ADDR() bfin_read16(NFC_ADDR)
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#define bfin_write_NFC_ADDR(val) bfin_write16(NFC_ADDR, val)
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#define bfin_read_NFC_CMD() bfin_read16(NFC_CMD)
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#define bfin_write_NFC_CMD(val) bfin_write16(NFC_CMD, val)
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#define bfin_read_NFC_DATA_WR() bfin_read16(NFC_DATA_WR)
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#define bfin_write_NFC_DATA_WR(val) bfin_write16(NFC_DATA_WR, val)
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#define bfin_read_NFC_DATA_RD() bfin_read16(NFC_DATA_RD)
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#define bfin_write_NFC_DATA_RD(val) bfin_write16(NFC_DATA_RD, val)
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/* Counter Registers */
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#define bfin_read_CNT_CONFIG() bfin_read16(CNT_CONFIG)
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#define bfin_write_CNT_CONFIG(val) bfin_write16(CNT_CONFIG, val)
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#define bfin_read_CNT_IMASK() bfin_read16(CNT_IMASK)
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#define bfin_write_CNT_IMASK(val) bfin_write16(CNT_IMASK, val)
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#define bfin_read_CNT_STATUS() bfin_read16(CNT_STATUS)
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#define bfin_write_CNT_STATUS(val) bfin_write16(CNT_STATUS, val)
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#define bfin_read_CNT_COMMAND() bfin_read16(CNT_COMMAND)
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#define bfin_write_CNT_COMMAND(val) bfin_write16(CNT_COMMAND, val)
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#define bfin_read_CNT_DEBOUNCE() bfin_read16(CNT_DEBOUNCE)
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#define bfin_write_CNT_DEBOUNCE(val) bfin_write16(CNT_DEBOUNCE, val)
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#define bfin_read_CNT_COUNTER() bfin_read32(CNT_COUNTER)
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#define bfin_write_CNT_COUNTER(val) bfin_write32(CNT_COUNTER, val)
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#define bfin_read_CNT_MAX() bfin_read32(CNT_MAX)
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#define bfin_write_CNT_MAX(val) bfin_write32(CNT_MAX, val)
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#define bfin_read_CNT_MIN() bfin_read32(CNT_MIN)
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#define bfin_write_CNT_MIN(val) bfin_write32(CNT_MIN, val)
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/* OTP/FUSE Registers */
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#define bfin_read_OTP_CONTROL() bfin_read16(OTP_CONTROL)
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#define bfin_write_OTP_CONTROL(val) bfin_write16(OTP_CONTROL, val)
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#define bfin_read_OTP_BEN() bfin_read16(OTP_BEN)
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#define bfin_write_OTP_BEN(val) bfin_write16(OTP_BEN, val)
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#define bfin_read_OTP_STATUS() bfin_read16(OTP_STATUS)
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#define bfin_write_OTP_STATUS(val) bfin_write16(OTP_STATUS, val)
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#define bfin_read_OTP_TIMING() bfin_read32(OTP_TIMING)
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#define bfin_write_OTP_TIMING(val) bfin_write32(OTP_TIMING, val)
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/* Security Registers */
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#define bfin_read_SECURE_SYSSWT() bfin_read32(SECURE_SYSSWT)
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#define bfin_write_SECURE_SYSSWT(val) bfin_write32(SECURE_SYSSWT, val)
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#define bfin_read_SECURE_CONTROL() bfin_read16(SECURE_CONTROL)
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#define bfin_write_SECURE_CONTROL(val) bfin_write16(SECURE_CONTROL, val)
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#define bfin_read_SECURE_STATUS() bfin_read16(SECURE_STATUS)
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#define bfin_write_SECURE_STATUS(val) bfin_write16(SECURE_STATUS, val)
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/* DMA Peribfin_read_()heral Mux Register */
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#define bfin_read_DMAC1_PERIMUX() bfin_read16(DMAC1_PERIMUX)
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#define bfin_write_DMAC1_PERIMUX(val) bfin_write16(DMAC1_PERIMUX, val)
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/* OTP Read/Write Data Buffer Registers */
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#define bfin_read_OTP_DATA0() bfin_read32(OTP_DATA0)
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#define bfin_write_OTP_DATA0(val) bfin_write32(OTP_DATA0, val)
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#define bfin_read_OTP_DATA1() bfin_read32(OTP_DATA1)
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#define bfin_write_OTP_DATA1(val) bfin_write32(OTP_DATA1, val)
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#define bfin_read_OTP_DATA2() bfin_read32(OTP_DATA2)
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#define bfin_write_OTP_DATA2(val) bfin_write32(OTP_DATA2, val)
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#define bfin_read_OTP_DATA3() bfin_read32(OTP_DATA3)
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#define bfin_write_OTP_DATA3(val) bfin_write32(OTP_DATA3, val)
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/* Handshake MDMA is not defined in the shared file because it is not available on the ADSP-BF542 bfin_read_()rocessor */
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/* legacy definitions */
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#define bfin_read_EBIU_AMCBCTL0 bfin_read_EBIU_AMBCTL0
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#define bfin_write_EBIU_AMCBCTL0 bfin_write_EBIU_AMBCTL0
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#define bfin_read_EBIU_AMCBCTL1 bfin_read_EBIU_AMBCTL1
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#define bfin_write_EBIU_AMCBCTL1 bfin_write_EBIU_AMBCTL1
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#define bfin_read_PINT0_IRQ bfin_read_PINT0_REQUEST
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#define bfin_write_PINT0_IRQ bfin_write_PINT0_REQUEST
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#define bfin_read_PINT1_IRQ bfin_read_PINT1_REQUEST
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#define bfin_write_PINT1_IRQ bfin_write_PINT1_REQUEST
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#define bfin_read_PINT2_IRQ bfin_read_PINT2_REQUEST
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#define bfin_write_PINT2_IRQ bfin_write_PINT2_REQUEST
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#define bfin_read_PINT3_IRQ bfin_read_PINT3_REQUEST
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#define bfin_write_PINT3_IRQ bfin_write_PINT3_REQUEST
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#endif /* _CDEF_BF54X_H */
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