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The arc DMA code supports DMA_ATTR_NON_CONSISTENT allocations, but does not provide a cache_sync operation. This means any user of it will never be able to actually transfer cache ownership and thus cause coherency bugs. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Evgeniy Paltsev <paltsev@synopsys.com> Tested-by: Evgeniy Paltsev <paltsev@synopsys.com> |
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kernel | ||
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mm | ||
oprofile | ||
plat-axs10x | ||
plat-eznps | ||
plat-hsdk | ||
plat-sim | ||
plat-tb10x | ||
Kbuild | ||
Kconfig | ||
Kconfig.debug | ||
Makefile |