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663b97f7ef
There was one small but very significant change in the previous patch: mprotect's flush_tlb_range fell outside the page_table_lock: as it is in 2.4, but that doesn't prove it safe in 2.6. On some architectures flush_tlb_range comes to the same as flush_tlb_mm, which has always been called from outside page_table_lock in dup_mmap, and is so proved safe. Others required a deeper audit: I could find no reliance on page_table_lock in any; but in ia64 and parisc found some code which looks a bit as if it might want preemption disabled. That won't do any actual harm, so pending a decision from the maintainers, disable preemption there. Remove comments on page_table_lock from flush_tlb_mm, flush_tlb_range and flush_tlb_page entries in cachetlb.txt: they were rather misleading (what generic code does is different from what usually happens), the rules are now changing, and it's not yet clear where we'll end up (will the generic tlb_flush_mmu happen always under lock? never under lock? or sometimes under and sometimes not?). Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
196 lines
4.6 KiB
C
196 lines
4.6 KiB
C
/*
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* TLB support routines.
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*
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* Copyright (C) 1998-2001, 2003 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*
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* 08/02/00 A. Mallick <asit.k.mallick@intel.com>
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* Modified RID allocation for SMP
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* Goutham Rao <goutham.rao@intel.com>
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* IPI based ptc implementation and A-step IPI implementation.
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*/
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/smp.h>
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#include <linux/mm.h>
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#include <asm/delay.h>
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#include <asm/mmu_context.h>
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#include <asm/pgalloc.h>
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#include <asm/pal.h>
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#include <asm/tlbflush.h>
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static struct {
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unsigned long mask; /* mask of supported purge page-sizes */
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unsigned long max_bits; /* log2() of largest supported purge page-size */
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} purge;
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struct ia64_ctx ia64_ctx = {
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.lock = SPIN_LOCK_UNLOCKED,
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.next = 1,
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.limit = (1 << 15) - 1, /* start out with the safe (architected) limit */
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.max_ctx = ~0U
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};
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DEFINE_PER_CPU(u8, ia64_need_tlb_flush);
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/*
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* Acquire the ia64_ctx.lock before calling this function!
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*/
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void
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wrap_mmu_context (struct mm_struct *mm)
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{
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unsigned long tsk_context, max_ctx = ia64_ctx.max_ctx;
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struct task_struct *tsk;
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int i;
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if (ia64_ctx.next > max_ctx)
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ia64_ctx.next = 300; /* skip daemons */
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ia64_ctx.limit = max_ctx + 1;
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/*
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* Scan all the task's mm->context and set proper safe range
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*/
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read_lock(&tasklist_lock);
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repeat:
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for_each_process(tsk) {
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if (!tsk->mm)
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continue;
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tsk_context = tsk->mm->context;
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if (tsk_context == ia64_ctx.next) {
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if (++ia64_ctx.next >= ia64_ctx.limit) {
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/* empty range: reset the range limit and start over */
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if (ia64_ctx.next > max_ctx)
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ia64_ctx.next = 300;
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ia64_ctx.limit = max_ctx + 1;
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goto repeat;
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}
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}
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if ((tsk_context > ia64_ctx.next) && (tsk_context < ia64_ctx.limit))
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ia64_ctx.limit = tsk_context;
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}
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read_unlock(&tasklist_lock);
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/* can't call flush_tlb_all() here because of race condition with O(1) scheduler [EF] */
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{
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int cpu = get_cpu(); /* prevent preemption/migration */
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for_each_online_cpu(i) {
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if (i != cpu)
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per_cpu(ia64_need_tlb_flush, i) = 1;
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}
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put_cpu();
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}
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local_flush_tlb_all();
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}
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void
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ia64_global_tlb_purge (struct mm_struct *mm, unsigned long start, unsigned long end, unsigned long nbits)
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{
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static DEFINE_SPINLOCK(ptcg_lock);
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if (mm != current->active_mm) {
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flush_tlb_all();
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return;
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}
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/* HW requires global serialization of ptc.ga. */
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spin_lock(&ptcg_lock);
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{
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do {
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/*
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* Flush ALAT entries also.
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*/
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ia64_ptcga(start, (nbits<<2));
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ia64_srlz_i();
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start += (1UL << nbits);
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} while (start < end);
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}
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spin_unlock(&ptcg_lock);
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}
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void
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local_flush_tlb_all (void)
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{
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unsigned long i, j, flags, count0, count1, stride0, stride1, addr;
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addr = local_cpu_data->ptce_base;
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count0 = local_cpu_data->ptce_count[0];
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count1 = local_cpu_data->ptce_count[1];
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stride0 = local_cpu_data->ptce_stride[0];
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stride1 = local_cpu_data->ptce_stride[1];
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local_irq_save(flags);
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for (i = 0; i < count0; ++i) {
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for (j = 0; j < count1; ++j) {
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ia64_ptce(addr);
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addr += stride1;
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}
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addr += stride0;
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}
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local_irq_restore(flags);
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ia64_srlz_i(); /* srlz.i implies srlz.d */
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}
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void
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flush_tlb_range (struct vm_area_struct *vma, unsigned long start, unsigned long end)
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{
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struct mm_struct *mm = vma->vm_mm;
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unsigned long size = end - start;
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unsigned long nbits;
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#ifndef CONFIG_SMP
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if (mm != current->active_mm) {
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mm->context = 0;
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return;
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}
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#endif
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nbits = ia64_fls(size + 0xfff);
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while (unlikely (((1UL << nbits) & purge.mask) == 0) && (nbits < purge.max_bits))
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++nbits;
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if (nbits > purge.max_bits)
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nbits = purge.max_bits;
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start &= ~((1UL << nbits) - 1);
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# ifdef CONFIG_SMP
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platform_global_tlb_purge(mm, start, end, nbits);
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# else
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preempt_disable();
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do {
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ia64_ptcl(start, (nbits<<2));
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start += (1UL << nbits);
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} while (start < end);
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preempt_enable();
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# endif
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ia64_srlz_i(); /* srlz.i implies srlz.d */
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}
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EXPORT_SYMBOL(flush_tlb_range);
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void __devinit
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ia64_tlb_init (void)
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{
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ia64_ptce_info_t ptce_info;
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unsigned long tr_pgbits;
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long status;
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if ((status = ia64_pal_vm_page_size(&tr_pgbits, &purge.mask)) != 0) {
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printk(KERN_ERR "PAL_VM_PAGE_SIZE failed with status=%ld;"
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"defaulting to architected purge page-sizes.\n", status);
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purge.mask = 0x115557000UL;
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}
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purge.max_bits = ia64_fls(purge.mask);
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ia64_get_ptce(&ptce_info);
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local_cpu_data->ptce_base = ptce_info.base;
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local_cpu_data->ptce_count[0] = ptce_info.count[0];
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local_cpu_data->ptce_count[1] = ptce_info.count[1];
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local_cpu_data->ptce_stride[0] = ptce_info.stride[0];
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local_cpu_data->ptce_stride[1] = ptce_info.stride[1];
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local_flush_tlb_all(); /* nuke left overs from bootstrapping... */
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}
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