mirror of
https://github.com/torvalds/linux.git
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7afd16f882
Enumeration Refine PCI support check in pcibios_init() (Adrian-Ken Rueegsegger) Provide common functions for ECAM mapping (Jayachandran C) Allow all PCIe services on non-ACPI host bridges (Jon Derrick) Remove return values from pcie_port_platform_notify() and relatives (Jon Derrick) Widen portdrv service type from 4 bits to 8 bits (Keith Busch) Add Downstream Port Containment portdrv service type (Keith Busch) Add Downstream Port Containment driver (Keith Busch) Resource management Identify Enhanced Allocation (EA) BAR Equivalent resources in sysfs (Alex Williamson) Supply CPU physical address (not bus address) to iomem_is_exclusive() (Bjorn Helgaas) alpha: Call iomem_is_exclusive() for IORESOURCE_MEM, but not IORESOURCE_IO (Bjorn Helgaas) Mark Broadwell-EP Home Agent 1 as having non-compliant BARs (Prarit Bhargava) Disable all BAR sizing for devices with non-compliant BARs (Prarit Bhargava) Move PCI I/O space management from OF to PCI core code (Tomasz Nowicki) PCI device hotplug acpiphp_ibm: Avoid uninitialized variable reference (Dan Carpenter) Use cached copy of PCI_EXP_SLTCAP_HPC bit (Lukas Wunner) Virtualization Mark Intel i40e NIC INTx masking as broken (Alex Williamson) Reverse standard ACS vs device-specific ACS enabling (Alex Williamson) Work around Intel Sunrise Point PCH incorrect ACS capability (Alex Williamson) IOMMU Add pci_add_dma_alias() to abstract implementation (Bjorn Helgaas) Move informational printk to pci_add_dma_alias() (Bjorn Helgaas) Add support for multiple DMA aliases (Jacek Lawrynowicz) Add DMA alias quirk for mic_x200_dma (Jacek Lawrynowicz) Thunderbolt Fix double free of drom buffer (Andreas Noever) Add Intel Thunderbolt device IDs (Lukas Wunner) Fix typos and magic number (Lukas Wunner) Support 1st gen Light Ridge controller (Lukas Wunner) Generic host bridge driver Use generic ECAM API (Jayachandran C) Cavium ThunderX host bridge driver Don't clobber read-only bits in bridge config registers (David Daney) Use generic ECAM API (Jayachandran C) Freescale i.MX6 host bridge driver Use enum instead of bool for variant indicator (Andrey Smirnov) Implement reset sequence for i.MX6+ (Andrey Smirnov) Factor out ref clock enable (Bjorn Helgaas) Add initial imx6sx support (Christoph Fritz) Add reset-gpio-active-high boolean property to DT (Petr Štetiar) Add DT property for link gen, default to Gen1 (Tim Harvey) dts: Specify imx6qp version of PCIe core (Andrey Smirnov) dts: Fix PCIe reset GPIO polarity on Toradex Apalis Ixora (Petr Štetiar) Marvell Armada host bridge driver add DT binding for Marvell Armada 7K/8K PCIe controller (Thomas Petazzoni) Add driver for Marvell Armada 7K/8K PCIe controller (Thomas Petazzoni) Marvell MVEBU host bridge driver Constify mvebu_pcie_pm_ops structure (Jisheng Zhang) Use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS for mvebu_pcie_pm_ops (Jisheng Zhang) Microsoft Hyper-V host bridge driver Report resources release after stopping the bus (Vitaly Kuznetsov) Add explicit barriers to config space access (Vitaly Kuznetsov) Renesas R-Car host bridge driver Select PCI_MSI_IRQ_DOMAIN (Arnd Bergmann) Synopsys DesignWare host bridge driver Remove incorrect RC memory base/limit configuration (Gabriele Paoloni) Move Root Complex setup code to dw_pcie_setup_rc() (Jisheng Zhang) TI Keystone host bridge driver Add error IRQ handler (Murali Karicheri) Remove unnecessary goto statement (Murali Karicheri) Miscellaneous Fix spelling errors (Colin Ian King) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXPdMKAAoJEFmIoMA60/r8ofUP/j0zyzn24f0xY1wLeGJ8geB9 6nHk1QdkPqwCiXZahEcnA5HMlFCl/ciWjjsoCqeMlvS6NXkX13KGcc1UGZszelTs 68bFhyBKqcoMn0it53vBjBXnkfA64PmlxwY/T1ADulxL8amFOCpjjBruZ8pxJ/U7 r6uHvhxUxHCRF7hMmpNN+V5XWXWCFFkPJZvxOTkglaxkbdnhZ0h0Xz9p9liUvjPH mBE72E3WUjiGogXGoLAPDclz1NI6rhRVUyTRcQ8EWaOwitV3OqMuDpAwoWH62ZZJ iorCkQk2/eKfN6OA6UgZh4loauAty0FeoZDX7ZVftQr52IpAzRUVx1oAq0J7u4ga KRX37mlK/53UcMZyv9Lz2kw4KjaLLELiInzcF+w3Bbov4UhY4/sL5uh9eNMFvSUU iZuY+GFlceL0P6wZuVKU5U8td/CyBr3f5vY/3htxuYHE1xJq4FkL92JpWRCvwpVr YdCzocscw73Yn8ZMplt8DX2fyabN7HyGezbQISrDDGY6T0ZDsRRKc6FFAt4xF+ta JJ+bcY8OcXtxGw6SXtrscL7vNXdR7Zg1HBSa8Sl/CopCdW9zs0VdwgFoxgORcWDT mphIgt57DMzaiUUaV8FRQz0mSLixnAcCEfGjVbAEEw3SP5ZChGfS3EknKb/CPRyk TD6I3pXTBhTWXd8aS113 =68Iz -----END PGP SIGNATURE----- Merge tag 'pci-v4.7-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "Enumeration: - Refine PCI support check in pcibios_init() (Adrian-Ken Rueegsegger) - Provide common functions for ECAM mapping (Jayachandran C) - Allow all PCIe services on non-ACPI host bridges (Jon Derrick) - Remove return values from pcie_port_platform_notify() and relatives (Jon Derrick) - Widen portdrv service type from 4 bits to 8 bits (Keith Busch) - Add Downstream Port Containment portdrv service type (Keith Busch) - Add Downstream Port Containment driver (Keith Busch) Resource management: - Identify Enhanced Allocation (EA) BAR Equivalent resources in sysfs (Alex Williamson) - Supply CPU physical address (not bus address) to iomem_is_exclusive() (Bjorn Helgaas) - alpha: Call iomem_is_exclusive() for IORESOURCE_MEM, but not IORESOURCE_IO (Bjorn Helgaas) - Mark Broadwell-EP Home Agent 1 as having non-compliant BARs (Prarit Bhargava) - Disable all BAR sizing for devices with non-compliant BARs (Prarit Bhargava) - Move PCI I/O space management from OF to PCI core code (Tomasz Nowicki) PCI device hotplug: - acpiphp_ibm: Avoid uninitialized variable reference (Dan Carpenter) - Use cached copy of PCI_EXP_SLTCAP_HPC bit (Lukas Wunner) Virtualization: - Mark Intel i40e NIC INTx masking as broken (Alex Williamson) - Reverse standard ACS vs device-specific ACS enabling (Alex Williamson) - Work around Intel Sunrise Point PCH incorrect ACS capability (Alex Williamson) IOMMU: - Add pci_add_dma_alias() to abstract implementation (Bjorn Helgaas) - Move informational printk to pci_add_dma_alias() (Bjorn Helgaas) - Add support for multiple DMA aliases (Jacek Lawrynowicz) - Add DMA alias quirk for mic_x200_dma (Jacek Lawrynowicz) Thunderbolt: - Fix double free of drom buffer (Andreas Noever) - Add Intel Thunderbolt device IDs (Lukas Wunner) - Fix typos and magic number (Lukas Wunner) - Support 1st gen Light Ridge controller (Lukas Wunner) Generic host bridge driver: - Use generic ECAM API (Jayachandran C) Cavium ThunderX host bridge driver: - Don't clobber read-only bits in bridge config registers (David Daney) - Use generic ECAM API (Jayachandran C) Freescale i.MX6 host bridge driver: - Use enum instead of bool for variant indicator (Andrey Smirnov) - Implement reset sequence for i.MX6+ (Andrey Smirnov) - Factor out ref clock enable (Bjorn Helgaas) - Add initial imx6sx support (Christoph Fritz) - Add reset-gpio-active-high boolean property to DT (Petr Štetiar) - Add DT property for link gen, default to Gen1 (Tim Harvey) - dts: Specify imx6qp version of PCIe core (Andrey Smirnov) - dts: Fix PCIe reset GPIO polarity on Toradex Apalis Ixora (Petr Štetiar) Marvell Armada host bridge driver: - add DT binding for Marvell Armada 7K/8K PCIe controller (Thomas Petazzoni) - Add driver for Marvell Armada 7K/8K PCIe controller (Thomas Petazzoni) Marvell MVEBU host bridge driver: - Constify mvebu_pcie_pm_ops structure (Jisheng Zhang) - Use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS for mvebu_pcie_pm_ops (Jisheng Zhang) Microsoft Hyper-V host bridge driver: - Report resources release after stopping the bus (Vitaly Kuznetsov) - Add explicit barriers to config space access (Vitaly Kuznetsov) Renesas R-Car host bridge driver: - Select PCI_MSI_IRQ_DOMAIN (Arnd Bergmann) Synopsys DesignWare host bridge driver: - Remove incorrect RC memory base/limit configuration (Gabriele Paoloni) - Move Root Complex setup code to dw_pcie_setup_rc() (Jisheng Zhang) TI Keystone host bridge driver: - Add error IRQ handler (Murali Karicheri) - Remove unnecessary goto statement (Murali Karicheri) Miscellaneous: - Fix spelling errors (Colin Ian King)" * tag 'pci-v4.7-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (48 commits) PCI: Disable all BAR sizing for devices with non-compliant BARs x86/PCI: Mark Broadwell-EP Home Agent 1 as having non-compliant BARs PCI: Identify Enhanced Allocation (EA) BAR Equivalent resources in sysfs PCI, of: Move PCI I/O space management to PCI core code PCI: generic, thunder: Use generic ECAM API PCI: Provide common functions for ECAM mapping PCI: hv: Add explicit barriers to config space access PCI: Use cached copy of PCI_EXP_SLTCAP_HPC bit PCI: Add Downstream Port Containment driver PCI: Add Downstream Port Containment portdrv service type PCI: Widen portdrv service type from 4 bits to 8 bits PCI: designware: Remove incorrect RC memory base/limit configuration PCI: hv: Report resources release after stopping the bus ARM: dts: imx6qp: Specify imx6qp version of PCIe core PCI: imx6: Implement reset sequence for i.MX6+ PCI: imx6: Use enum instead of bool for variant indicator PCI: thunder: Don't clobber read-only bits in bridge config registers thunderbolt: Fix double free of drom buffer PCI: rcar: Select PCI_MSI_IRQ_DOMAIN PCI: armada: Add driver for Marvell Armada 7K/8K PCIe controller ...
249 lines
6.8 KiB
Plaintext
249 lines
6.8 KiB
Plaintext
menu "PCI host controller drivers"
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depends on PCI
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config PCI_DRA7XX
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bool "TI DRA7xx PCIe controller"
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select PCIE_DW
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depends on OF && HAS_IOMEM && TI_PIPE3
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help
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Enables support for the PCIe controller in the DRA7xx SoC. There
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are two instances of PCIe controller in DRA7xx. This controller can
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act both as EP and RC. This reuses the Designware core.
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config PCI_MVEBU
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bool "Marvell EBU PCIe controller"
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depends on ARCH_MVEBU || ARCH_DOVE
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depends on ARM
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depends on OF
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config PCIE_XILINX_NWL
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bool "NWL PCIe Core"
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depends on ARCH_ZYNQMP
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select PCI_MSI_IRQ_DOMAIN if PCI_MSI
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help
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Say 'Y' here if you want kernel support for Xilinx
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NWL PCIe controller. The controller can act as Root Port
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or End Point. The current option selection will only
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support root port enabling.
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config PCIE_DW_PLAT
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bool "Platform bus based DesignWare PCIe Controller"
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select PCIE_DW
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---help---
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This selects the DesignWare PCIe controller support. Select this if
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you have a PCIe controller on Platform bus.
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If you have a controller with this interface, say Y or M here.
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If unsure, say N.
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config PCIE_DW
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bool
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config PCI_EXYNOS
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bool "Samsung Exynos PCIe controller"
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depends on SOC_EXYNOS5440
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select PCIEPORTBUS
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select PCIE_DW
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config PCI_IMX6
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bool "Freescale i.MX6 PCIe controller"
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depends on SOC_IMX6Q
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select PCIEPORTBUS
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select PCIE_DW
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config PCI_TEGRA
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bool "NVIDIA Tegra PCIe controller"
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depends on ARCH_TEGRA && !ARM64
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help
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Say Y here if you want support for the PCIe host controller found
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on NVIDIA Tegra SoCs.
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config PCI_RCAR_GEN2
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bool "Renesas R-Car Gen2 Internal PCI controller"
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depends on ARM
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depends on ARCH_RENESAS || COMPILE_TEST
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help
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Say Y here if you want internal PCI support on R-Car Gen2 SoC.
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There are 3 internal PCI controllers available with a single
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built-in EHCI/OHCI host controller present on each one.
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config PCIE_RCAR
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bool "Renesas R-Car PCIe controller"
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depends on ARCH_RENESAS || (ARM && COMPILE_TEST)
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select PCI_MSI
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select PCI_MSI_IRQ_DOMAIN
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help
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Say Y here if you want PCIe controller support on R-Car SoCs.
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config PCI_HOST_COMMON
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bool
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select PCI_ECAM
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config PCI_HOST_GENERIC
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bool "Generic PCI host controller"
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depends on (ARM || ARM64) && OF
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select PCI_HOST_COMMON
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help
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Say Y here if you want to support a simple generic PCI host
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controller, such as the one emulated by kvmtool.
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config PCIE_SPEAR13XX
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bool "STMicroelectronics SPEAr PCIe controller"
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depends on ARCH_SPEAR13XX
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select PCIEPORTBUS
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select PCIE_DW
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help
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Say Y here if you want PCIe support on SPEAr13XX SoCs.
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config PCI_KEYSTONE
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bool "TI Keystone PCIe controller"
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depends on ARCH_KEYSTONE
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select PCIE_DW
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select PCIEPORTBUS
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help
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Say Y here if you want to enable PCI controller support on Keystone
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SoCs. The PCI controller on Keystone is based on Designware hardware
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and therefore the driver re-uses the Designware core functions to
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implement the driver.
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config PCIE_XILINX
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bool "Xilinx AXI PCIe host bridge support"
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depends on ARCH_ZYNQ || MICROBLAZE
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help
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Say 'Y' here if you want kernel to support the Xilinx AXI PCIe
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Host Bridge driver.
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config PCI_XGENE
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bool "X-Gene PCIe controller"
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depends on ARCH_XGENE
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depends on OF
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select PCIEPORTBUS
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select PCI_MSI_IRQ_DOMAIN if PCI_MSI
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help
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Say Y here if you want internal PCI support on APM X-Gene SoC.
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There are 5 internal PCIe ports available. Each port is GEN3 capable
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and have varied lanes from x1 to x8.
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config PCI_XGENE_MSI
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bool "X-Gene v1 PCIe MSI feature"
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depends on PCI_XGENE && PCI_MSI
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default y
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help
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Say Y here if you want PCIe MSI support for the APM X-Gene v1 SoC.
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This MSI driver supports 5 PCIe ports on the APM X-Gene v1 SoC.
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config PCI_LAYERSCAPE
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bool "Freescale Layerscape PCIe controller"
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depends on OF && (ARM || ARCH_LAYERSCAPE)
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select PCIE_DW
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select MFD_SYSCON
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help
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Say Y here if you want PCIe controller support on Layerscape SoCs.
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config PCI_VERSATILE
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bool "ARM Versatile PB PCI controller"
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depends on ARCH_VERSATILE
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config PCIE_IPROC
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tristate
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help
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This enables the iProc PCIe core controller support for Broadcom's
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iProc family of SoCs. An appropriate bus interface driver needs
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to be enabled to select this.
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config PCIE_IPROC_PLATFORM
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tristate "Broadcom iProc PCIe platform bus driver"
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depends on ARCH_BCM_IPROC || (ARM && COMPILE_TEST)
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depends on OF
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select PCIE_IPROC
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default ARCH_BCM_IPROC
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help
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Say Y here if you want to use the Broadcom iProc PCIe controller
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through the generic platform bus interface
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config PCIE_IPROC_BCMA
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tristate "Broadcom iProc PCIe BCMA bus driver"
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depends on ARM && (ARCH_BCM_IPROC || COMPILE_TEST)
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select PCIE_IPROC
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select BCMA
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select PCI_DOMAINS
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default ARCH_BCM_5301X
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help
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Say Y here if you want to use the Broadcom iProc PCIe controller
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through the BCMA bus interface
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config PCIE_IPROC_MSI
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bool "Broadcom iProc PCIe MSI support"
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depends on PCIE_IPROC_PLATFORM || PCIE_IPROC_BCMA
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depends on PCI_MSI
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select PCI_MSI_IRQ_DOMAIN
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default ARCH_BCM_IPROC
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help
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Say Y here if you want to enable MSI support for Broadcom's iProc
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PCIe controller
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config PCIE_ALTERA
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bool "Altera PCIe controller"
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depends on ARM || NIOS2
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depends on OF_PCI
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select PCI_DOMAINS
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help
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Say Y here if you want to enable PCIe controller support on Altera
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FPGA.
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config PCIE_ALTERA_MSI
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bool "Altera PCIe MSI feature"
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depends on PCIE_ALTERA && PCI_MSI
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select PCI_MSI_IRQ_DOMAIN
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help
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Say Y here if you want PCIe MSI support for the Altera FPGA.
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This MSI driver supports Altera MSI to GIC controller IP.
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config PCI_HISI
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depends on OF && ARM64
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bool "HiSilicon Hip05 and Hip06 SoCs PCIe controllers"
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select PCIEPORTBUS
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select PCIE_DW
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help
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Say Y here if you want PCIe controller support on HiSilicon
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Hip05 and Hip06 SoCs
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config PCIE_QCOM
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bool "Qualcomm PCIe controller"
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depends on ARCH_QCOM && OF
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select PCIE_DW
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select PCIEPORTBUS
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help
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Say Y here to enable PCIe controller support on Qualcomm SoCs. The
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PCIe controller uses the Designware core plus Qualcomm-specific
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hardware wrappers.
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config PCI_HOST_THUNDER_PEM
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bool "Cavium Thunder PCIe controller to off-chip devices"
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depends on OF && ARM64
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select PCI_HOST_COMMON
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help
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Say Y here if you want PCIe support for CN88XX Cavium Thunder SoCs.
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config PCI_HOST_THUNDER_ECAM
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bool "Cavium Thunder ECAM controller to on-chip devices on pass-1.x silicon"
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depends on OF && ARM64
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select PCI_HOST_COMMON
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help
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Say Y here if you want ECAM support for CN88XX-Pass-1.x Cavium Thunder SoCs.
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config PCIE_ARMADA_8K
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bool "Marvell Armada-8K PCIe controller"
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depends on ARCH_MVEBU
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select PCIE_DW
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select PCIEPORTBUS
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help
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Say Y here if you want to enable PCIe controller support on
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Armada-8K SoCs. The PCIe controller on Armada-8K is based on
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Designware hardware and therefore the driver re-uses the
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Designware core functions to implement the driver.
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endmenu
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