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7847777a45
After changing all consumers of atomics to include <linux/atomic.h>, we ran into some compile time errors due to this dependency chain: linux/atomic.h -> asm/atomic.h -> asm-generic/atomic-long.h where atomic-long.h could use funcs defined later in linux/atomic.h without a prototype. This patches moves the code that includes asm-generic/atomic*.h to linux/atomic.h. Archs that need <asm-generic/atomic64.h> need to select CONFIG_GENERIC_ATOMIC64 from now on (some of them used to include it unconditionally). Compile tested on i386 and x86_64 with allnoconfig. Signed-off-by: Arun Sharma <asharma@fb.com> Cc: Eric Dumazet <eric.dumazet@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: David Miller <davem@davemloft.net> Acked-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
335 lines
7.3 KiB
C
335 lines
7.3 KiB
C
#ifndef __ARCH_S390_ATOMIC__
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#define __ARCH_S390_ATOMIC__
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/*
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* Copyright 1999,2009 IBM Corp.
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* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
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* Denis Joseph Barrow,
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* Arnd Bergmann <arndb@de.ibm.com>,
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*
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* Atomic operations that C can't guarantee us.
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* Useful for resource counting etc.
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* s390 uses 'Compare And Swap' for atomicity in SMP environment.
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*
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*/
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#include <linux/compiler.h>
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#include <linux/types.h>
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#include <asm/system.h>
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#define ATOMIC_INIT(i) { (i) }
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#define __CS_LOOP(ptr, op_val, op_string) ({ \
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int old_val, new_val; \
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asm volatile( \
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" l %0,%2\n" \
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"0: lr %1,%0\n" \
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op_string " %1,%3\n" \
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" cs %0,%1,%2\n" \
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" jl 0b" \
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: "=&d" (old_val), "=&d" (new_val), \
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"=Q" (((atomic_t *)(ptr))->counter) \
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: "d" (op_val), "Q" (((atomic_t *)(ptr))->counter) \
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: "cc", "memory"); \
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new_val; \
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})
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static inline int atomic_read(const atomic_t *v)
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{
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int c;
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asm volatile(
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" l %0,%1\n"
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: "=d" (c) : "Q" (v->counter));
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return c;
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}
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static inline void atomic_set(atomic_t *v, int i)
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{
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asm volatile(
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" st %1,%0\n"
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: "=Q" (v->counter) : "d" (i));
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}
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static inline int atomic_add_return(int i, atomic_t *v)
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{
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return __CS_LOOP(v, i, "ar");
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}
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#define atomic_add(_i, _v) atomic_add_return(_i, _v)
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#define atomic_add_negative(_i, _v) (atomic_add_return(_i, _v) < 0)
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#define atomic_inc(_v) atomic_add_return(1, _v)
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#define atomic_inc_return(_v) atomic_add_return(1, _v)
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#define atomic_inc_and_test(_v) (atomic_add_return(1, _v) == 0)
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static inline int atomic_sub_return(int i, atomic_t *v)
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{
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return __CS_LOOP(v, i, "sr");
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}
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#define atomic_sub(_i, _v) atomic_sub_return(_i, _v)
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#define atomic_sub_and_test(_i, _v) (atomic_sub_return(_i, _v) == 0)
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#define atomic_dec(_v) atomic_sub_return(1, _v)
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#define atomic_dec_return(_v) atomic_sub_return(1, _v)
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#define atomic_dec_and_test(_v) (atomic_sub_return(1, _v) == 0)
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static inline void atomic_clear_mask(unsigned long mask, atomic_t *v)
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{
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__CS_LOOP(v, ~mask, "nr");
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}
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static inline void atomic_set_mask(unsigned long mask, atomic_t *v)
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{
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__CS_LOOP(v, mask, "or");
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}
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#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
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{
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asm volatile(
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" cs %0,%2,%1"
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: "+d" (old), "=Q" (v->counter)
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: "d" (new), "Q" (v->counter)
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: "cc", "memory");
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return old;
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}
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static inline int __atomic_add_unless(atomic_t *v, int a, int u)
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{
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int c, old;
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c = atomic_read(v);
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for (;;) {
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if (unlikely(c == u))
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break;
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old = atomic_cmpxchg(v, c, c + a);
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if (likely(old == c))
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break;
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c = old;
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}
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return c;
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}
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#undef __CS_LOOP
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#define ATOMIC64_INIT(i) { (i) }
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#ifdef CONFIG_64BIT
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#define __CSG_LOOP(ptr, op_val, op_string) ({ \
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long long old_val, new_val; \
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asm volatile( \
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" lg %0,%2\n" \
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"0: lgr %1,%0\n" \
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op_string " %1,%3\n" \
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" csg %0,%1,%2\n" \
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" jl 0b" \
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: "=&d" (old_val), "=&d" (new_val), \
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"=Q" (((atomic_t *)(ptr))->counter) \
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: "d" (op_val), "Q" (((atomic_t *)(ptr))->counter) \
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: "cc", "memory"); \
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new_val; \
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})
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static inline long long atomic64_read(const atomic64_t *v)
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{
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long long c;
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asm volatile(
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" lg %0,%1\n"
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: "=d" (c) : "Q" (v->counter));
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return c;
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}
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static inline void atomic64_set(atomic64_t *v, long long i)
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{
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asm volatile(
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" stg %1,%0\n"
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: "=Q" (v->counter) : "d" (i));
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}
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static inline long long atomic64_add_return(long long i, atomic64_t *v)
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{
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return __CSG_LOOP(v, i, "agr");
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}
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static inline long long atomic64_sub_return(long long i, atomic64_t *v)
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{
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return __CSG_LOOP(v, i, "sgr");
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}
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static inline void atomic64_clear_mask(unsigned long mask, atomic64_t *v)
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{
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__CSG_LOOP(v, ~mask, "ngr");
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}
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static inline void atomic64_set_mask(unsigned long mask, atomic64_t *v)
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{
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__CSG_LOOP(v, mask, "ogr");
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}
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#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
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static inline long long atomic64_cmpxchg(atomic64_t *v,
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long long old, long long new)
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{
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asm volatile(
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" csg %0,%2,%1"
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: "+d" (old), "=Q" (v->counter)
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: "d" (new), "Q" (v->counter)
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: "cc", "memory");
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return old;
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}
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#undef __CSG_LOOP
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#else /* CONFIG_64BIT */
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typedef struct {
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long long counter;
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} atomic64_t;
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static inline long long atomic64_read(const atomic64_t *v)
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{
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register_pair rp;
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asm volatile(
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" lm %0,%N0,%1"
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: "=&d" (rp) : "Q" (v->counter) );
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return rp.pair;
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}
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static inline void atomic64_set(atomic64_t *v, long long i)
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{
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register_pair rp = {.pair = i};
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asm volatile(
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" stm %1,%N1,%0"
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: "=Q" (v->counter) : "d" (rp) );
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}
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static inline long long atomic64_xchg(atomic64_t *v, long long new)
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{
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register_pair rp_new = {.pair = new};
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register_pair rp_old;
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asm volatile(
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" lm %0,%N0,%1\n"
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"0: cds %0,%2,%1\n"
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" jl 0b\n"
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: "=&d" (rp_old), "=Q" (v->counter)
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: "d" (rp_new), "Q" (v->counter)
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: "cc");
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return rp_old.pair;
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}
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static inline long long atomic64_cmpxchg(atomic64_t *v,
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long long old, long long new)
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{
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register_pair rp_old = {.pair = old};
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register_pair rp_new = {.pair = new};
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asm volatile(
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" cds %0,%2,%1"
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: "+&d" (rp_old), "=Q" (v->counter)
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: "d" (rp_new), "Q" (v->counter)
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: "cc");
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return rp_old.pair;
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}
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static inline long long atomic64_add_return(long long i, atomic64_t *v)
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{
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long long old, new;
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do {
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old = atomic64_read(v);
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new = old + i;
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} while (atomic64_cmpxchg(v, old, new) != old);
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return new;
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}
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static inline long long atomic64_sub_return(long long i, atomic64_t *v)
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{
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long long old, new;
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do {
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old = atomic64_read(v);
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new = old - i;
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} while (atomic64_cmpxchg(v, old, new) != old);
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return new;
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}
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static inline void atomic64_set_mask(unsigned long long mask, atomic64_t *v)
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{
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long long old, new;
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do {
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old = atomic64_read(v);
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new = old | mask;
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} while (atomic64_cmpxchg(v, old, new) != old);
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}
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static inline void atomic64_clear_mask(unsigned long long mask, atomic64_t *v)
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{
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long long old, new;
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do {
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old = atomic64_read(v);
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new = old & mask;
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} while (atomic64_cmpxchg(v, old, new) != old);
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}
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#endif /* CONFIG_64BIT */
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static inline int atomic64_add_unless(atomic64_t *v, long long a, long long u)
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{
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long long c, old;
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c = atomic64_read(v);
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for (;;) {
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if (unlikely(c == u))
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break;
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old = atomic64_cmpxchg(v, c, c + a);
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if (likely(old == c))
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break;
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c = old;
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}
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return c != u;
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}
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static inline long long atomic64_dec_if_positive(atomic64_t *v)
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{
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long long c, old, dec;
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c = atomic64_read(v);
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for (;;) {
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dec = c - 1;
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if (unlikely(dec < 0))
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break;
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old = atomic64_cmpxchg((v), c, dec);
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if (likely(old == c))
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break;
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c = old;
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}
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return dec;
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}
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#define atomic64_add(_i, _v) atomic64_add_return(_i, _v)
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#define atomic64_add_negative(_i, _v) (atomic64_add_return(_i, _v) < 0)
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#define atomic64_inc(_v) atomic64_add_return(1, _v)
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#define atomic64_inc_return(_v) atomic64_add_return(1, _v)
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#define atomic64_inc_and_test(_v) (atomic64_add_return(1, _v) == 0)
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#define atomic64_sub(_i, _v) atomic64_sub_return(_i, _v)
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#define atomic64_sub_and_test(_i, _v) (atomic64_sub_return(_i, _v) == 0)
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#define atomic64_dec(_v) atomic64_sub_return(1, _v)
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#define atomic64_dec_return(_v) atomic64_sub_return(1, _v)
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#define atomic64_dec_and_test(_v) (atomic64_sub_return(1, _v) == 0)
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#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
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#define smp_mb__before_atomic_dec() smp_mb()
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#define smp_mb__after_atomic_dec() smp_mb()
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#define smp_mb__before_atomic_inc() smp_mb()
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#define smp_mb__after_atomic_inc() smp_mb()
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#endif /* __ARCH_S390_ATOMIC__ */
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