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Add the base DTS for Altera's SoCFPGA Stratix 10 platform. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> --- v4: Add a non-zero ranges property for /soc node v3: change #address-cells and #size-cells to <2> change the GIC address to 0xfffc1000 update the GIC virtual CPU reg length to 0x2000 v2: use interrupt-affinity for pmu node |
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