linux/arch/riscv/errata
Palmer Dabbelt 2e605741e9
Merge patch series "riscv: errata: thead: use riscv_nonstd_cache_ops for CMO"
Jisheng Zhang <jszhang@kernel.org> says:

Previously, we use alternative mechanism to dynamically patch
the CMO operations for THEAD C906/C910 during boot for performance
reason. But as pointed out by Arnd, "there is already a significant
cost in accessing the invalidated cache lines afterwards, which is
likely going to be much higher than the cost of an indirect branch".
And indeed, there's no performance difference with GMAC and EMMC per
my test on Sipeed Lichee Pi 4A board.

Use riscv_nonstd_cache_ops for THEAD C906/C910 CMO to simplify
the alternative code, and to acchieve Arnd's goal -- "I think
moving the THEAD ops at the same level as all nonstandard operations
makes sense, but I'd still leave CMO as an explicit fast path that
avoids the indirect branch. This seems like the right thing to do both
for readability and for platforms on which the indirect branch has a
noticeable overhead."

To make bisect easy, I use two patches here: patch1 does the conversion
which just mimics current CMO behavior via. riscv_nonstd_cache_ops, I
assume no functionalities changes. patch2 uses T-HEAD PA based CMO
instructions so that we don't need to covert PA to VA.

* b4-shazam-merge:
  riscv: errata: thead: use pa based instructions for CMO
  riscv: errata: thead: use riscv_nonstd_cache_ops for CMO

Link: https://lore.kernel.org/r/20231114143338.2406-1-jszhang@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2024-01-11 07:36:30 -08:00
..
andes riscv: errata: andes: Probe for IOCP only once in boot stage 2023-12-06 07:18:58 -08:00
sifive RISC-V: fix sifive and thead section mismatches in errata 2023-04-29 13:18:19 -07:00
thead riscv: errata: thead: use pa based instructions for CMO 2024-01-10 09:54:27 -08:00
Makefile riscv: errata: Add Andes alternative ports 2023-09-01 09:08:56 -07:00