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686a254177
Added support for host based bgscan. The h/w queues are blocked while bgscan is being performed and after coming to the connected channel, the queues are unblocked. Signed-off-by: Jahnavi Meher <jahnavi.meher@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
310 lines
9.1 KiB
C
310 lines
9.1 KiB
C
/**
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* Copyright (c) 2014 Redpine Signals Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef __RSI_MGMT_H__
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#define __RSI_MGMT_H__
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#include <linux/sort.h>
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#include "rsi_boot_params.h"
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#include "rsi_main.h"
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#define MAX_MGMT_PKT_SIZE 512
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#define RSI_NEEDED_HEADROOM 80
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#define RSI_RCV_BUFFER_LEN 2000
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#define RSI_11B_MODE 0
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#define RSI_11G_MODE BIT(7)
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#define RETRY_COUNT 8
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#define RETRY_LONG 4
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#define RETRY_SHORT 7
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#define WMM_SHORT_SLOT_TIME 9
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#define SIFS_DURATION 16
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#define KEY_TYPE_CLEAR 0
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#define RSI_PAIRWISE_KEY 1
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#define RSI_GROUP_KEY 2
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/* EPPROM_READ_ADDRESS */
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#define WLAN_MAC_EEPROM_ADDR 40
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#define WLAN_MAC_MAGIC_WORD_LEN 0x01
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#define WLAN_HOST_MODE_LEN 0x04
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#define WLAN_FW_VERSION_LEN 0x08
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#define MAGIC_WORD 0x5A
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/* Receive Frame Types */
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#define TA_CONFIRM_TYPE 0x01
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#define RX_DOT11_MGMT 0x02
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#define TX_STATUS_IND 0x04
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#define PROBEREQ_CONFIRM 2
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#define CARD_READY_IND 0x00
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#define RSI_DELETE_PEER 0x0
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#define RSI_ADD_PEER 0x1
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#define START_AMPDU_AGGR 0x1
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#define STOP_AMPDU_AGGR 0x0
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#define INTERNAL_MGMT_PKT 0x99
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#define PUT_BBP_RESET 0
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#define BBP_REG_WRITE 0
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#define RF_RESET_ENABLE BIT(3)
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#define RATE_INFO_ENABLE BIT(0)
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#define RSI_BROADCAST_PKT BIT(9)
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#define UPPER_20_ENABLE (0x2 << 12)
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#define LOWER_20_ENABLE (0x4 << 12)
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#define FULL40M_ENABLE 0x6
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#define RSI_LMAC_CLOCK_80MHZ 0x1
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#define RSI_ENABLE_40MHZ (0x1 << 3)
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#define ENABLE_SHORTGI_RATE BIT(9)
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#define RX_BA_INDICATION 1
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#define RSI_TBL_SZ 40
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#define MAX_RETRIES 8
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#define RSI_IFTYPE_STATION 0
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#define STD_RATE_MCS7 0x07
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#define STD_RATE_MCS6 0x06
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#define STD_RATE_MCS5 0x05
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#define STD_RATE_MCS4 0x04
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#define STD_RATE_MCS3 0x03
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#define STD_RATE_MCS2 0x02
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#define STD_RATE_MCS1 0x01
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#define STD_RATE_MCS0 0x00
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#define STD_RATE_54 0x6c
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#define STD_RATE_48 0x60
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#define STD_RATE_36 0x48
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#define STD_RATE_24 0x30
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#define STD_RATE_18 0x24
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#define STD_RATE_12 0x18
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#define STD_RATE_11 0x16
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#define STD_RATE_09 0x12
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#define STD_RATE_06 0x0C
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#define STD_RATE_5_5 0x0B
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#define STD_RATE_02 0x04
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#define STD_RATE_01 0x02
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#define RSI_RF_TYPE 1
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#define RSI_RATE_00 0x00
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#define RSI_RATE_1 0x0
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#define RSI_RATE_2 0x2
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#define RSI_RATE_5_5 0x4
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#define RSI_RATE_11 0x6
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#define RSI_RATE_6 0x8b
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#define RSI_RATE_9 0x8f
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#define RSI_RATE_12 0x8a
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#define RSI_RATE_18 0x8e
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#define RSI_RATE_24 0x89
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#define RSI_RATE_36 0x8d
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#define RSI_RATE_48 0x88
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#define RSI_RATE_54 0x8c
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#define RSI_RATE_MCS0 0x100
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#define RSI_RATE_MCS1 0x101
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#define RSI_RATE_MCS2 0x102
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#define RSI_RATE_MCS3 0x103
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#define RSI_RATE_MCS4 0x104
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#define RSI_RATE_MCS5 0x105
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#define RSI_RATE_MCS6 0x106
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#define RSI_RATE_MCS7 0x107
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#define RSI_RATE_MCS7_SG 0x307
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#define BW_20MHZ 0
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#define BW_40MHZ 1
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#define EP_2GHZ_20MHZ 0
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#define EP_2GHZ_40MHZ 1
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#define EP_5GHZ_20MHZ 2
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#define EP_5GHZ_40MHZ 3
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#define SIFS_TX_11N_VALUE 580
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#define SIFS_TX_11B_VALUE 346
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#define SHORT_SLOT_VALUE 360
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#define LONG_SLOT_VALUE 640
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#define OFDM_ACK_TOUT_VALUE 2720
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#define CCK_ACK_TOUT_VALUE 9440
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#define LONG_PREAMBLE 0x0000
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#define SHORT_PREAMBLE 0x0001
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#define RSI_SUPP_FILTERS (FIF_ALLMULTI | FIF_PROBE_REQ |\
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FIF_BCN_PRBRESP_PROMISC)
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enum opmode {
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STA_OPMODE = 1,
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AP_OPMODE = 2
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};
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extern struct ieee80211_rate rsi_rates[12];
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extern const u16 rsi_mcsrates[8];
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enum sta_notify_events {
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STA_CONNECTED = 0,
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STA_DISCONNECTED,
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STA_TX_ADDBA_DONE,
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STA_TX_DELBA,
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STA_RX_ADDBA_DONE,
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STA_RX_DELBA
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};
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/* Send Frames Types */
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enum cmd_frame_type {
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TX_DOT11_MGMT,
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RESET_MAC_REQ,
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RADIO_CAPABILITIES,
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BB_PROG_VALUES_REQUEST,
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RF_PROG_VALUES_REQUEST,
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WAKEUP_SLEEP_REQUEST,
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SCAN_REQUEST,
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TSF_UPDATE,
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PEER_NOTIFY,
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BLOCK_HW_QUEUE,
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SET_KEY_REQ,
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AUTO_RATE_IND,
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BOOTUP_PARAMS_REQUEST,
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VAP_CAPABILITIES,
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EEPROM_READ_TYPE ,
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EEPROM_WRITE,
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GPIO_PIN_CONFIG ,
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SET_RX_FILTER,
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AMPDU_IND,
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STATS_REQUEST_FRAME,
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BB_BUF_PROG_VALUES_REQ,
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BBP_PROG_IN_TA,
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BG_SCAN_PARAMS,
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BG_SCAN_PROBE_REQ,
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CW_MODE_REQ,
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PER_CMD_PKT
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};
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struct rsi_mac_frame {
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__le16 desc_word[8];
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} __packed;
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struct rsi_boot_params {
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__le16 desc_word[8];
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struct bootup_params bootup_params;
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} __packed;
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struct rsi_peer_notify {
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__le16 desc_word[8];
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u8 mac_addr[6];
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__le16 command;
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__le16 mpdu_density;
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__le16 reserved;
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__le32 sta_flags;
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} __packed;
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struct rsi_vap_caps {
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__le16 desc_word[8];
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u8 mac_addr[6];
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__le16 keep_alive_period;
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u8 bssid[6];
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__le16 reserved;
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__le32 flags;
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__le16 frag_threshold;
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__le16 rts_threshold;
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__le32 default_mgmt_rate;
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__le32 default_ctrl_rate;
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__le32 default_data_rate;
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__le16 beacon_interval;
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__le16 dtim_period;
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} __packed;
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struct rsi_set_key {
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__le16 desc_word[8];
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u8 key[4][32];
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u8 tx_mic_key[8];
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u8 rx_mic_key[8];
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} __packed;
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struct rsi_auto_rate {
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__le16 desc_word[8];
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__le16 failure_limit;
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__le16 initial_boundary;
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__le16 max_threshold_limt;
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__le16 num_supported_rates;
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__le16 aarf_rssi;
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__le16 moderate_rate_inx;
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__le16 collision_tolerance;
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__le16 supported_rates[40];
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} __packed;
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struct qos_params {
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__le16 cont_win_min_q;
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__le16 cont_win_max_q;
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__le16 aifsn_val_q;
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__le16 txop_q;
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} __packed;
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struct rsi_radio_caps {
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__le16 desc_word[8];
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struct qos_params qos_params[MAX_HW_QUEUES];
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u8 num_11n_rates;
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u8 num_11ac_rates;
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__le16 gcpd_per_rate[20];
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__le16 sifs_tx_11n;
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__le16 sifs_tx_11b;
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__le16 slot_rx_11n;
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__le16 ofdm_ack_tout;
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__le16 cck_ack_tout;
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__le16 preamble_type;
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} __packed;
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static inline u32 rsi_get_queueno(u8 *addr, u16 offset)
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{
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return (le16_to_cpu(*(__le16 *)&addr[offset]) & 0x7000) >> 12;
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}
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static inline u32 rsi_get_length(u8 *addr, u16 offset)
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{
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return (le16_to_cpu(*(__le16 *)&addr[offset])) & 0x0fff;
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}
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static inline u8 rsi_get_extended_desc(u8 *addr, u16 offset)
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{
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return le16_to_cpu(*((__le16 *)&addr[offset + 4])) & 0x00ff;
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}
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static inline u8 rsi_get_rssi(u8 *addr)
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{
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return *(u8 *)(addr + FRAME_DESC_SZ);
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}
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static inline u8 rsi_get_channel(u8 *addr)
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{
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return *(char *)(addr + 15);
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}
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int rsi_mgmt_pkt_recv(struct rsi_common *common, u8 *msg);
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int rsi_set_vap_capabilities(struct rsi_common *common, enum opmode mode);
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int rsi_send_aggregation_params_frame(struct rsi_common *common, u16 tid,
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u16 ssn, u8 buf_size, u8 event);
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int rsi_hal_load_key(struct rsi_common *common, u8 *data, u16 key_len,
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u8 key_type, u8 key_id, u32 cipher);
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int rsi_set_channel(struct rsi_common *common, u16 chno);
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int rsi_send_block_unblock_frame(struct rsi_common *common, bool event);
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void rsi_inform_bss_status(struct rsi_common *common, u8 status,
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const u8 *bssid, u8 qos_enable, u16 aid);
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void rsi_indicate_pkt_to_os(struct rsi_common *common, struct sk_buff *skb);
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int rsi_mac80211_attach(struct rsi_common *common);
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void rsi_indicate_tx_status(struct rsi_hw *common, struct sk_buff *skb,
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int status);
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bool rsi_is_cipher_wep(struct rsi_common *common);
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void rsi_core_qos_processor(struct rsi_common *common);
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void rsi_core_xmit(struct rsi_common *common, struct sk_buff *skb);
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int rsi_send_mgmt_pkt(struct rsi_common *common, struct sk_buff *skb);
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int rsi_send_data_pkt(struct rsi_common *common, struct sk_buff *skb);
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int rsi_band_check(struct rsi_common *common);
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#endif
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