Mark Rutland 75b3c43eab arm64: errata: Expand speculative SSBS workaround ... A number of Arm Ltd CPUs suffer from errata whereby an MSR to the SSBS special-purpose register does not affect subsequent speculative instructions, permitting speculative store bypassing for a window of time. We worked around this for Cortex-X4 and Neoverse-V3, in commit: 7187bb7d0b ("arm64: errata: Add workaround for Arm errata 3194386 and 3312417") ... as per their Software Developer Errata Notice (SDEN) documents: * Cortex-X4 SDEN v8.0, erratum 3194386: https://developer.arm.com/documentation/SDEN-2432808/0800/ * Neoverse-V3 SDEN v6.0, erratum 3312417: https://developer.arm.com/documentation/SDEN-2891958/0600/ Since then, similar errata have been published for a number of other Arm Ltd CPUs, for which the mitigation is the same. This is described in their respective SDEN documents: * Cortex-A710 SDEN v19.0, errataum 3324338 https://developer.arm.com/documentation/SDEN-1775101/1900/?lang=en * Cortex-A720 SDEN v11.0, erratum 3456091 https://developer.arm.com/documentation/SDEN-2439421/1100/?lang=en * Cortex-X2 SDEN v19.0, erratum 3324338 https://developer.arm.com/documentation/SDEN-1775100/1900/?lang=en * Cortex-X3 SDEN v14.0, erratum 3324335 https://developer.arm.com/documentation/SDEN-2055130/1400/?lang=en * Cortex-X925 SDEN v8.0, erratum 3324334 https://developer.arm.com/documentation/109108/800/?lang=en * Neoverse-N2 SDEN v17.0, erratum 3324339 https://developer.arm.com/documentation/SDEN-1982442/1700/?lang=en * Neoverse-V2 SDEN v9.0, erratum 3324336 https://developer.arm.com/documentation/SDEN-2332927/900/?lang=en Note that due to shared design lineage, some CPUs share the same erratum number. Add these to the existing mitigation under CONFIG_ARM64_ERRATUM_3194386. As listing all of the erratum IDs in the runtime description would be unwieldy, this is reduced to: "SSBS not fully self-synchronizing" ... matching the description of the errata in all of the SDENs. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: James Morse <james.morse@arm.com> Cc: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/r/20240603111812.1514101-6-mark.rutland@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>		2024-06-12 16:07:22 +01:00
..
arc	docs: kernel_feat.py: fix potential command injection	2024-01-11 09:21:01 -07:00
arm	docs: kernel_feat.py: fix potential command injection	2024-01-11 09:21:01 -07:00
arm64	arm64: errata: Expand speculative SSBS workaround	2024-06-12 16:07:22 +01:00
loongarch	A handful of late-arriving documentation fixes.	2024-01-17 11:49:11 -08:00
m68k	Docs: typos/spelling	2024-05-02 10:02:29 -06:00
mips	docs: kernel_feat.py: fix potential command injection	2024-01-11 09:21:01 -07:00
nios2	docs: kernel_feat.py: fix potential command injection	2024-01-11 09:21:01 -07:00
openrisc	docs: kernel_feat.py: fix potential command injection	2024-01-11 09:21:01 -07:00
parisc	docs: kernel_feat.py: fix potential command injection	2024-01-11 09:21:01 -07:00
powerpc	Documentation: Document PowerPC kernel dynamic DEXCR interface	2024-05-06 22:05:17 +10:00
riscv	Documentation: RISC-V: uabi: Only scalar misaligned loads are supported	2024-05-30 09:42:53 -07:00
s390	docs: Update s390 vfio-ap doc for ap_config sysfs attribute	2024-04-22 12:49:18 +02:00
sh	docs: kernel_feat.py: fix potential command injection	2024-01-11 09:21:01 -07:00
sparc	Docs: typos/spelling	2024-05-02 10:02:29 -06:00
x86	- Add a tracepoint to read out LLC occupancy of resource monitor IDs with the	2024-05-14 09:04:37 -07:00
xtensa	docs: kernel_feat.py: fix potential command injection	2024-01-11 09:21:01 -07:00
index.rst	The number of commits for documentation is not huge this time around, but	2023-11-01 17:11:41 -10:00