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b685004f8d
Adds support for the generic GPIO lib to the EP93xx family. The gpio handling code has been moved from core.c to a new file called gpio.c. The GPIO based IRQ code has not been changed. Signed-off-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
159 lines
3.9 KiB
C
159 lines
3.9 KiB
C
/*
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* linux/arch/arm/mach-ep93xx/gpio.c
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*
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* Generic EP93xx GPIO handling
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*
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* Copyright (c) 2008 Ryan Mallon <ryan@bluewatersys.com>
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*
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* Based on code originally from:
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* linux/arch/arm/mach-ep93xx/core.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/seq_file.h>
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#include <asm/arch/ep93xx-regs.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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struct ep93xx_gpio_chip {
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struct gpio_chip chip;
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unsigned int data_reg;
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unsigned int data_dir_reg;
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};
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#define to_ep93xx_gpio_chip(c) container_of(c, struct ep93xx_gpio_chip, chip)
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/* From core.c */
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extern void ep93xx_gpio_int_mask(unsigned line);
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extern void ep93xx_gpio_update_int_params(unsigned port);
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static int ep93xx_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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{
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struct ep93xx_gpio_chip *ep93xx_chip = to_ep93xx_gpio_chip(chip);
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unsigned long flags;
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u8 v;
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local_irq_save(flags);
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v = __raw_readb(ep93xx_chip->data_dir_reg);
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v &= ~(1 << offset);
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__raw_writeb(v, ep93xx_chip->data_dir_reg);
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local_irq_restore(flags);
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return 0;
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}
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static int ep93xx_gpio_direction_output(struct gpio_chip *chip,
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unsigned offset, int val)
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{
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struct ep93xx_gpio_chip *ep93xx_chip = to_ep93xx_gpio_chip(chip);
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unsigned long flags;
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int line;
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u8 v;
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local_irq_save(flags);
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/* Set the value */
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v = __raw_readb(ep93xx_chip->data_reg);
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if (val)
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v |= (1 << offset);
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else
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v &= ~(1 << offset);
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__raw_writeb(v, ep93xx_chip->data_reg);
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/* Drive as an output */
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line = chip->base + offset;
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if (line <= EP93XX_GPIO_LINE_MAX_IRQ) {
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/* Ports A/B/F */
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ep93xx_gpio_int_mask(line);
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ep93xx_gpio_update_int_params(line >> 3);
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}
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v = __raw_readb(ep93xx_chip->data_dir_reg);
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v |= (1 << offset);
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__raw_writeb(v, ep93xx_chip->data_dir_reg);
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local_irq_restore(flags);
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return 0;
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}
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static int ep93xx_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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struct ep93xx_gpio_chip *ep93xx_chip = to_ep93xx_gpio_chip(chip);
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return !!(__raw_readb(ep93xx_chip->data_reg) & (1 << offset));
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}
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static void ep93xx_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
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{
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struct ep93xx_gpio_chip *ep93xx_chip = to_ep93xx_gpio_chip(chip);
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unsigned long flags;
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u8 v;
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local_irq_save(flags);
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v = __raw_readb(ep93xx_chip->data_reg);
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if (val)
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v |= (1 << offset);
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else
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v &= ~(1 << offset);
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__raw_writeb(v, ep93xx_chip->data_reg);
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local_irq_restore(flags);
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}
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static void ep93xx_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
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{
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struct ep93xx_gpio_chip *ep93xx_chip = to_ep93xx_gpio_chip(chip);
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u8 data_reg, data_dir_reg;
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int i;
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data_reg = __raw_readb(ep93xx_chip->data_reg);
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data_dir_reg = __raw_readb(ep93xx_chip->data_dir_reg);
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for (i = 0; i < chip->ngpio; i++)
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seq_printf(s, "GPIO %s%d: %s %s\n", chip->label, i,
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(data_reg & (1 << i)) ? "set" : "clear",
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(data_dir_reg & (1 << i)) ? "out" : "in");
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}
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#define EP93XX_GPIO_BANK(name, dr, ddr, base_gpio) \
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{ \
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.chip = { \
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.label = name, \
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.direction_input = ep93xx_gpio_direction_input, \
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.direction_output = ep93xx_gpio_direction_output, \
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.get = ep93xx_gpio_get, \
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.set = ep93xx_gpio_set, \
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.dbg_show = ep93xx_gpio_dbg_show, \
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.base = base_gpio, \
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.ngpio = 8, \
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}, \
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.data_reg = EP93XX_GPIO_REG(dr), \
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.data_dir_reg = EP93XX_GPIO_REG(ddr), \
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}
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static struct ep93xx_gpio_chip ep93xx_gpio_banks[] = {
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EP93XX_GPIO_BANK("A", 0x00, 0x10, 0),
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EP93XX_GPIO_BANK("B", 0x04, 0x14, 8),
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EP93XX_GPIO_BANK("C", 0x30, 0x34, 40),
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EP93XX_GPIO_BANK("D", 0x0c, 0x1c, 24),
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EP93XX_GPIO_BANK("E", 0x20, 0x24, 32),
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EP93XX_GPIO_BANK("F", 0x08, 0x18, 16),
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EP93XX_GPIO_BANK("G", 0x38, 0x3c, 48),
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EP93XX_GPIO_BANK("H", 0x40, 0x44, 56),
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};
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void __init ep93xx_gpio_init(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(ep93xx_gpio_banks); i++)
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gpiochip_add(&ep93xx_gpio_banks[i].chip);
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}
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