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WDTCTRL bit 3 sets the mode choice for the clock input of IT8784/IT8786. Some motherboards require this bit to be set to 1 (= PCICLK mode), otherwise the watchdog functionality gets broken. The BIOS of those motherboards sets WDTCTRL bit 3 already to 1. Instead of setting all bits of WDTCTRL to 0 by writing 0x00 to it, keep bit 3 of it unchanged for IT8784/IT8786 chips. In this way, bit 3 keeps the status as set by the BIOS of the motherboard. Watchdog tests have been successful with this patch with the following systems: IT8784: Thomas-Krenn LES plus v2 (YANLING YL-KBRL2 V2) IT8786: Thomas-Krenn LES plus v3 (YANLING YL-CLU L2) IT8786: Thomas-Krenn LES network 6L v2 (YANLING YL-CLU6L) Link: https://lore.kernel.org/all/140b264d-341f-465b-8715-dacfe84b3f71@roeck-us.net/ Signed-off-by: Werner Fischer <devlists@wefi.net> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20231213094525.11849-4-devlists@wefi.net Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
370 lines
7.5 KiB
C
370 lines
7.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Watchdog Timer Driver
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* for ITE IT87xx Environment Control - Low Pin Count Input / Output
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*
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* (c) Copyright 2007 Oliver Schuster <olivers137@aol.com>
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*
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* Based on softdog.c by Alan Cox,
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* 83977f_wdt.c by Jose Goncalves,
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* it87.c by Chris Gauthron, Jean Delvare
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*
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* Data-sheets: Publicly available at the ITE website
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* http://www.ite.com.tw/
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*
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* Support of the watchdog timers, which are available on
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* IT8607, IT8613, IT8620, IT8622, IT8625, IT8628, IT8655, IT8659,
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* IT8665, IT8686, IT8702, IT8712, IT8716, IT8718, IT8720, IT8721,
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* IT8726, IT8728, IT8772, IT8783, IT8784 and IT8786.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/types.h>
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#include <linux/watchdog.h>
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#define WATCHDOG_NAME "IT87 WDT"
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/* Defaults for Module Parameter */
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#define DEFAULT_TIMEOUT 60
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#define DEFAULT_TESTMODE 0
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#define DEFAULT_NOWAYOUT WATCHDOG_NOWAYOUT
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/* IO Ports */
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#define REG 0x2e
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#define VAL 0x2f
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/* Logical device Numbers LDN */
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#define GPIO 0x07
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/* Configuration Registers and Functions */
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#define LDNREG 0x07
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#define CHIPID 0x20
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#define CHIPREV 0x22
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/* Chip Id numbers */
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#define NO_DEV_ID 0xffff
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#define IT8607_ID 0x8607
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#define IT8613_ID 0x8613
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#define IT8620_ID 0x8620
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#define IT8622_ID 0x8622
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#define IT8625_ID 0x8625
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#define IT8628_ID 0x8628
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#define IT8655_ID 0x8655
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#define IT8659_ID 0x8659
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#define IT8665_ID 0x8665
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#define IT8686_ID 0x8686
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#define IT8702_ID 0x8702
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#define IT8705_ID 0x8705
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#define IT8712_ID 0x8712
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#define IT8716_ID 0x8716
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#define IT8718_ID 0x8718
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#define IT8720_ID 0x8720
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#define IT8721_ID 0x8721
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#define IT8726_ID 0x8726 /* the data sheet suggest wrongly 0x8716 */
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#define IT8728_ID 0x8728
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#define IT8772_ID 0x8772
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#define IT8783_ID 0x8783
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#define IT8784_ID 0x8784
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#define IT8786_ID 0x8786
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/* GPIO Configuration Registers LDN=0x07 */
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#define WDTCTRL 0x71
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#define WDTCFG 0x72
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#define WDTVALLSB 0x73
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#define WDTVALMSB 0x74
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/* GPIO Bits WDTCFG */
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#define WDT_TOV1 0x80
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#define WDT_KRST 0x40
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#define WDT_TOVE 0x20
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#define WDT_PWROK 0x10 /* not in it8721 */
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#define WDT_INT_MASK 0x0f
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static unsigned int max_units, chip_type;
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static unsigned int timeout = DEFAULT_TIMEOUT;
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static int testmode = DEFAULT_TESTMODE;
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static bool nowayout = DEFAULT_NOWAYOUT;
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module_param(timeout, int, 0);
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MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds, default="
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__MODULE_STRING(DEFAULT_TIMEOUT));
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module_param(testmode, int, 0);
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MODULE_PARM_DESC(testmode, "Watchdog test mode (1 = no reboot), default="
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__MODULE_STRING(DEFAULT_TESTMODE));
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started, default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT));
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/* Superio Chip */
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static inline int superio_enter(void)
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{
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/*
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* Try to reserve REG and REG + 1 for exclusive access.
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*/
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if (!request_muxed_region(REG, 2, WATCHDOG_NAME))
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return -EBUSY;
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outb(0x87, REG);
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outb(0x01, REG);
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outb(0x55, REG);
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outb(0x55, REG);
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return 0;
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}
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static inline void superio_exit(void)
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{
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outb(0x02, REG);
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outb(0x02, VAL);
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release_region(REG, 2);
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}
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static inline void superio_select(int ldn)
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{
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outb(LDNREG, REG);
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outb(ldn, VAL);
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}
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static inline int superio_inb(int reg)
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{
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outb(reg, REG);
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return inb(VAL);
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}
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static inline void superio_outb(int val, int reg)
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{
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outb(reg, REG);
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outb(val, VAL);
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}
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static inline int superio_inw(int reg)
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{
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int val;
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outb(reg++, REG);
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val = inb(VAL) << 8;
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outb(reg, REG);
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val |= inb(VAL);
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return val;
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}
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/* Internal function, should be called after superio_select(GPIO) */
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static void _wdt_update_timeout(unsigned int t)
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{
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unsigned char cfg = WDT_KRST;
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if (testmode)
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cfg = 0;
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if (t <= max_units)
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cfg |= WDT_TOV1;
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else
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t /= 60;
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if (chip_type != IT8721_ID)
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cfg |= WDT_PWROK;
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superio_outb(cfg, WDTCFG);
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superio_outb(t, WDTVALLSB);
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if (max_units > 255)
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superio_outb(t >> 8, WDTVALMSB);
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}
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static int wdt_update_timeout(unsigned int t)
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{
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int ret;
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ret = superio_enter();
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if (ret)
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return ret;
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superio_select(GPIO);
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_wdt_update_timeout(t);
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superio_exit();
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return 0;
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}
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static int wdt_round_time(int t)
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{
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t += 59;
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t -= t % 60;
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return t;
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}
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/* watchdog timer handling */
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static int wdt_start(struct watchdog_device *wdd)
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{
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return wdt_update_timeout(wdd->timeout);
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}
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static int wdt_stop(struct watchdog_device *wdd)
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{
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return wdt_update_timeout(0);
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}
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/**
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* wdt_set_timeout - set a new timeout value with watchdog ioctl
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* @t: timeout value in seconds
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*
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* The hardware device has a 8 or 16 bit watchdog timer (depends on
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* chip version) that can be configured to count seconds or minutes.
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*
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* Used within WDIOC_SETTIMEOUT watchdog device ioctl.
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*/
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static int wdt_set_timeout(struct watchdog_device *wdd, unsigned int t)
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{
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int ret = 0;
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if (t > max_units)
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t = wdt_round_time(t);
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wdd->timeout = t;
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if (watchdog_hw_running(wdd))
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ret = wdt_update_timeout(t);
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return ret;
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}
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static const struct watchdog_info ident = {
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.options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
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.firmware_version = 1,
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.identity = WATCHDOG_NAME,
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};
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static const struct watchdog_ops wdt_ops = {
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.owner = THIS_MODULE,
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.start = wdt_start,
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.stop = wdt_stop,
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.set_timeout = wdt_set_timeout,
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};
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static struct watchdog_device wdt_dev = {
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.info = &ident,
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.ops = &wdt_ops,
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.min_timeout = 1,
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};
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static int __init it87_wdt_init(void)
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{
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u8 chip_rev;
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u8 ctrl;
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int rc;
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rc = superio_enter();
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if (rc)
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return rc;
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chip_type = superio_inw(CHIPID);
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chip_rev = superio_inb(CHIPREV) & 0x0f;
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superio_exit();
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switch (chip_type) {
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case IT8702_ID:
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max_units = 255;
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break;
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case IT8712_ID:
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max_units = (chip_rev < 8) ? 255 : 65535;
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break;
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case IT8607_ID:
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case IT8613_ID:
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case IT8620_ID:
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case IT8622_ID:
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case IT8625_ID:
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case IT8628_ID:
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case IT8655_ID:
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case IT8659_ID:
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case IT8665_ID:
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case IT8686_ID:
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case IT8716_ID:
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case IT8718_ID:
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case IT8720_ID:
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case IT8721_ID:
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case IT8726_ID:
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case IT8728_ID:
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case IT8772_ID:
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case IT8783_ID:
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case IT8784_ID:
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case IT8786_ID:
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max_units = 65535;
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break;
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case IT8705_ID:
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pr_err("Unsupported Chip found, Chip %04x Revision %02x\n",
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chip_type, chip_rev);
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return -ENODEV;
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case NO_DEV_ID:
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pr_err("no device\n");
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return -ENODEV;
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default:
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pr_err("Unknown Chip found, Chip %04x Revision %04x\n",
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chip_type, chip_rev);
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return -ENODEV;
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}
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rc = superio_enter();
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if (rc)
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return rc;
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superio_select(GPIO);
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superio_outb(WDT_TOV1, WDTCFG);
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switch (chip_type) {
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case IT8784_ID:
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case IT8786_ID:
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ctrl = superio_inb(WDTCTRL);
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ctrl &= 0x08;
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superio_outb(ctrl, WDTCTRL);
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break;
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default:
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superio_outb(0x00, WDTCTRL);
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}
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superio_exit();
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if (timeout < 1 || timeout > max_units * 60) {
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timeout = DEFAULT_TIMEOUT;
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pr_warn("Timeout value out of range, use default %d sec\n",
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DEFAULT_TIMEOUT);
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}
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if (timeout > max_units)
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timeout = wdt_round_time(timeout);
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wdt_dev.timeout = timeout;
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wdt_dev.max_timeout = max_units * 60;
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watchdog_stop_on_reboot(&wdt_dev);
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rc = watchdog_register_device(&wdt_dev);
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if (rc) {
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pr_err("Cannot register watchdog device (err=%d)\n", rc);
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return rc;
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}
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pr_info("Chip IT%04x revision %d initialized. timeout=%d sec (nowayout=%d testmode=%d)\n",
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chip_type, chip_rev, timeout, nowayout, testmode);
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return 0;
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}
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static void __exit it87_wdt_exit(void)
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{
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watchdog_unregister_device(&wdt_dev);
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}
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module_init(it87_wdt_init);
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module_exit(it87_wdt_exit);
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MODULE_AUTHOR("Oliver Schuster");
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MODULE_DESCRIPTION("Hardware Watchdog Device Driver for IT87xx EC-LPC I/O");
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MODULE_LICENSE("GPL");
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