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5f97f7f940
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000 CPU and the AT32STK1000 development board. AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications, with particular emphasis on low power consumption and high code density. The AVR32 architecture is not binary compatible with earlier 8-bit AVR architectures. The AVR32 architecture, including the instruction set, is described by the AVR32 Architecture Manual, available from http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It features a 7-stage pipeline, 16KB instruction and data caches and a full Memory Management Unit. It also comes with a large set of integrated peripherals, many of which are shared with the AT91 ARM-based controllers from Atmel. Full data sheet is available from http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf while the CPU core implementation including caches and MMU is documented by the AVR32 AP Technical Reference, available from http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf Information about the AT32STK1000 development board can be found at http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918 including a BSP CD image with an earlier version of this patch, development tools (binaries and source/patches) and a root filesystem image suitable for booting from SD card. Alternatively, there's a preliminary "getting started" guide available at http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links to the sources and patches you will need in order to set up a cross-compiling environment for avr32-linux. This patch, as well as the other patches included with the BSP and the toolchain patches, is actively supported by Atmel Corporation. [dmccr@us.ibm.com: Fix more pxx_page macro locations] [bunk@stusta.de: fix `make defconfig'] Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Dave McCracken <dmccr@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
63 lines
1.1 KiB
ArmAsm
63 lines
1.1 KiB
ArmAsm
/*
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* Copyright (C) 2004-2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/*
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* void *memcpy(void *to, const void *from, unsigned long n)
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*
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* This implementation does word-aligned loads in the main loop,
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* possibly sacrificing alignment of stores.
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*
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* Hopefully, in most cases, both "to" and "from" will be
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* word-aligned to begin with.
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*/
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.text
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.global memcpy
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.type memcpy, @function
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memcpy:
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mov r9, r11
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andl r9, 3, COH
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brne 1f
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/* At this point, "from" is word-aligned */
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2: sub r10, 4
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mov r9, r12
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brlt 4f
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3: ld.w r8, r11++
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sub r10, 4
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st.w r12++, r8
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brge 3b
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4: neg r10
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reteq r9
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/* Handle unaligned count */
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lsl r10, 2
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add pc, pc, r10
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ld.ub r8, r11++
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st.b r12++, r8
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ld.ub r8, r11++
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st.b r12++, r8
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ld.ub r8, r11++
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st.b r12++, r8
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retal r9
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/* Handle unaligned "from" pointer */
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1: sub r10, 4
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brlt 4b
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add r10, r9
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lsl r9, 2
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add pc, pc, r9
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ld.ub r8, r11++
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st.b r12++, r8
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ld.ub r8, r11++
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st.b r12++, r8
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ld.ub r8, r11++
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st.b r12++, r8
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rjmp 2b
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