linux/arch/arm/mach-mv78xx0
Lennert Buytenhek 712424fd95 [ARM] mv78xx0: force eth2/eth3 to PHYless mode on pre-A0 silicon
On pre-A0 revisions of the mv78xx0 SoC, the third and fourth
ethernet interface are not brought out to pins, but are internally
cross-connected, so if we run on pre-A0 silicon, we'll force eth2
and eth3 to PHYless mode.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2009-02-19 22:41:37 -05:00
..
include/mach [ARM] mv78xx0: distinguish between different chip steppings 2009-02-19 22:36:42 -05:00
addr-map.c [ARM] Convert asm/io.h to linux/io.h 2008-09-06 12:10:45 +01:00
common.c [ARM] mv78xx0: force eth2/eth3 to PHYless mode on pre-A0 silicon 2009-02-19 22:41:37 -05:00
common.h [ARM] mv78xx0: distinguish between different chip steppings 2009-02-19 22:36:42 -05:00
db78x00-bp-setup.c [ARM] mv78xx0: force link speed/duplex on eth2/eth3 2008-10-19 14:29:05 -04:00
irq.c [ARM] 5401/1: Orion: fix edge triggered GPIO interrupt support 2009-02-17 22:37:09 +00:00
Kconfig [ARM] add Marvell 78xx0 ARM SoC support 2008-06-22 22:45:10 +02:00
Makefile [ARM] add Marvell 78xx0 ARM SoC support 2008-06-22 22:45:10 +02:00
Makefile.boot [ARM] add Marvell 78xx0 ARM SoC support 2008-06-22 22:45:10 +02:00
pcie.c [ARM] mv78xx0: distinguish between different chip steppings 2009-02-19 22:36:42 -05:00