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46f107d0cb
It is not mandatory that platform data is passed along the ac97
codec. Actually there are configuration without a battery connected to
the ADC of the codec.
This is for example the case for the PXA zylonite platform, so fix the
NULL dereferencing by adding a test.
Fixes: a5c6951c49 ("mfd: wm97xx-core: core support for wm97xx Codec")
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
367 lines
9.2 KiB
C
367 lines
9.2 KiB
C
/*
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* Wolfson WM97xx -- Core device
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*
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* Copyright (C) 2017 Robert Jarzmik
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* Features:
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* - an AC97 audio codec
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* - a touchscreen driver
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* - a GPIO block
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*/
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#include <linux/device.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/wm97xx.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/wm97xx.h>
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#include <sound/ac97/codec.h>
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#include <sound/ac97/compat.h>
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#define WM9705_VENDOR_ID 0x574d4c05
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#define WM9712_VENDOR_ID 0x574d4c12
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#define WM9713_VENDOR_ID 0x574d4c13
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#define WM97xx_VENDOR_ID_MASK 0xffffffff
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struct wm97xx_priv {
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struct regmap *regmap;
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struct snd_ac97 *ac97;
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struct device *dev;
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struct wm97xx_platform_data codec_pdata;
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};
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static bool wm97xx_readable_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case AC97_RESET ... AC97_PCM_SURR_DAC_RATE:
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case AC97_PCM_LR_ADC_RATE:
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case AC97_CENTER_LFE_MASTER:
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case AC97_SPDIF ... AC97_LINE1_LEVEL:
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case AC97_GPIO_CFG ... 0x5c:
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case AC97_CODEC_CLASS_REV ... AC97_PCI_SID:
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case 0x74 ... AC97_VENDOR_ID2:
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return true;
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default:
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return false;
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}
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}
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static bool wm97xx_writeable_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case AC97_VENDOR_ID1:
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case AC97_VENDOR_ID2:
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return false;
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default:
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return wm97xx_readable_reg(dev, reg);
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}
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}
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static const struct reg_default wm9705_reg_defaults[] = {
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{ 0x02, 0x8000 },
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{ 0x04, 0x8000 },
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{ 0x06, 0x8000 },
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{ 0x0a, 0x8000 },
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{ 0x0c, 0x8008 },
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{ 0x0e, 0x8008 },
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{ 0x10, 0x8808 },
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{ 0x12, 0x8808 },
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{ 0x14, 0x8808 },
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{ 0x16, 0x8808 },
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{ 0x18, 0x8808 },
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{ 0x1a, 0x0000 },
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{ 0x1c, 0x8000 },
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{ 0x20, 0x0000 },
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{ 0x22, 0x0000 },
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{ 0x26, 0x000f },
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{ 0x28, 0x0605 },
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{ 0x2a, 0x0000 },
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{ 0x2c, 0xbb80 },
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{ 0x32, 0xbb80 },
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{ 0x34, 0x2000 },
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{ 0x5a, 0x0000 },
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{ 0x5c, 0x0000 },
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{ 0x72, 0x0808 },
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{ 0x74, 0x0000 },
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{ 0x76, 0x0006 },
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{ 0x78, 0x0000 },
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{ 0x7a, 0x0000 },
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};
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static const struct regmap_config wm9705_regmap_config = {
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.reg_bits = 16,
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.reg_stride = 2,
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.val_bits = 16,
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.max_register = 0x7e,
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.cache_type = REGCACHE_RBTREE,
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.reg_defaults = wm9705_reg_defaults,
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.num_reg_defaults = ARRAY_SIZE(wm9705_reg_defaults),
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.volatile_reg = regmap_ac97_default_volatile,
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.readable_reg = wm97xx_readable_reg,
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.writeable_reg = wm97xx_writeable_reg,
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};
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static struct mfd_cell wm9705_cells[] = {
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{ .name = "wm9705-codec", },
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{ .name = "wm97xx-ts", },
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};
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static bool wm9712_volatile_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case AC97_REC_GAIN:
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return true;
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default:
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return regmap_ac97_default_volatile(dev, reg);
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}
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}
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static const struct reg_default wm9712_reg_defaults[] = {
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{ 0x02, 0x8000 },
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{ 0x04, 0x8000 },
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{ 0x06, 0x8000 },
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{ 0x08, 0x0f0f },
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{ 0x0a, 0xaaa0 },
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{ 0x0c, 0xc008 },
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{ 0x0e, 0x6808 },
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{ 0x10, 0xe808 },
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{ 0x12, 0xaaa0 },
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{ 0x14, 0xad00 },
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{ 0x16, 0x8000 },
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{ 0x18, 0xe808 },
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{ 0x1a, 0x3000 },
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{ 0x1c, 0x8000 },
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{ 0x20, 0x0000 },
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{ 0x22, 0x0000 },
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{ 0x26, 0x000f },
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{ 0x28, 0x0605 },
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{ 0x2a, 0x0410 },
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{ 0x2c, 0xbb80 },
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{ 0x2e, 0xbb80 },
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{ 0x32, 0xbb80 },
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{ 0x34, 0x2000 },
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{ 0x4c, 0xf83e },
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{ 0x4e, 0xffff },
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{ 0x50, 0x0000 },
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{ 0x52, 0x0000 },
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{ 0x56, 0xf83e },
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{ 0x58, 0x0008 },
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{ 0x5c, 0x0000 },
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{ 0x60, 0xb032 },
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{ 0x62, 0x3e00 },
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{ 0x64, 0x0000 },
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{ 0x76, 0x0006 },
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{ 0x78, 0x0001 },
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{ 0x7a, 0x0000 },
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};
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static const struct regmap_config wm9712_regmap_config = {
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.reg_bits = 16,
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.reg_stride = 2,
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.val_bits = 16,
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.max_register = 0x7e,
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.cache_type = REGCACHE_RBTREE,
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.reg_defaults = wm9712_reg_defaults,
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.num_reg_defaults = ARRAY_SIZE(wm9712_reg_defaults),
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.volatile_reg = wm9712_volatile_reg,
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.readable_reg = wm97xx_readable_reg,
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.writeable_reg = wm97xx_writeable_reg,
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};
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static struct mfd_cell wm9712_cells[] = {
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{ .name = "wm9712-codec", },
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{ .name = "wm97xx-ts", },
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};
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static const struct reg_default wm9713_reg_defaults[] = {
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{ 0x02, 0x8080 }, /* Speaker Output Volume */
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{ 0x04, 0x8080 }, /* Headphone Output Volume */
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{ 0x06, 0x8080 }, /* Out3/OUT4 Volume */
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{ 0x08, 0xc880 }, /* Mono Volume */
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{ 0x0a, 0xe808 }, /* LINEIN Volume */
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{ 0x0c, 0xe808 }, /* DAC PGA Volume */
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{ 0x0e, 0x0808 }, /* MIC PGA Volume */
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{ 0x10, 0x00da }, /* MIC Routing Control */
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{ 0x12, 0x8000 }, /* Record PGA Volume */
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{ 0x14, 0xd600 }, /* Record Routing */
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{ 0x16, 0xaaa0 }, /* PCBEEP Volume */
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{ 0x18, 0xaaa0 }, /* VxDAC Volume */
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{ 0x1a, 0xaaa0 }, /* AUXDAC Volume */
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{ 0x1c, 0x0000 }, /* Output PGA Mux */
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{ 0x1e, 0x0000 }, /* DAC 3D control */
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{ 0x20, 0x0f0f }, /* DAC Tone Control*/
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{ 0x22, 0x0040 }, /* MIC Input Select & Bias */
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{ 0x24, 0x0000 }, /* Output Volume Mapping & Jack */
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{ 0x26, 0x7f00 }, /* Powerdown Ctrl/Stat*/
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{ 0x28, 0x0405 }, /* Extended Audio ID */
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{ 0x2a, 0x0410 }, /* Extended Audio Start/Ctrl */
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{ 0x2c, 0xbb80 }, /* Audio DACs Sample Rate */
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{ 0x2e, 0xbb80 }, /* AUXDAC Sample Rate */
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{ 0x32, 0xbb80 }, /* Audio ADCs Sample Rate */
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{ 0x36, 0x4523 }, /* PCM codec control */
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{ 0x3a, 0x2000 }, /* SPDIF control */
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{ 0x3c, 0xfdff }, /* Powerdown 1 */
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{ 0x3e, 0xffff }, /* Powerdown 2 */
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{ 0x40, 0x0000 }, /* General Purpose */
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{ 0x42, 0x0000 }, /* Fast Power-Up Control */
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{ 0x44, 0x0080 }, /* MCLK/PLL Control */
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{ 0x46, 0x0000 }, /* MCLK/PLL Control */
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{ 0x4c, 0xfffe }, /* GPIO Pin Configuration */
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{ 0x4e, 0xffff }, /* GPIO Pin Polarity / Type */
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{ 0x50, 0x0000 }, /* GPIO Pin Sticky */
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{ 0x52, 0x0000 }, /* GPIO Pin Wake-Up */
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/* GPIO Pin Status */
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{ 0x56, 0xfffe }, /* GPIO Pin Sharing */
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{ 0x58, 0x4000 }, /* GPIO PullUp/PullDown */
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{ 0x5a, 0x0000 }, /* Additional Functions 1 */
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{ 0x5c, 0x0000 }, /* Additional Functions 2 */
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{ 0x60, 0xb032 }, /* ALC Control */
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{ 0x62, 0x3e00 }, /* ALC / Noise Gate Control */
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{ 0x64, 0x0000 }, /* AUXDAC input control */
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{ 0x74, 0x0000 }, /* Digitiser Reg 1 */
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{ 0x76, 0x0006 }, /* Digitiser Reg 2 */
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{ 0x78, 0x0001 }, /* Digitiser Reg 3 */
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{ 0x7a, 0x0000 }, /* Digitiser Read Back */
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};
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static const struct regmap_config wm9713_regmap_config = {
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.reg_bits = 16,
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.reg_stride = 2,
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.val_bits = 16,
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.max_register = 0x7e,
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.cache_type = REGCACHE_RBTREE,
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.reg_defaults = wm9713_reg_defaults,
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.num_reg_defaults = ARRAY_SIZE(wm9713_reg_defaults),
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.volatile_reg = regmap_ac97_default_volatile,
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.readable_reg = wm97xx_readable_reg,
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.writeable_reg = wm97xx_writeable_reg,
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};
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static struct mfd_cell wm9713_cells[] = {
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{ .name = "wm9713-codec", },
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{ .name = "wm97xx-ts", },
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};
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static int wm97xx_ac97_probe(struct ac97_codec_device *adev)
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{
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struct wm97xx_priv *wm97xx;
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const struct regmap_config *config;
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struct wm97xx_platform_data *codec_pdata;
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struct mfd_cell *cells;
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int ret = -ENODEV, nb_cells, i;
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struct wm97xx_pdata *pdata = snd_ac97_codec_get_platdata(adev);
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wm97xx = devm_kzalloc(ac97_codec_dev2dev(adev),
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sizeof(*wm97xx), GFP_KERNEL);
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if (!wm97xx)
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return -ENOMEM;
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wm97xx->dev = ac97_codec_dev2dev(adev);
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wm97xx->ac97 = snd_ac97_compat_alloc(adev);
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if (IS_ERR(wm97xx->ac97))
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return PTR_ERR(wm97xx->ac97);
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ac97_set_drvdata(adev, wm97xx);
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dev_info(wm97xx->dev, "wm97xx core found, id=0x%x\n",
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adev->vendor_id);
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codec_pdata = &wm97xx->codec_pdata;
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codec_pdata->ac97 = wm97xx->ac97;
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codec_pdata->batt_pdata = pdata ? pdata->batt_pdata : NULL;
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switch (adev->vendor_id) {
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case WM9705_VENDOR_ID:
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config = &wm9705_regmap_config;
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cells = wm9705_cells;
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nb_cells = ARRAY_SIZE(wm9705_cells);
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break;
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case WM9712_VENDOR_ID:
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config = &wm9712_regmap_config;
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cells = wm9712_cells;
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nb_cells = ARRAY_SIZE(wm9712_cells);
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break;
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case WM9713_VENDOR_ID:
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config = &wm9713_regmap_config;
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cells = wm9713_cells;
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nb_cells = ARRAY_SIZE(wm9713_cells);
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break;
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default:
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goto err_free_compat;
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}
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for (i = 0; i < nb_cells; i++) {
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cells[i].platform_data = codec_pdata;
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cells[i].pdata_size = sizeof(*codec_pdata);
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}
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codec_pdata->regmap = devm_regmap_init_ac97(wm97xx->ac97, config);
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if (IS_ERR(codec_pdata->regmap)) {
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ret = PTR_ERR(codec_pdata->regmap);
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goto err_free_compat;
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}
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ret = devm_mfd_add_devices(wm97xx->dev, PLATFORM_DEVID_NONE,
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cells, nb_cells, NULL, 0, NULL);
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if (ret)
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goto err_free_compat;
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return ret;
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err_free_compat:
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snd_ac97_compat_release(wm97xx->ac97);
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return ret;
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}
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static int wm97xx_ac97_remove(struct ac97_codec_device *adev)
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{
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struct wm97xx_priv *wm97xx = ac97_get_drvdata(adev);
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snd_ac97_compat_release(wm97xx->ac97);
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return 0;
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}
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static const struct ac97_id wm97xx_ac97_ids[] = {
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{ .id = WM9705_VENDOR_ID, .mask = WM97xx_VENDOR_ID_MASK },
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{ .id = WM9712_VENDOR_ID, .mask = WM97xx_VENDOR_ID_MASK },
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{ .id = WM9713_VENDOR_ID, .mask = WM97xx_VENDOR_ID_MASK },
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{ }
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};
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static struct ac97_codec_driver wm97xx_ac97_driver = {
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.driver = {
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.name = "wm97xx-core",
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},
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.probe = wm97xx_ac97_probe,
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.remove = wm97xx_ac97_remove,
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.id_table = wm97xx_ac97_ids,
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};
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static int __init wm97xx_module_init(void)
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{
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return snd_ac97_codec_driver_register(&wm97xx_ac97_driver);
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}
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module_init(wm97xx_module_init);
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static void __exit wm97xx_module_exit(void)
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{
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snd_ac97_codec_driver_unregister(&wm97xx_ac97_driver);
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}
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module_exit(wm97xx_module_exit);
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MODULE_DESCRIPTION("WM9712, WM9713 core driver");
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MODULE_AUTHOR("Robert Jarzmik <robert.jarzmik@free.fr>");
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MODULE_LICENSE("GPL");
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