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GCC 4.6 explicitly represents the MDR register. It may be accessed via the "z" constraint. Perhaps more importantly, it tracks when the MDR register is clobbered and uses the RETF instruction if the incoming value is still valid. Thus it is important to (at least) clobber the MDR register in relevant inline assembly fragments, lest RETF be used incorrectly. The only instances I could find are here. There are reads of the MDR register in kernel/gdb-stub.c, but that's harmless. Although, frankly, __builtin_return_address(0) might be a better thing in those cases. Certainly MDR isn't going to contain anything else that might be useful... Signed-off-by: Richard Henderson <rth@redhat.com> Signed-off-by: David Howells <dhowells@redhat.com>
116 lines
3.2 KiB
C
116 lines
3.2 KiB
C
/* MN10300 64-bit division
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#ifndef _ASM_DIV64
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#define _ASM_DIV64
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#include <linux/types.h>
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extern void ____unhandled_size_in_do_div___(void);
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/*
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* Beginning with gcc 4.6, the MDR register is represented explicitly. We
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* must, therefore, at least explicitly clobber the register when we make
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* changes to it. The following assembly fragments *could* be rearranged in
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* order to leave the moves to/from the MDR register to the compiler, but the
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* gains would be minimal at best.
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*/
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#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 6)
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# define CLOBBER_MDR_CC "mdr", "cc"
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#else
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# define CLOBBER_MDR_CC "cc"
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#endif
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/*
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* divide n by base, leaving the result in n and returning the remainder
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* - we can do this quite efficiently on the MN10300 by cascading the divides
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* through the MDR register
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*/
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#define do_div(n, base) \
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({ \
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unsigned __rem = 0; \
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if (sizeof(n) <= 4) { \
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asm("mov %1,mdr \n" \
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"divu %2,%0 \n" \
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"mov mdr,%1 \n" \
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: "+r"(n), "=d"(__rem) \
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: "r"(base), "1"(__rem) \
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: CLOBBER_MDR_CC \
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); \
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} else if (sizeof(n) <= 8) { \
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union { \
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unsigned long long l; \
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u32 w[2]; \
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} __quot; \
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__quot.l = n; \
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asm("mov %0,mdr \n" /* MDR = 0 */ \
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"divu %3,%1 \n" \
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/* __quot.MSL = __div.MSL / base, */ \
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/* MDR = MDR:__div.MSL % base */ \
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"divu %3,%2 \n" \
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/* __quot.LSL = MDR:__div.LSL / base, */ \
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/* MDR = MDR:__div.LSL % base */ \
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"mov mdr,%0 \n" \
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: "=d"(__rem), "=r"(__quot.w[1]), "=r"(__quot.w[0]) \
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: "r"(base), "0"(__rem), "1"(__quot.w[1]), \
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"2"(__quot.w[0]) \
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: CLOBBER_MDR_CC \
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); \
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n = __quot.l; \
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} else { \
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____unhandled_size_in_do_div___(); \
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} \
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__rem; \
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})
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/*
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* do an unsigned 32-bit multiply and divide with intermediate 64-bit product
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* so as not to lose accuracy
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* - we use the MDR register to hold the MSW of the product
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*/
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static inline __attribute__((const))
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unsigned __muldiv64u(unsigned val, unsigned mult, unsigned div)
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{
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unsigned result;
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asm("mulu %2,%0 \n" /* MDR:val = val*mult */
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"divu %3,%0 \n" /* val = MDR:val/div;
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* MDR = MDR:val%div */
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: "=r"(result)
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: "0"(val), "ir"(mult), "r"(div)
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: CLOBBER_MDR_CC
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);
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return result;
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}
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/*
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* do a signed 32-bit multiply and divide with intermediate 64-bit product so
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* as not to lose accuracy
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* - we use the MDR register to hold the MSW of the product
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*/
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static inline __attribute__((const))
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signed __muldiv64s(signed val, signed mult, signed div)
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{
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signed result;
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asm("mul %2,%0 \n" /* MDR:val = val*mult */
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"div %3,%0 \n" /* val = MDR:val/div;
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* MDR = MDR:val%div */
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: "=r"(result)
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: "0"(val), "ir"(mult), "r"(div)
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: CLOBBER_MDR_CC
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);
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return result;
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}
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#endif /* _ASM_DIV64 */
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