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64aa7008e9
linux/drivers/clk
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Martin Blumenstingl 64aa7008e9 clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller 
The Meson8/Meson8b/Meson8m2 SoCs embed a DDR clock controller in the
MMCBUS registers. There is no public documentation, but the u-boot GPL
sources from the Amlogic BSP show that the DDR clock controller is
identical on all three SoCs:
  #define CFG_DDR_CLK 792
  #define CFG_PLL_M (((CFG_DDR_CLK/12)*12)/24)
  #define CFG_PLL_N 1
  #define CFG_PLL_OD 1

  // from set_ddr_clock:
  t_ddr_pll_cntl= (CFG_PLL_OD << 16)|(CFG_PLL_N<<9)|(CFG_PLL_M<<0)
  writel(timing_reg->t_ddr_pll_cntl|(1<<29),AM_DDR_PLL_CNTL);
  writel(readl(AM_DDR_PLL_CNTL) & (~(1<<29)),AM_DDR_PLL_CNTL);

  // from hx_ddr_power_down_enter: shut down DDR PLL
  writel(readl(AM_DDR_PLL_CNTL)|(1<<30),AM_DDR_PLL_CNTL);

  do { ... } while((readl(AM_DDR_PLL_CNTL)&(1<<31))==0)

This translates to:
- AM_DDR_PLL_CNTL[29] is the reset bit
- AM_DDR_PLL_CNTL[30] is the enable bit
- AM_DDR_PLL_CNTL[31] is the lock bit
- AM_DDR_PLL_CNTL[8:0] is the m value (assuming the width is 9 bits
  based on the start of the n value)
- AM_DDR_PLL_CNTL[13:9] is the n value (assuming the width is 5 bits
  based on the start of the od)
- AM_DDR_PLL_CNTL[17:16] is the od (assuming the width is 2 bits based
  on other PLLs on this SoC)

Add a driver for this PLL setup because it's used as one of the inputs
of the audio clocks. There may be more clocks inside that clock
controller - those can be added in subsequent patches.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-12-11 14:06:29 +01:00
..
actions Merge branches 'clk-cdce-regulator', 'clk-bcm', 'clk-evict-parent-cache' and 'clk-actions' into clk-next 2019-09-19 15:31:46 -07:00
analogbits treewide: Add SPDX license identifier - Makefile/Kconfig 2019-05-21 10:50:46 +02:00
at91 This merge window we have one small clk provider API in the core framework and 2019-12-01 16:06:02 -08:00
axis treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
axs10x clk: axs10x: use devm_platform_ioremap_resource() to simplify code 2019-10-16 16:17:50 -07:00
bcm clk: bcm2835: use devm_platform_ioremap_resource() to simplify code 2019-10-16 16:16:50 -07:00
berlin treewide: Add SPDX license identifier - Makefile/Kconfig 2019-05-21 10:50:46 +02:00
davinci clk: davinci: use devm_platform_ioremap_resource() to simplify code 2019-10-16 16:17:14 -07:00
h8300 treewide: Add SPDX license identifier - Makefile/Kconfig 2019-05-21 10:50:46 +02:00
hisilicon Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'clk-imx' into clk-next 2019-11-27 08:14:17 -08:00
imgtec drivers/clk: convert VL struct to struct_size 2019-11-08 08:36:12 -08:00
imx This merge window we have one small clk provider API in the core framework and 2019-12-01 16:06:02 -08:00
ingenic Merge branches 'clk-ingenic', 'clk-init-leak', 'clk-ux500' and 'clk-bitmain' into clk-next 2019-11-27 08:15:13 -08:00
keystone This round of clk driver and framework updates is heavy on the driver update 2019-07-17 10:07:48 -07:00
loongson1 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
mediatek clk: mediatek: mt6797: use devm_platform_ioremap_resource() to simplify code 2019-10-16 16:17:46 -07:00
meson clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller 2019-12-11 14:06:29 +01:00
microchip treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 445 2019-06-05 17:37:18 +02:00
mmp ARM: mmp: add support for MMP3 SoC 2019-10-17 16:36:11 +02:00
mvebu Merge branches 'clk-ti', 'clk-allwinner', 'clk-qcom', 'clk-sa' and 'clk-aspeed' into clk-next 2019-11-27 08:14:38 -08:00
mxs treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 159 2019-05-30 11:26:37 -07:00
nxp treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 159 2019-05-30 11:26:37 -07:00
pistachio treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422 2019-06-05 17:37:15 +02:00
pxa clk: pxa: fix one of the pxa RTC clocks 2019-11-13 15:01:17 -08:00
qcom Merge branch 'thermal/next' of git://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux 2019-12-05 11:21:24 -08:00
renesas clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support 2019-11-01 13:36:39 +01:00
rockchip clk: rockchip: protect the pclk_usb_grf as critical on px30 2019-11-05 20:53:42 +01:00
samsung Merge branches 'clk-ti', 'clk-allwinner', 'clk-qcom', 'clk-sa' and 'clk-aspeed' into clk-next 2019-11-27 08:14:38 -08:00
sifive A few clk driver fixes 2019-05-30 16:33:37 -07:00
sirf clk: sirf: Don't reference clk_init_data after registration 2019-08-16 10:20:07 -07:00
socfpga We have a small collection of core framework updates this time, mostly around 2019-09-20 15:45:07 -07:00
spear clk: spear: Make structure i2s_sclk_masks constant 2019-09-06 10:27:40 -07:00
sprd Merge branches 'clk-gpio-flags', 'clk-tegra', 'clk-rockchip', 'clk-sprd' and 'clk-pxa' into clk-next 2019-11-27 08:15:00 -08:00
st Merge branches 'clk-aspeed', 'clk-unused', 'clk-of-node-put', 'clk-const-bulk-data' and 'clk-debugfs' into clk-next 2019-09-19 15:30:40 -07:00
sunxi clk: sunxi: Fix operator precedence in sunxi_divs_clk_setup 2019-10-29 08:42:31 +01:00
sunxi-ng This merge window we have one small clk provider API in the core framework and 2019-12-01 16:06:02 -08:00
tegra clk: tegra: Use match_string() helper to simplify the code 2019-11-13 15:03:27 -08:00
ti This merge window we have one small clk provider API in the core framework and 2019-12-01 16:06:02 -08:00
uniphier drivers/clk: convert VL struct to struct_size 2019-11-08 08:36:12 -08:00
ux500 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 194 2019-05-30 11:29:22 -07:00
versatile clk: versatile: Add of_node_put() in cm_osc_setup() 2019-08-07 15:25:25 -07:00
x86 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
zte clk: zx296718: Don't reference clk_init_data after registration 2019-08-16 10:20:15 -07:00
zynq treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 401 2019-06-05 17:37:13 +02:00
zynqmp ARM: SoC-related driver updates 2019-05-16 09:19:14 -07:00
clk-asm9260.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-aspeed.c clk: aspeed: Add RMII RCLK gates for both AST2500 MACs 2019-11-26 10:02:48 -08:00
clk-aspeed.h clk: aspeed: Move structures to header 2019-09-06 15:17:02 -07:00
clk-ast2600.c This merge window we have one small clk provider API in the core framework and 2019-12-01 16:06:02 -08:00
clk-axi-clkgen.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 177 2019-05-30 11:29:19 -07:00
clk-axm5516.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-bd718x7.c clk: bd718x7: Add MODULE_ALIAS() 2019-10-03 10:51:11 -07:00
clk-bm1880.c clk: Add common clock driver for BM1880 SoC 2019-11-22 15:58:27 -08:00
clk-bulk.c clk: Make clk_bulk_get_all() return a valid "id" 2019-09-17 13:26:31 -07:00
clk-cdce706.c This round of clk driver and framework updates is heavy on the driver update 2019-07-17 10:07:48 -07:00
clk-cdce925.c clk: clk-cdce925: Add regulator support 2019-09-06 10:31:16 -07:00
clk-clps711x.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
clk-composite.c clk: Add clk_hw_unregister_composite helper function definition 2019-11-22 15:58:04 -08:00
clk-conf.c clk: Tag clk core files with SPDX 2018-12-11 09:57:47 -08:00
clk-cs2000-cp.c clk: cs2000-cp: convert to SPDX identifiers 2018-08-02 13:55:00 -07:00
clk-devres.c clk: Add devm_clk_bulk_get_optional() function 2019-06-25 14:28:01 -07:00
clk-divider.c clk: Zero init clk_init_data in helpers 2019-11-22 15:58:04 -08:00
clk-efm32gg.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-fixed-factor.c Merge branch 'clk-parent-rewrite-1' into clk-next 2019-05-07 11:46:13 -07:00
clk-fixed-mmio.c clk: Remove io.h from clk-provider.h 2019-05-15 13:21:37 -07:00
clk-fixed-rate.c clk: Zero init clk_init_data in helpers 2019-11-22 15:58:04 -08:00
clk-fractional-divider.c clk: Remove io.h from clk-provider.h 2019-05-15 13:21:37 -07:00
clk-gate.c clk: Zero init clk_init_data in helpers 2019-11-22 15:58:04 -08:00
clk-gemini.c treewide: Use struct_size() for kmalloc()-family 2018-06-06 11:15:43 -07:00
clk-gpio.c clk: clk-gpio: propagate rate change to parent 2019-11-08 13:07:59 -08:00
clk-hi655x.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288 2019-06-05 17:36:37 +02:00
clk-highbank.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-hsdk-pll.c clk: Remove io.h from clk-provider.h 2019-05-15 13:21:37 -07:00
clk-lochnagar.c clk: lochnagar: Don't reference clk_init_data after registration 2019-08-16 10:20:07 -07:00
clk-max9485.c clk: Add driver for MAX9485 2018-07-06 13:44:06 -07:00
clk-max77686.c clk: clk-max77686: Clean clkdev lookup leak and use devm 2019-02-06 10:35:03 -08:00
clk-milbeaut.c clk: milbeaut: Don't reference clk_init_data after registration 2019-08-16 10:20:15 -07:00
clk-moxart.c
clk-multiplier.c clk: Remove io.h from clk-provider.h 2019-05-15 13:21:37 -07:00
clk-mux.c clk: Zero init clk_init_data in helpers 2019-11-22 15:58:04 -08:00
clk-nomadik.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 194 2019-05-30 11:29:22 -07:00
clk-npcm7xx.c This time it looks like a quieter release cycle in the clk tree. I guess that's 2018-10-31 11:08:30 -07:00
clk-nspire.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-oxnas.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-palmas.c clk: palmas: constify clk_ops structure 2018-11-06 09:41:44 -08:00
clk-pwm.c This round of clk driver and framework updates is heavy on the driver update 2019-07-17 10:07:48 -07:00
clk-qoriq.c clk: qoriq: Fix -Wunused-const-variable 2019-08-07 14:17:49 -07:00
clk-rk808.c - Core Frameworks 2019-07-15 20:18:40 -07:00
clk-s2mps11.c clk: s2mps11: constify clk_ops structure 2018-11-06 09:42:12 -08:00
clk-scmi.c firmware: arm_scmi: Drop config flag in clk_ops->rate_set 2019-08-12 12:23:01 +01:00
clk-scpi.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-si514.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 2019-05-30 11:26:37 -07:00
clk-si544.c clk: clk-si544: Implement small frequency change support 2019-06-27 13:45:38 -07:00
clk-si570.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 2019-05-30 11:26:37 -07:00
clk-si5341.c clk: Si5341/Si5340: remove redundant assignment to n_den 2019-08-07 14:23:24 -07:00
clk-si5351.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
clk-si5351.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
clk-stm32f4.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-stm32h7.c clk: Convert to using %pOFn instead of device_node.name 2018-08-30 09:50:20 -07:00
clk-stm32mp1.c clk: stm32mp1: Add ddrperfm clock 2019-04-29 11:13:23 -07:00
clk-tango4.c clk: Convert to using %pOFn instead of device_node.name 2018-08-30 09:50:20 -07:00
clk-twl6040.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 336 2019-06-05 17:37:07 +02:00
clk-u300.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 194 2019-05-30 11:29:22 -07:00
clk-versaclock5.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 2019-05-30 11:26:37 -07:00
clk-vt8500.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 2019-06-05 17:36:37 +02:00
clk-wm831x.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
clk-xgene.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 156 2019-05-30 11:26:35 -07:00
clk.c Merge branches 'clk-ingenic', 'clk-init-leak', 'clk-ux500' and 'clk-bitmain' into clk-next 2019-11-27 08:15:13 -08:00
clk.h clk: consoldiate the __clk_get_hw() declarations 2019-07-12 11:00:14 -07:00
clkdev.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
Kconfig ARM: SoC platform updates 2019-12-05 11:38:40 -08:00
Makefile clk: Add common clock driver for BM1880 SoC 2019-11-22 15:58:27 -08:00