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d46392bbf5
* Support for cbo.zero in userspace. * Support for CBOs on ACPI-based systems. * A handful of improvements for the T-Head cache flushing ops. * Support for software shadow call stacks. * Various cleanups and fixes. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmVJAJoTHHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYiWZrD/9ECV/0tuX5LbS56kA0ElkwiakyIVGu ZVuF26yGJ6w+XvwnHPhqKNVN0ReYR6s6CwH1WpHI5Du9QHZGQU3DKJ43dFMTP3Dn dQFli7QJ+tsNo1nre8NZWKj5Ac+Cu906F794qM0q0XrZmyb9DY3ojVYJAYy+dtoo /9gwbB7P0GLyDlURLn48oQyz36WQW3CkL5Jkfu+uYwnFe9DAFtfakIKq5mLlNuaH PgUk8pAVhSy2GdPOGFtnFFhdXMrTjpgxdo62ZIZC0lbsts26Dxp95oUygqMg51Iy ilaXkA2U1c1+gFQNpEove7BVZa5708Kaj6RLQ3/kAJblAzibszwQvIWlWOh7RVni 3GQAS7/0D0+0cjDwXdWaPIaFFzLfi3bDxRYkc7n59p6nOz+GrxnSNsRPQJGgYxeU oTtJfaqWKntm72iutiHmXgx/pvAxWOHpqDnSTlDdtjvgzXCplqBbxZFF/azj30o5 jplNW5YvdvD9fviYMAoGSOz03IwDeZF5rMlAhqu6vXlyD2//mID82yw/hBluIA3+ /hLo5QfTLiUGs9nnijxMcfoyusN6AXsJOxwYdAJCIuJOr78YUj0S974gd9KvJXma KedrwRVwW7KE7CwY1jhrWBsZEpzl8YrtpMDN47y4gRtDZN8XJMQ+lHqd+BHT/DUO TGUCYi5xvr6Vlw== =hKWl -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V updates from Palmer Dabbelt: - Support for cbo.zero in userspace - Support for CBOs on ACPI-based systems - A handful of improvements for the T-Head cache flushing ops - Support for software shadow call stacks - Various cleanups and fixes * tag 'riscv-for-linus-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (31 commits) RISC-V: hwprobe: Fix vDSO SIGSEGV riscv: configs: defconfig: Enable configs required for RZ/Five SoC riscv: errata: prefix T-Head mnemonics with th. riscv: put interrupt entries into .irqentry.text riscv: mm: Update the comment of CONFIG_PAGE_OFFSET riscv: Using TOOLCHAIN_HAS_ZIHINTPAUSE marco replace zihintpause riscv/mm: Fix the comment for swap pte format RISC-V: clarify the QEMU workaround in ISA parser riscv: correct pt_level name via pgtable_l5/4_enabled RISC-V: Provide pgtable_l5_enabled on rv32 clocksource: timer-riscv: Increase rating of clock_event_device for Sstc clocksource: timer-riscv: Don't enable/disable timer interrupt lkdtm: Fix CFI_BACKWARD on RISC-V riscv: Use separate IRQ shadow call stacks riscv: Implement Shadow Call Stack riscv: Move global pointer loading to a macro riscv: Deduplicate IRQ stack switching riscv: VMAP_STACK overflow detection thread-safe RISC-V: cacheflush: Initialize CBO variables on ACPI systems RISC-V: ACPI: RHCT: Add function to get CBO block sizes ... |
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altera-stapl | ||
bcm-vk | ||
c2port | ||
cardreader | ||
cb710 | ||
cxl | ||
echo | ||
eeprom | ||
genwqe | ||
ibmasm | ||
lis3lv02d | ||
lkdtm | ||
mchp_pci1xxxx | ||
mei | ||
ocxl | ||
pvpanic | ||
sgi-gru | ||
sgi-xp | ||
ti-st | ||
uacce | ||
vmw_vmci | ||
ad525x_dpot-i2c.c | ||
ad525x_dpot-spi.c | ||
ad525x_dpot.c | ||
ad525x_dpot.h | ||
apds990x.c | ||
apds9802als.c | ||
atmel-ssc.c | ||
bh1770glc.c | ||
cs5535-mfgpt.c | ||
ds1682.c | ||
dummy-irq.c | ||
dw-xdata-pcie.c | ||
enclosure.c | ||
fastrpc.c | ||
gehc-achc.c | ||
hi6421v600-irq.c | ||
hisi_hikey_usb.c | ||
hmc6352.c | ||
hpilo.c | ||
hpilo.h | ||
ibmvmc.c | ||
ibmvmc.h | ||
ics932s401.c | ||
isl29003.c | ||
isl29020.c | ||
Kconfig | ||
kgdbts.c | ||
lattice-ecp3-config.c | ||
Makefile | ||
open-dice.c | ||
pch_phub.c | ||
pci_endpoint_test.c | ||
phantom.c | ||
qcom-coincell.c | ||
smpro-errmon.c | ||
smpro-misc.c | ||
sram-exec.c | ||
sram.c | ||
sram.h | ||
tifm_7xx1.c | ||
tifm_core.c | ||
tps6594-esm.c | ||
tps6594-pfsm.c | ||
tsl2550.c | ||
vcpu_stall_detector.c | ||
vmw_balloon.c | ||
xilinx_sdfec.c | ||
xilinx_tmr_inject.c | ||
xilinx_tmr_manager.c |