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Add a reset controller driver for Xilinx Zynq UltraScale+ MPSoC. The zynqmp reset-controller has the ability to reset lines connected to different blocks and peripheral in the Soc. Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
115 lines
2.8 KiB
C
115 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018 Xilinx, Inc.
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*
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*/
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#include <linux/err.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/reset-controller.h>
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#include <linux/firmware/xlnx-zynqmp.h>
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#define ZYNQMP_NR_RESETS (ZYNQMP_PM_RESET_END - ZYNQMP_PM_RESET_START)
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#define ZYNQMP_RESET_ID ZYNQMP_PM_RESET_START
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struct zynqmp_reset_data {
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struct reset_controller_dev rcdev;
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const struct zynqmp_eemi_ops *eemi_ops;
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};
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static inline struct zynqmp_reset_data *
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to_zynqmp_reset_data(struct reset_controller_dev *rcdev)
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{
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return container_of(rcdev, struct zynqmp_reset_data, rcdev);
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}
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static int zynqmp_reset_assert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct zynqmp_reset_data *priv = to_zynqmp_reset_data(rcdev);
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return priv->eemi_ops->reset_assert(ZYNQMP_RESET_ID + id,
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PM_RESET_ACTION_ASSERT);
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}
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static int zynqmp_reset_deassert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct zynqmp_reset_data *priv = to_zynqmp_reset_data(rcdev);
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return priv->eemi_ops->reset_assert(ZYNQMP_RESET_ID + id,
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PM_RESET_ACTION_RELEASE);
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}
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static int zynqmp_reset_status(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct zynqmp_reset_data *priv = to_zynqmp_reset_data(rcdev);
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int val, err;
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err = priv->eemi_ops->reset_get_status(ZYNQMP_RESET_ID + id, &val);
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if (err)
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return err;
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return val;
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}
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static int zynqmp_reset_reset(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct zynqmp_reset_data *priv = to_zynqmp_reset_data(rcdev);
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return priv->eemi_ops->reset_assert(ZYNQMP_RESET_ID + id,
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PM_RESET_ACTION_PULSE);
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}
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static struct reset_control_ops zynqmp_reset_ops = {
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.reset = zynqmp_reset_reset,
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.assert = zynqmp_reset_assert,
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.deassert = zynqmp_reset_deassert,
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.status = zynqmp_reset_status,
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};
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static int zynqmp_reset_probe(struct platform_device *pdev)
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{
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struct zynqmp_reset_data *priv;
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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platform_set_drvdata(pdev, priv);
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priv->eemi_ops = zynqmp_pm_get_eemi_ops();
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if (!priv->eemi_ops)
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return -ENXIO;
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priv->rcdev.ops = &zynqmp_reset_ops;
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priv->rcdev.owner = THIS_MODULE;
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priv->rcdev.of_node = pdev->dev.of_node;
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priv->rcdev.nr_resets = ZYNQMP_NR_RESETS;
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return devm_reset_controller_register(&pdev->dev, &priv->rcdev);
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}
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static const struct of_device_id zynqmp_reset_dt_ids[] = {
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{ .compatible = "xlnx,zynqmp-reset", },
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{ /* sentinel */ },
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};
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static struct platform_driver zynqmp_reset_driver = {
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.probe = zynqmp_reset_probe,
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.driver = {
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.name = KBUILD_MODNAME,
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.of_match_table = zynqmp_reset_dt_ids,
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},
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};
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static int __init zynqmp_reset_init(void)
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{
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return platform_driver_register(&zynqmp_reset_driver);
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}
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arch_initcall(zynqmp_reset_init);
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