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568692102b
Add infrastructure to track statistics for GPU submissions by sampling certain perfcounters before and after a submission. To store the statistics, the per-ring memptrs region is expanded to include room for up to 64 entries - this should cover a reasonable amount of inflight submissions without worrying about losing data. The target specific code inserts PM4 commands to sample the counters before and after submission and store them in the data region. The CPU can access the data after the submission retires to make sense of the statistics and communicate them to the user. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
81 lines
2.2 KiB
C
81 lines
2.2 KiB
C
/*
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __MSM_RINGBUFFER_H__
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#define __MSM_RINGBUFFER_H__
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#include "msm_drv.h"
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#define rbmemptr(ring, member) \
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((ring)->memptrs_iova + offsetof(struct msm_rbmemptrs, member))
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#define rbmemptr_stats(ring, index, member) \
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(rbmemptr((ring), stats) + \
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((index) * sizeof(struct msm_gpu_submit_stats)) + \
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offsetof(struct msm_gpu_submit_stats, member))
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struct msm_gpu_submit_stats {
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u64 cpcycles_start;
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u64 cpcycles_end;
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u64 alwayson_start;
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u64 alwayson_end;
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};
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#define MSM_GPU_SUBMIT_STATS_COUNT 64
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struct msm_rbmemptrs {
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volatile uint32_t rptr;
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volatile uint32_t fence;
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volatile struct msm_gpu_submit_stats stats[MSM_GPU_SUBMIT_STATS_COUNT];
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};
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struct msm_ringbuffer {
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struct msm_gpu *gpu;
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int id;
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struct drm_gem_object *bo;
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uint32_t *start, *end, *cur, *next;
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struct list_head submits;
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uint64_t iova;
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uint32_t seqno;
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uint32_t hangcheck_fence;
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struct msm_rbmemptrs *memptrs;
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uint64_t memptrs_iova;
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struct msm_fence_context *fctx;
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spinlock_t lock;
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};
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struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,
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void *memptrs, uint64_t memptrs_iova);
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void msm_ringbuffer_destroy(struct msm_ringbuffer *ring);
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/* ringbuffer helpers (the parts that are same for a3xx/a2xx/z180..) */
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static inline void
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OUT_RING(struct msm_ringbuffer *ring, uint32_t data)
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{
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/*
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* ring->next points to the current command being written - it won't be
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* committed as ring->cur until the flush
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*/
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if (ring->next == ring->end)
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ring->next = ring->start;
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*(ring->next++) = data;
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}
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#endif /* __MSM_RINGBUFFER_H__ */
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