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1199419617
i.MX93 CCM ROOT clock has a mux, gate and divider in one register, here is to combine all these into one composite clk and simplify clk tree. i.MX93 CCM is a new IP compared with i.MX8M, so introduce a new file. Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220228020908.2810346-4-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
94 lines
2.0 KiB
C
94 lines
2.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2021 NXP
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*
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* Peng Fan <peng.fan@nxp.com>
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*/
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#include <linux/clk-provider.h>
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#include <linux/errno.h>
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#include <linux/export.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include "clk.h"
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#define CCM_DIV_SHIFT 0
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#define CCM_DIV_WIDTH 8
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#define CCM_MUX_SHIFT 8
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#define CCM_MUX_MASK 3
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#define CCM_OFF_SHIFT 24
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#define AUTHEN_OFFSET 0x30
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#define TZ_NS_SHIFT 9
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#define TZ_NS_MASK BIT(9)
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struct clk_hw *imx93_clk_composite_flags(const char *name, const char * const *parent_names,
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int num_parents, void __iomem *reg,
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unsigned long flags)
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{
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struct clk_hw *hw = ERR_PTR(-ENOMEM), *mux_hw;
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struct clk_hw *div_hw, *gate_hw;
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struct clk_divider *div = NULL;
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struct clk_gate *gate = NULL;
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struct clk_mux *mux = NULL;
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bool clk_ro = false;
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mux = kzalloc(sizeof(*mux), GFP_KERNEL);
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if (!mux)
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goto fail;
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mux_hw = &mux->hw;
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mux->reg = reg;
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mux->shift = CCM_MUX_SHIFT;
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mux->mask = CCM_MUX_MASK;
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mux->lock = &imx_ccm_lock;
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div = kzalloc(sizeof(*div), GFP_KERNEL);
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if (!div)
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goto fail;
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div_hw = &div->hw;
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div->reg = reg;
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div->shift = CCM_DIV_SHIFT;
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div->width = CCM_DIV_WIDTH;
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div->lock = &imx_ccm_lock;
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div->flags = CLK_DIVIDER_ROUND_CLOSEST;
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if (!(readl(reg + AUTHEN_OFFSET) & TZ_NS_MASK))
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clk_ro = true;
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if (clk_ro) {
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hw = clk_hw_register_composite(NULL, name, parent_names, num_parents,
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mux_hw, &clk_mux_ro_ops, div_hw,
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&clk_divider_ro_ops, NULL, NULL, flags);
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} else {
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gate = kzalloc(sizeof(*gate), GFP_KERNEL);
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if (!gate)
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goto fail;
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gate_hw = &gate->hw;
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gate->reg = reg;
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gate->bit_idx = CCM_OFF_SHIFT;
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gate->lock = &imx_ccm_lock;
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gate->flags = CLK_GATE_SET_TO_DISABLE;
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hw = clk_hw_register_composite(NULL, name, parent_names, num_parents,
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mux_hw, &clk_mux_ops, div_hw,
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&clk_divider_ops, gate_hw,
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&clk_gate_ops, flags | CLK_SET_RATE_NO_REPARENT);
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}
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if (IS_ERR(hw))
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goto fail;
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return hw;
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fail:
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kfree(gate);
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kfree(div);
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kfree(mux);
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return ERR_CAST(hw);
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}
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EXPORT_SYMBOL_GPL(imx93_clk_composite_flags);
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