linux/drivers/clk
Linus Torvalds 7ddb58cb0e The usual collection of clk driver updates and new driver additions. In
terms of lines it's mainly Qualcomm and Mediatek code, supporting
 various SoCs and their multitude of clk controllers.
 
 New Drivers:
  - GCC and RPMcc support for Qualcomm QCM2290 SoCs
  - GCC support for Qualcomm MSM8994/MSM8992 SoCs
  - LPASSCC and CAMCC support for Qualcomm SC7280 SoCs
  - Support for Mediatek MT8195 SoCs
  - Initial clock driver for the Exynos850 SoC
  - Add i.MX8ULP clock driver and related bindings
 
 Updates:
  - Clock power management for new SAMA7G5 SoC
  - Updates to the master clock driver and sam9x60-pll to be able to use
    cpufreq-dt driver and avoid overclocking of CPU and MCK0 domains while
    changing the frequency via DVFS
  - Use ARRAY_SIZE in qcom clk drivers
  - Remove some impractical fallback parent names in qcom clk drivers
  - Make Mediatek clk drivers tristate
  - Refactoring of the CPU clock code and conversion of Samsung Exynos5433
    CPU clock driver to the platform driver
  - A few conversions to devm_platform_ioremap_resource()
  - Updates of the Samsung Kconfig help text
  - Update video path realted clocks for Amlogic meson8
  - Add SPI Multi I/O Bus and SDHI clocks and resets on Renesas RZ/G2L
  - Add SPI Multi I/O Bus (RPC) clocks on Renesas R-Car V3U
  - Add MediaLB clocks on Renesas R-Car H3, M3-W/W+, and M3-N
  - Remove unused helpers from i.MX specific clock header
  - Rework all i.MX clk based helpers to use clk_hw based ones
  - Rework i.MX gate/mux/divider wrappers
  - Rework imx_clk_hw_composite and imx_clk_hw_pll14xx wrappers
  - Update i.MX pllv4 and composite clocks to support i.MX8ULP
  - Disable i.MX7ULP composite clock during initialization
  - Add CLK_SET_RATE_NO_REPARENT flag to the i.MX7ULP composite
  - Disable the i.MX pfd when set pfdv2 clock rate
  - Add support for i.MX8ULP in pfdv2
  - Add the pcc reset controller support on i.MX8ULP
  - Fix the build break when clk-imx8ulp is built as module
  - Move csi_sel mux to correct base register in i.MX6UL clock drivr
  - Fix csi clk gate register in i.MX6UL clock driver
  - Fix build bug making CLK_IMX8ULP select MXC_CLK
  - Add TPU (PWM), and Z (Cortex-A76) clocks on Renesas R-Car V3U
  - Add Ethernet clocks on Renesas RZ/G2L
  - Move Rockchip to use module_platform_probe
  - Enable usage of Coresight related clocks on Rockchip rk3399
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "The usual collection of clk driver updates and new driver additions.
  In terms of lines it's mainly Qualcomm and Mediatek code, supporting
  various SoCs and their multitude of clk controllers.

  New Drivers:
   - GCC and RPMcc support for Qualcomm QCM2290 SoCs
   - GCC support for Qualcomm MSM8994/MSM8992 SoCs
   - LPASSCC and CAMCC support for Qualcomm SC7280 SoCs
   - Support for Mediatek MT8195 SoCs
   - Initial clock driver for the Exynos850 SoC
   - Add i.MX8ULP clock driver and related bindings

  Updates:
   - Clock power management for new SAMA7G5 SoC
   - Updates to the master clock driver and sam9x60-pll to be able to
     use cpufreq-dt driver and avoid overclocking of CPU and MCK0
     domains while changing the frequency via DVFS
   - Use ARRAY_SIZE in qcom clk drivers
   - Remove some impractical fallback parent names in qcom clk drivers
   - Make Mediatek clk drivers tristate
   - Refactoring of the CPU clock code and conversion of Samsung
     Exynos5433 CPU clock driver to the platform driver
   - A few conversions to devm_platform_ioremap_resource()
   - Updates of the Samsung Kconfig help text
   - Update video path realted clocks for Amlogic meson8
   - Add SPI Multi I/O Bus and SDHI clocks and resets on Renesas RZ/G2L
   - Add SPI Multi I/O Bus (RPC) clocks on Renesas R-Car V3U
   - Add MediaLB clocks on Renesas R-Car H3, M3-W/W+, and M3-N
   - Remove unused helpers from i.MX specific clock header
   - Rework all i.MX clk based helpers to use clk_hw based ones
   - Rework i.MX gate/mux/divider wrappers
   - Rework imx_clk_hw_composite and imx_clk_hw_pll14xx wrappers
   - Update i.MX pllv4 and composite clocks to support i.MX8ULP
   - Disable i.MX7ULP composite clock during initialization
   - Add CLK_SET_RATE_NO_REPARENT flag to the i.MX7ULP composite
   - Disable the i.MX pfd when set pfdv2 clock rate
   - Add support for i.MX8ULP in pfdv2
   - Add the pcc reset controller support on i.MX8ULP
   - Fix the build break when clk-imx8ulp is built as module
   - Move csi_sel mux to correct base register in i.MX6UL clock drivr
   - Fix csi clk gate register in i.MX6UL clock driver
   - Fix build bug making CLK_IMX8ULP select MXC_CLK
   - Add TPU (PWM), and Z (Cortex-A76) clocks on Renesas R-Car V3U
   - Add Ethernet clocks on Renesas RZ/G2L
   - Move Rockchip to use module_platform_probe
   - Enable usage of Coresight related clocks on Rockchip rk3399"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (170 commits)
  clk: use clk_core_get_rate_recalc() in clk_rate_get()
  clk: at91: sama7g5: set low limit for mck0 at 32KHz
  clk: at91: sama7g5: remove prescaler part of master clock
  clk: at91: clk-master: add notifier for divider
  clk: at91: clk-sam9x60-pll: add notifier for div part of PLL
  clk: at91: clk-master: fix prescaler logic
  clk: at91: clk-master: mask mckr against layout->mask
  clk: at91: clk-master: check if div or pres is zero
  clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULL
  clk: at91: pmc: add sama7g5 to the list of available pmcs
  clk: at91: clk-master: improve readability by using local variables
  clk: at91: clk-master: add register definition for sama7g5's master clock
  clk: at91: sama7g5: add securam's peripheral clock
  clk: at91: pmc: execute suspend/resume only for backup mode
  clk: at91: re-factor clocks suspend/resume
  clk: ux500: Add driver for the reset portions of PRCC
  dt-bindings: clock: u8500: Rewrite in YAML and extend
  clk: composite: Use rate_ops.determine_rate when also a mux is available
  clk: samsung: describe drivers in Kconfig
  clk: samsung: exynos5433: update apollo and atlas clock probing
  ...
2021-11-03 21:18:44 -07:00
..
actions clk: actions: Add NIC and ETHERNET clock support for Actions S500 SoC 2021-06-27 18:45:17 -07:00
analogbits Merge branch 'akpm' (patches from Andrew) 2021-07-02 12:08:10 -07:00
at91 clk: at91: sama7g5: set low limit for mck0 at 32KHz 2021-10-26 18:27:43 -07:00
axis
axs10x clk: axs10x: use devm_platform_ioremap_resource() to simplify code 2019-10-16 16:17:50 -07:00
baikal-t1 clk: baikal-t1: Mark Ethernet PLL as critical 2020-10-13 19:48:34 -07:00
bcm clk: bcm2835: Switch to clk_divider.determine_rate 2021-08-05 17:36:10 -07:00
berlin
davinci This pull request contains zero diff to the core framework. It is a collection 2020-10-22 12:53:28 -07:00
h8300
hisilicon clk: hisilicon: hi3559a: select RESET_HISI 2021-07-26 17:23:40 -07:00
imgtec treewide: replace '---help---' in Kconfig files with 'help' 2020-06-14 01:57:21 +09:00
imx clk: imx: Make CLK_IMX8ULP select MXC_CLK 2021-10-06 22:17:42 +03:00
ingenic clk: ingenic: Add support for the JZ4760 2021-06-27 19:49:18 -07:00
keystone clk: keystone: syscon-clk: Add support for AM64 specific epwm-tbclk 2021-06-22 14:18:26 -07:00
loongson1
mediatek clk: mediatek: Export clk_ops structures to modules 2021-09-14 18:57:23 -07:00
meson clk: meson: meson8b: Make the video clock trees mutable 2021-09-23 11:46:38 +02:00
microchip clk: let init callback return an error code 2019-12-23 18:53:13 -08:00
mmp clk: mmp2: fix build without CONFIG_PM 2021-01-12 12:10:55 -08:00
mstar clk: mstar: msc313-mpll: Fix format specifier 2021-02-16 12:52:28 -08:00
mvebu clk: mvebu: ap-cpu-clk: Fix a memory leak in error handling paths 2021-09-14 18:25:16 -07:00
mxs
nxp
pistachio clk: pistachio: Make it selectable for generic MIPS kernel 2021-08-12 16:01:49 +02:00
pxa clk: pxa: Constify static struct clk_ops 2020-10-13 19:49:11 -07:00
qcom The usual collection of clk driver updates and new driver additions. In 2021-11-03 21:18:44 -07:00
ralink clk: ralink: avoid to set 'CLK_IS_CRITICAL' flag for gates 2021-08-28 22:24:06 -07:00
renesas clk: renesas: r8a779[56]x: Add MLP clocks 2021-10-15 09:46:14 +02:00
rockchip clk: rockchip: use module_platform_driver_probe 2021-09-21 00:44:53 +02:00
samsung clk: samsung: describe drivers in Kconfig 2021-10-18 10:12:48 +02:00
sifive clk: sifive: Fix kernel-doc 2021-06-01 23:39:15 -07:00
socfpga clk: socfpga: agilex: fix duplicate s2f_user0_clk 2021-09-24 16:03:08 -07:00
spear clk: spear: Move prototype to accessible header 2021-02-11 11:56:06 -08:00
sprd This time around we have 4 lines of diff in the core framework, removing a 2020-06-10 11:42:19 -07:00
st clk: st: clkgen-fsyn: embed soc clock outputs within compatible data 2021-06-27 19:53:40 -07:00
sunxi clk: sunxi: sun8i-apb0: Make use of the helper function devm_platform_ioremap_resource() 2021-09-13 09:03:24 +02:00
sunxi-ng clk: sunxi-ng: ccu-sun9i-a80-usb: Make use of the helper function devm_platform_ioremap_resource() 2021-09-13 09:03:23 +02:00
tegra Nothing changed in the clk framework core this time around. We did get 2021-09-02 14:17:24 -07:00
ti drivers: ti: remove redundant error message in adpll.c 2021-06-27 19:56:45 -07:00
uniphier clk: uniphier: Fix potential infinite loop 2021-04-12 19:09:59 -07:00
ux500 clk: ux500: Add driver for the reset portions of PRCC 2021-10-26 18:06:05 -07:00
versatile clk: versatile: hide clock drivers from non-ARM users 2021-10-14 18:00:35 -07:00
x86 clk: x86: Rename clk-lpt to more specific clk-lpss-atom 2021-07-27 14:03:47 -07:00
xilinx clk: xilinx: move xlnx_vcu clock driver from soc 2021-02-08 18:31:25 -08:00
zynq clk: zynq: clkc: Remove various instances of an unused variable 'clk' 2021-02-11 11:56:07 -08:00
zynqmp Merge branches 'clk-kirkwood', 'clk-imx', 'clk-doc', 'clk-zynq' and 'clk-ralink' into clk-next 2021-09-01 15:27:07 -07:00
clk-asm9260.c clk: asm9260: fix __clk_hw_register_fixed_rate_with_accuracy typo 2020-04-13 12:20:06 -07:00
clk-aspeed.c clk: aspeed: Add RMII RCLK gates for both AST2500 MACs 2019-11-26 10:02:48 -08:00
clk-aspeed.h clk: aspeed: Move structures to header 2019-09-06 15:17:02 -07:00
clk-ast2600.c media: aspeed: fix clock handling logic 2021-03-11 11:59:45 +01:00
clk-axi-clkgen.c clk: axi-clkgen: use devm_platform_ioremap_resource() short-hand 2021-02-08 18:13:13 -08:00
clk-axm5516.c
clk-bd718x7.c clk: bd718xx: Drop BD70528 support 2021-06-27 18:42:45 -07:00
clk-bm1880.c clk: bm1800: Remove set but not used variable 'fref' 2019-12-24 00:10:33 -08:00
clk-bulk.c clk: Make clk_bulk_get_all() return a valid "id" 2019-09-17 13:26:31 -07:00
clk-cdce706.c Replace HTTP links with HTTPS ones: Common CLK framework 2020-07-10 17:15:34 -07:00
clk-cdce925.c clk: clk-cdce925: Add regulator support 2019-09-06 10:31:16 -07:00
clk-clps711x.c
clk-composite.c Merge branches 'clk-composite-determine-fix', 'clk-allwinner', 'clk-amlogic' and 'clk-samsung' into clk-next 2021-11-02 11:27:06 -07:00
clk-conf.c
clk-cs2000-cp.c
clk-devres.c clk: fix leak on devm_clk_bulk_get_all() unwind 2021-07-31 00:53:38 -07:00
clk-divider.c clk: divider: Implement and wire up .determine_rate by default 2021-08-05 17:35:58 -07:00
clk-fixed-factor.c clk: fixed: fix double free in resource managed fixed-factor clock 2021-04-07 16:01:25 -07:00
clk-fixed-mmio.c clk: clk-fixed-mmio: Demote obvious kernel-doc abuse 2021-02-11 11:56:05 -08:00
clk-fixed-rate.c clk: fixed: add missing kerneldoc 2020-09-22 12:44:14 -07:00
clk-fractional-divider.c clk: fractional-divider: Document the arithmetics used behind the code 2021-08-12 12:42:00 -07:00
clk-fractional-divider.h clk: fractional-divider: Hide clk_fractional_divider_ops from wide audience 2021-08-12 12:42:00 -07:00
clk-fsl-flexspi.c clk: fsl-flexspi: new driver 2020-12-07 16:56:41 -08:00
clk-fsl-sai.c clk: fsl-sai: use devm_clk_hw_register_composite_pdata() 2020-12-07 14:06:16 -08:00
clk-gate.c treewide: Remove uninitialized_var() usage 2020-07-16 12:35:15 -07:00
clk-gemini.c
clk-gpio.c Replace HTTP links with HTTPS ones: Common CLK framework 2020-07-10 17:15:34 -07:00
clk-hi655x.c
clk-highbank.c
clk-hsdk-pll.c CLK: HSDK: CGU: add support for 148.5MHz clock 2020-05-28 21:06:39 -07:00
clk-k210.c clk: k210: Fix k210_clk_set_parent() 2021-06-30 11:34:36 -07:00
clk-lmk04832.c clk: lmk04832: drop redundant fallthrough statements 2021-07-27 11:52:30 -07:00
clk-lochnagar.c clk: lochnagar: Don't reference clk_init_data after registration 2019-08-16 10:20:07 -07:00
clk-max9485.c
clk-max77686.c
clk-milbeaut.c clk: milbeaut: Don't reference clk_init_data after registration 2019-08-16 10:20:15 -07:00
clk-moxart.c
clk-multiplier.c
clk-mux.c clk: mux: provide devm_clk_hw_register_mux() 2021-04-07 11:05:44 -07:00
clk-nomadik.c
clk-npcm7xx.c clk: clk-npcm7xx: Remove unused static const tables 'npcm7xx_gates' and 'npcm7xx_divs_fx' 2021-02-11 11:56:05 -08:00
clk-nspire.c
clk-oxnas.c
clk-palmas.c clk: palmas: Add a missing SPDX license header 2021-08-05 17:34:30 -07:00
clk-plldig.c clk: ls1028a: fix a dereference of pointer 'parent' before a null check 2020-02-03 23:03:49 -08:00
clk-pwm.c clk: pwm: drop of_match_ptr from of_device_id table 2020-12-10 12:24:18 -08:00
clk-qoriq.c clk: qoriq: use macros to generate pll_mask 2021-02-14 13:02:01 -08:00
clk-rk808.c - Core Frameworks 2019-07-15 20:18:40 -07:00
clk-s2mps11.c clk: s2mps11: Fix a resource leak in error handling paths in the probe function 2020-12-19 15:53:31 -08:00
clk-scmi.c clk: scmi: Port driver to the new scmi_clk_proto_ops interface 2021-03-30 16:34:37 +01:00
clk-scpi.c clk: scpi: mark scpi_clk_match as maybe unused 2020-12-10 12:24:40 -08:00
clk-si514.c
clk-si544.c clk: clk-si544: Implement small frequency change support 2019-06-27 13:45:38 -07:00
clk-si570.c clk: si570: Skip NVM to RAM recall operation if an optional property is set 2021-02-11 12:13:50 -08:00
clk-si5341.c clk: si5341: Add sysfs properties to allow checking/resetting device faults 2021-06-27 19:58:15 -07:00
clk-si5351.c clk: si5351: Wait for bit clear after PLL reset 2020-12-19 15:49:54 -08:00
clk-si5351.h
clk-sparx5.c clk: sparx5: Add Sparx5 SoC DPLL clock driver 2020-07-28 18:17:56 -07:00
clk-stm32f4.c Nothing changed in the clk framework core this time around. We did get 2021-09-02 14:17:24 -07:00
clk-stm32h7.c clk: stm32h7: Switch to clk_divider.determine_rate 2021-08-05 17:36:10 -07:00
clk-stm32mp1.c clk: stm32mp1: Switch to clk_divider.determine_rate 2021-08-05 17:36:10 -07:00
clk-twl6040.c
clk-versaclock5.c clk: vc5: Add properties for configuring SD/OE behavior 2021-08-28 23:46:21 -07:00
clk-vt8500.c
clk-wm831x.c
clk-xgene.c clk: clk-xgene: Add description for 'mask' and fix formatting for 'flags' 2021-02-11 11:56:06 -08:00
clk.c clk: use clk_core_get_rate_recalc() in clk_rate_get() 2021-10-26 18:31:23 -07:00
clk.h clk: consoldiate the __clk_get_hw() declarations 2019-07-12 11:00:14 -07:00
clkdev.c clkdev: remove unused clkdev_alloc() interfaces 2021-06-08 17:00:09 +02:00
Kconfig clk: pistachio: Make it selectable for generic MIPS kernel 2021-08-12 16:01:49 +02:00
Makefile clk: pistachio: Make it selectable for generic MIPS kernel 2021-08-12 16:01:49 +02:00