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altera-ps-spi loads FPGA firmware over SPI, using the "passive serial" interface on Altera Arria 10, Cyclone V or Stratix V FPGAs. This is one of the simpler ways to set up an FPGA at runtime. The signal interface is close to unidirectional SPI with lsb first. Signed-off-by: Joshua Clayton <stillcompiling@gmail.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Alan Tull <atull@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
27 lines
963 B
Makefile
27 lines
963 B
Makefile
#
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# Makefile for the fpga framework and fpga manager drivers.
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#
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# Core FPGA Manager Framework
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obj-$(CONFIG_FPGA) += fpga-mgr.o
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# FPGA Manager Drivers
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obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI) += altera-ps-spi.o
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obj-$(CONFIG_FPGA_MGR_ICE40_SPI) += ice40-spi.o
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obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
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obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
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obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o
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obj-$(CONFIG_FPGA_MGR_XILINX_SPI) += xilinx-spi.o
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obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o
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obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o
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obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o
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# FPGA Bridge Drivers
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obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o
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obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE) += altera-hps2fpga.o altera-fpga2sdram.o
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obj-$(CONFIG_ALTERA_FREEZE_BRIDGE) += altera-freeze-bridge.o
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obj-$(CONFIG_XILINX_PR_DECOUPLER) += xilinx-pr-decoupler.o
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# High Level Interfaces
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obj-$(CONFIG_FPGA_REGION) += fpga-region.o
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