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dt-bindings: iio: Add KX132ACR-LBZ accelerometer ROHM KX132ACR-LBZ is an accelerometer for industrial applications. It has a subset of KX022A functionalities, dropping support for tap, free fall and tilt detection engines. Also, the register interface is an exact subset of what is found on KX022A (except the WHO_AM_I register value). Add support for KX132ACR-LBZ. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Link: https://lore.kernel.org/r/272065b9f35b817aff86b7760ff1aaaaaaa969f5.1695879676.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
193 lines
5.0 KiB
C
193 lines
5.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) 2022 ROHM Semiconductors
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*
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* ROHM/KIONIX KX022A accelerometer driver
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*/
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#ifndef _KX022A_H_
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#define _KX022A_H_
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#include <linux/bits.h>
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#include <linux/regmap.h>
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#define KX022A_REG_WHO 0x0f
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#define KX022A_ID 0xc8
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#define KX132ACR_LBZ_ID 0xd8
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#define KX022A_REG_CNTL2 0x19
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#define KX022A_MASK_SRST BIT(7)
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#define KX022A_REG_CNTL 0x18
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#define KX022A_MASK_PC1 BIT(7)
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#define KX022A_MASK_RES BIT(6)
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#define KX022A_MASK_DRDY BIT(5)
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#define KX022A_MASK_GSEL GENMASK(4, 3)
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#define KX022A_GSEL_SHIFT 3
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#define KX022A_GSEL_2 0x0
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#define KX022A_GSEL_4 BIT(3)
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#define KX022A_GSEL_8 BIT(4)
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#define KX022A_GSEL_16 GENMASK(4, 3)
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#define KX022A_REG_INS2 0x13
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#define KX022A_MASK_INS2_DRDY BIT(4)
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#define KX122_MASK_INS2_WMI BIT(5)
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#define KX022A_REG_XHP_L 0x0
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#define KX022A_REG_XOUT_L 0x06
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#define KX022A_REG_YOUT_L 0x08
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#define KX022A_REG_ZOUT_L 0x0a
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#define KX022A_REG_COTR 0x0c
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#define KX022A_REG_TSCP 0x10
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#define KX022A_REG_INT_REL 0x17
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#define KX022A_REG_ODCNTL 0x1b
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#define KX022A_REG_BTS_WUF_TH 0x31
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#define KX022A_REG_MAN_WAKE 0x2c
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#define KX022A_REG_BUF_CNTL1 0x3a
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#define KX022A_MASK_WM_TH GENMASK(6, 0)
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#define KX022A_REG_BUF_CNTL2 0x3b
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#define KX022A_MASK_BUF_EN BIT(7)
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#define KX022A_MASK_BRES16 BIT(6)
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#define KX022A_REG_BUF_STATUS_1 0x3c
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#define KX022A_REG_BUF_STATUS_2 0x3d
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#define KX022A_REG_BUF_CLEAR 0x3e
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#define KX022A_REG_BUF_READ 0x3f
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#define KX022A_MASK_ODR GENMASK(3, 0)
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#define KX022A_ODR_SHIFT 3
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#define KX022A_FIFO_MAX_WMI_TH 41
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#define KX022A_REG_INC1 0x1c
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#define KX022A_REG_INC5 0x20
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#define KX022A_REG_INC6 0x21
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#define KX022A_MASK_IEN BIT(5)
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#define KX022A_MASK_IPOL BIT(4)
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#define KX022A_IPOL_LOW 0
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#define KX022A_IPOL_HIGH KX022A_MASK_IPOL1
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#define KX022A_MASK_ITYP BIT(3)
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#define KX022A_ITYP_PULSE KX022A_MASK_ITYP
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#define KX022A_ITYP_LEVEL 0
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#define KX022A_REG_INC4 0x1f
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#define KX022A_MASK_WMI BIT(5)
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#define KX022A_REG_SELF_TEST 0x60
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#define KX022A_MAX_REGISTER 0x60
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#define KX132_REG_WHO 0x13
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#define KX132_ID 0x3d
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#define KX132_FIFO_LENGTH 86
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#define KX132_REG_CNTL 0x1b
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#define KX132_REG_CNTL2 0x1c
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#define KX132_REG_CNTL5 0x1f
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#define KX132_MASK_RES BIT(6)
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#define KX132_GSEL_2 0x0
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#define KX132_GSEL_4 BIT(3)
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#define KX132_GSEL_8 BIT(4)
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#define KX132_GSEL_16 GENMASK(4, 3)
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#define KX132_REG_INS2 0x17
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#define KX132_MASK_INS2_WMI BIT(5)
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#define KX132_REG_XADP_L 0x02
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#define KX132_REG_XOUT_L 0x08
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#define KX132_REG_YOUT_L 0x0a
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#define KX132_REG_ZOUT_L 0x0c
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#define KX132_REG_COTR 0x12
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#define KX132_REG_TSCP 0x14
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#define KX132_REG_INT_REL 0x1a
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#define KX132_REG_ODCNTL 0x21
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#define KX132_REG_BTS_WUF_TH 0x4a
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#define KX132_REG_BUF_CNTL1 0x5e
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#define KX132_REG_BUF_CNTL2 0x5f
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#define KX132_REG_BUF_STATUS_1 0x60
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#define KX132_REG_BUF_STATUS_2 0x61
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#define KX132_MASK_BUF_SMP_LVL GENMASK(9, 0)
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#define KX132_REG_BUF_CLEAR 0x62
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#define KX132_REG_BUF_READ 0x63
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#define KX132_ODR_SHIFT 3
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#define KX132_FIFO_MAX_WMI_TH 86
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#define KX132_REG_INC1 0x22
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#define KX132_REG_INC5 0x26
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#define KX132_REG_INC6 0x27
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#define KX132_IPOL_LOW 0
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#define KX132_IPOL_HIGH KX022A_MASK_IPOL
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#define KX132_ITYP_PULSE KX022A_MASK_ITYP
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#define KX132_REG_INC4 0x25
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#define KX132_REG_SELF_TEST 0x5d
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#define KX132_MAX_REGISTER 0x76
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struct device;
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struct kx022a_data;
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/**
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* struct kx022a_chip_info - Kionix accelerometer chip specific information
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*
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* @name: name of the device
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* @regmap_config: pointer to register map configuration
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* @channels: pointer to iio_chan_spec array
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* @num_channels: number of iio_chan_spec channels
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* @fifo_length: number of 16-bit samples in a full buffer
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* @buf_smp_lvl_mask: buffer sample level mask
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* @who: WHO_AM_I register
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* @id: WHO_AM_I register value
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* @cntl: control register 1
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* @cntl2: control register 2
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* @odcntl: output data control register
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* @buf_cntl1: buffer control register 1
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* @buf_cntl2: buffer control register 2
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* @buf_clear: buffer clear register
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* @buf_status1: buffer status register 1
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* @buf_read: buffer read register
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* @inc1: interrupt control register 1
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* @inc4: interrupt control register 4
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* @inc5: interrupt control register 5
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* @inc6: interrupt control register 6
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* @xout_l: x-axis output least significant byte
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* @get_fifo_bytes_available: function pointer to get amount of acceleration
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* data bytes currently stored in the sensor's FIFO
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* buffer
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*/
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struct kx022a_chip_info {
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const char *name;
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const struct regmap_config *regmap_config;
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const struct iio_chan_spec *channels;
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unsigned int num_channels;
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unsigned int fifo_length;
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u16 buf_smp_lvl_mask;
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u8 who;
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u8 id;
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u8 cntl;
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u8 cntl2;
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u8 odcntl;
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u8 buf_cntl1;
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u8 buf_cntl2;
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u8 buf_clear;
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u8 buf_status1;
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u8 buf_read;
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u8 inc1;
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u8 inc4;
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u8 inc5;
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u8 inc6;
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u8 xout_l;
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int (*get_fifo_bytes_available)(struct kx022a_data *);
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};
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int kx022a_probe_internal(struct device *dev, const struct kx022a_chip_info *chip_info);
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extern const struct kx022a_chip_info kx022a_chip_info;
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extern const struct kx022a_chip_info kx132_chip_info;
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extern const struct kx022a_chip_info kx132acr_chip_info;
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#endif
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