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Add a driver to setup the USB phy on Mediatek/Ralink SoCs. The driver sets up power and host mode, but also needs to configure PHY registers for the MT7628 and MT7688. Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
25 lines
642 B
Makefile
25 lines
642 B
Makefile
#
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# Makefile for the phy drivers.
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#
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obj-$(CONFIG_GENERIC_PHY) += phy-core.o
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obj-$(CONFIG_PHY_LPC18XX_USB_OTG) += phy-lpc18xx-usb-otg.o
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obj-$(CONFIG_PHY_XGENE) += phy-xgene.o
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obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o
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obj-$(CONFIG_ARCH_SUNXI) += allwinner/
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obj-$(CONFIG_ARCH_MESON) += amlogic/
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obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/
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obj-$(CONFIG_ARCH_RENESAS) += renesas/
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obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
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obj-$(CONFIG_ARCH_TEGRA) += tegra/
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obj-y += broadcom/ \
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hisilicon/ \
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marvell/ \
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motorola/ \
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qualcomm/ \
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ralink/ \
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samsung/ \
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st/ \
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ti/
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