mirror of
https://github.com/torvalds/linux.git
synced 2024-11-16 17:12:06 +00:00
8446be5d03
This commit implements the core of the platform code to enable suspend/resume on Armada XP. It registers the platform_suspend_ops structure, and implements the ->enter() hook of this structure. It is worth mentioning that this commit only provides the SoC-level part of suspend/resume, which calls into some board-specific code provided in a follow-up commit. The most important thing that this SoC-level code has to do is to build an in-memory structure that contains a magic number, the return address in the kernel after resume, and a set of address/value pairs. This structure is used by the bootloader to restore a certain number of registers (according to the set of address/value pairs) and then jump back into the kernel at the provided location. The code also puts the SDRAM into self-refresh mode, before calling into board-specific code to actually enter the suspend to RAM state. [ jac - add email exchange between Andrew Lunn and Thomas Petazzoni to better describe who consumes the address/value pairs ] > > Is this a well defined mechanism supported by mainline uboot, barebox > > etc. Or is it some Marvell extension to their uboot? > > As far as I know, it is a Marvell extension to their "binary header", > so it's done even before U-Boot starts. Since the hardware needs > assistance from the bootloader to do suspend/resume, there is > necessarily a certain amount of cooperation/agreement needed by what > the kernel does and what the bootloader expects. I'm not sure there's > any "standard" mechanism here. Do you know of any? > > I know the suspend/resume on the Blackfin architecture works the same > way (at least it used to work that way years ago when I did a bit of > Blackfin stuff). And here as well, there was some cooperation between > the kernel and the bootloader. See > arch/blackfin/mach-common/dpmc_modes.S, function do_hibernate() at the > end. > Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1416585613-2113-10-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
31 lines
935 B
C
31 lines
935 B
C
/*
|
|
* Core functions for Marvell System On Chip
|
|
*
|
|
* Copyright (C) 2012 Marvell
|
|
*
|
|
* Lior Amsalem <alior@marvell.com>
|
|
* Gregory CLEMENT <gregory.clement@free-electrons.com>
|
|
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
|
*
|
|
* This file is licensed under the terms of the GNU General Public
|
|
* License version 2. This program is licensed "as is" without any
|
|
* warranty of any kind, whether express or implied.
|
|
*/
|
|
|
|
#ifndef __ARCH_MVEBU_COMMON_H
|
|
#define __ARCH_MVEBU_COMMON_H
|
|
|
|
#include <linux/reboot.h>
|
|
|
|
void mvebu_restart(enum reboot_mode mode, const char *cmd);
|
|
int mvebu_cpu_reset_deassert(int cpu);
|
|
void mvebu_pmsu_set_cpu_boot_addr(int hw_cpu, void *boot_addr);
|
|
void mvebu_system_controller_set_cpu_boot_addr(void *boot_addr);
|
|
int mvebu_system_controller_get_soc_id(u32 *dev, u32 *rev);
|
|
|
|
void __iomem *mvebu_get_scu_base(void);
|
|
|
|
int mvebu_pm_init(void (*board_pm_enter)(void __iomem *sdram_reg, u32 srcmd));
|
|
|
|
#endif
|