Dave Jiang 529c0a4404 cxl: Export QTG ids from CFMWS to sysfs as qos_class attribute ... Export the QoS Throttling Group ID from the CXL Fixed Memory Window Structure (CFMWS) under the root decoder sysfs attributes as qos_class. CXL rev3.0 9.17.1.3 CXL Fixed Memory Window Structure (CFMWS) cxl cli will use this id to match with the _DSM retrieved id for a hot-plugged CXL memory device DPA memory range to make sure that the DPA range is under the right CFMWS window. Reviewed-by: Davidlohr Bueso <dave@stgolabs.net> Reviewed-by: Ira Weiny <ira.weiny@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/169713681699.2205276.14475306324720093079.stgit@djiang5-mobl3 Signed-off-by: Dan Williams <dan.j.williams@intel.com>		2023-10-27 20:48:02 -07:00
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core	cxl: Export QTG ids from CFMWS to sysfs as qos_class attribute	2023-10-27 20:48:02 -07:00
acpi.c	cxl: Export QTG ids from CFMWS to sysfs as qos_class attribute	2023-10-27 20:48:02 -07:00
cxl.h	cxl: Export QTG ids from CFMWS to sysfs as qos_class attribute	2023-10-27 20:48:02 -07:00
cxlmem.h	cxl/memdev: Only show sanitize sysfs files when supported	2023-07-28 13:16:54 -06:00
cxlpci.h	cxl/pci: Find and register CXL PMU devices	2023-05-30 11:20:35 -07:00
Kconfig	cxl: fix CONFIG_FW_LOADER dependency	2023-07-14 14:32:22 -06:00
Makefile	cxl/pmem: Introduce nvdimm_security_ops with ->get_flags() operation	2022-11-30 16:30:47 -08:00
mem.c	Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxl	2023-06-25 18:56:13 -07:00
pci.c	cxl/pci: Replace host_bridge->native_aer with pcie_aer_is_native()	2023-09-11 15:24:30 -07:00
pmem.c	cxl/mbox: Move mailbox related driver state to its own data structure	2023-06-25 14:31:08 -07:00
pmu.h	cxl/pci: Find and register CXL PMU devices	2023-05-30 11:20:35 -07:00
port.c	Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxl	2023-06-25 18:56:13 -07:00
security.c	Merge branch 'for-6.5/cxl-type-2' into for-6.5/cxl	2023-06-25 17:16:51 -07:00