linux/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt
Rich Felker a9da291f25 dt-bindings: irqchip: Add J-Core interrupt controller bindings
Signed-off-by: Rich Felker <dalias@libc.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/c8aae4597153595cf965efe96422f699639c9d51.147018b6529.git.dalias@libc.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2016-08-08 20:26:16 +00:00

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J-Core Advanced Interrupt Controller
Required properties:
- compatible: Should be "jcore,aic1" for the (obsolete) first-generation aic
with 8 interrupt lines with programmable priorities, or "jcore,aic2" for
the "aic2" core with 64 interrupts.
- reg: Memory region(s) for configuration. For SMP, there should be one
region per cpu, indexed by the sequential, zero-based hardware cpu
number.
- interrupt-controller: Identifies the node as an interrupt controller
- #interrupt-cells: Specifies the number of cells needed to encode an
interrupt source. The value shall be 1.
Example:
aic: interrupt-controller@200 {
compatible = "jcore,aic2";
reg = < 0x200 0x30 0x500 0x30 >;
interrupt-controller;
#interrupt-cells = <1>;
};