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56942fec06
The current timer-based delay loop relies on the architected timer to initiate the switch away from the polling-based implementation. This is unfortunate for platforms without the architected timers but with a suitable delay source (that is, constant frequency, always powered-up and ticking as long as the CPUs are online). This patch introduces a registration mechanism for the delay timer (which provides an unconditional read_current_timer implementation) and updates the architected timer code to use the new interface. Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Jonathan Austin <jonathan.austin@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
29 lines
519 B
C
29 lines
519 B
C
#ifndef __ASMARM_ARCH_TIMER_H
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#define __ASMARM_ARCH_TIMER_H
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#include <asm/errno.h>
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#include <linux/clocksource.h>
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#ifdef CONFIG_ARM_ARCH_TIMER
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int arch_timer_of_register(void);
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int arch_timer_sched_clock_init(void);
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struct timecounter *arch_timer_get_timecounter(void);
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#else
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static inline int arch_timer_of_register(void)
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{
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return -ENXIO;
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}
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static inline int arch_timer_sched_clock_init(void)
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{
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return -ENXIO;
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}
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static inline struct timecounter *arch_timer_get_timecounter(void)
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{
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return NULL;
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}
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#endif
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#endif
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