linux/Documentation/arch
Anshuman Khandual 4aff040bcc coresight: etm: Override TRCIDR3.CCITMIN on errata affected cpus
This work arounds errata 1490853 on Cortex-A76, and Neoverse-N1, errata
1491015 on Cortex-A77, errata 1502854 on Cortex-X1, and errata 1619801 on
Neoverse-V1, based affected cpus, where software read for TRCIDR3.CCITMIN
field in ETM gets an wrong value.

If software uses the value returned by the TRCIDR3.CCITMIN register field,
then it will limit the range which could be used for programming the ETM.
In reality, the ETM could be programmed with a much smaller value than what
is indicated by the TRCIDR3.CCITMIN field and still function correctly.

If software reads the TRCIDR3.CCITMIN register field, corresponding to the
instruction trace counting minimum threshold, observe the value 0x100 or a
minimum cycle count threshold of 256. The correct value should be 0x4 or a
minimum cycle count threshold of 4.

This work arounds the problem via storing 4 in drvdata->ccitmin on affected
systems where the TRCIDR3.CCITMIN has been 256, thus preserving cycle count
threshold granularity.

These errata information has been updated in Documentation/arch/arm64/silicon-errata.rst,
but without their corresponding configs because these have been implemented
directly in the driver.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: James Clark <james.clark@arm.com>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: linux-doc@vger.kernel.org
Cc: coresight@lists.linaro.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
[ Fixed location of silicon-errata.rst in commit description ]
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230921033631.1298723-2-anshuman.khandual@arm.com
2023-11-16 11:35:01 +00:00
..
arc
arm Documentation: Fix typos 2023-08-18 11:29:03 -06:00
arm64 coresight: etm: Override TRCIDR3.CCITMIN on errata affected cpus 2023-11-16 11:35:01 +00:00
loongarch docs/LoongArch: Update the links of ABI 2023-09-20 14:26:29 +08:00
m68k
mips docs: move mips under arch 2023-08-18 11:03:52 -06:00
nios2
openrisc Documentation: Fix typos 2023-08-18 11:29:03 -06:00
parisc
powerpc powerpc updates for 6.7 2023-11-03 10:07:39 -10:00
riscv RISC-V Patches for the 6.7 Merge Window, Part 2 2023-11-10 09:23:17 -08:00
s390 Documentation work keeps chugging along; stuff for 6.6 includes: 2023-08-30 20:05:42 -07:00
sh sh: Remove superhyway bus support 2023-10-25 16:50:11 +02:00
sparc
x86 platform-drivers-x86 for v6.7-1 2023-10-31 17:53:00 -10:00
xtensa Documentation: Fix typos 2023-08-18 11:29:03 -06:00
index.rst The number of commits for documentation is not huge this time around, but 2023-11-01 17:11:41 -10:00