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4aa3b75c74
The Counter (CNTR) register is 24 bits wide, but we can have an
effective 25-bit count value by setting bit 24 to the XOR of the Borrow
flag and Carry flag. The flags can be read from the FLAG register, but a
race condition exists: the Borrow flag and Carry flag are instantaneous
and could change by the time the count value is read from the CNTR
register.
Since the race condition could result in an incorrect 25-bit count
value, remove support for 25-bit count values from this driver;
hard-coded maximum count values are replaced by a LS7267_CNTR_MAX define
for consistency and clarity.
Fixes:
|
||
|---|---|---|
| .. | ||
| 104-quad-8.c | ||
| counter-chrdev.c | ||
| counter-chrdev.h | ||
| counter-core.c | ||
| counter-sysfs.c | ||
| counter-sysfs.h | ||
| ftm-quaddec.c | ||
| intel-qep.c | ||
| interrupt-cnt.c | ||
| Kconfig | ||
| Makefile | ||
| microchip-tcb-capture.c | ||
| stm32-lptimer-cnt.c | ||
| stm32-timer-cnt.c | ||
| ti-ecap-capture.c | ||
| ti-eqep.c | ||