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linux/arch/riscv/kvm
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Anup Patel 8e936e9871 RISC-V: KVM: Fix APLIC in_clrip[x] read emulation 
The reads to APLIC in_clrip[x] registers returns rectified input values
of the interrupt sources.

A rectified input value of an interrupt source is defined by the section
"4.5.2 Source configurations (sourcecfg[1]–sourcecfg[1023])" of the
RISC-V AIA specification as:

    rectified input value = (incoming wire value) XOR (source is inverted)

Update the riscv_aplic_input() implementation to match the above.

Cc: stable@vger.kernel.org
Fixes: 74967aa208 ("RISC-V: KVM: Add in-kernel emulation of AIA APLIC")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20240321085041.1955293-3-apatel@ventanamicro.com
2024-03-26 09:40:55 +05:30
..
aia_aplic.c RISC-V: KVM: Fix APLIC in_clrip[x] read emulation 2024-03-26 09:40:55 +05:30
aia_device.c RISC-V: KVM: Remove unneeded semicolon 2023-06-20 10:48:38 +05:30
aia_imsic.c RISCV: KVM: update external interrupt atomically for IMSIC swfile 2023-12-13 11:59:52 +05:30
aia.c riscv: Rearrange hwcap.h and cpufeature.h 2023-11-09 10:15:51 -08:00
Kconfig kvm: replace __KVM_HAVE_READONLY_MEM with Kconfig symbol 2024-02-08 08:41:06 -05:00
main.c riscv: Rearrange hwcap.h and cpufeature.h 2023-11-09 10:15:51 -08:00
Makefile RISC-V: KVM: Add SBI STA extension skeleton 2023-12-30 11:26:20 +05:30
mmu.c riscv: Use accessors to page table entries instead of direct dereference 2023-12-20 10:48:15 -08:00
tlb.c riscv: Rearrange hwcap.h and cpufeature.h 2023-11-09 10:15:51 -08:00
vcpu_exit.c RISC-V: KVM: Redirect AMO load/store misaligned traps to guest 2023-06-06 09:04:11 +05:30
vcpu_fp.c riscv: Rearrange hwcap.h and cpufeature.h 2023-11-09 10:15:51 -08:00
vcpu_insn.c RISC-V: KVM: Forward SEED CSR access to user space 2024-03-06 20:53:32 +05:30
vcpu_onereg.c RISC-V: KVM: Remove second semicolon 2024-03-25 14:16:28 +05:30
vcpu_pmu.c RISC-V: KVM: Support firmware events 2023-02-07 20:36:06 +05:30
vcpu_sbi_base.c RISC-V: KVM: Add ONE_REG interface to enable/disable SBI extensions 2023-04-21 17:38:44 +05:30
vcpu_sbi_hsm.c RISC-V: KVM: Modify SBI extension handler to return SBI error code 2023-02-07 20:35:45 +05:30
vcpu_sbi_pmu.c RISC-V: KVM: Add SBI PMU extension support 2023-02-07 20:35:53 +05:30
vcpu_sbi_replace.c RISC-V: KVM: Make SBI uapi consistent with ISA uapi 2023-12-29 12:31:44 +05:30
vcpu_sbi_sta.c RISC-V: KVM: Use correct restricted types 2024-02-09 11:53:13 +05:30
vcpu_sbi_v01.c RISC-V: KVM: Modify SBI extension handler to return SBI error code 2023-02-07 20:35:45 +05:30
vcpu_sbi.c RISC-V: KVM: Add support for SBI STA registers 2023-12-30 11:26:35 +05:30
vcpu_switch.S riscv: kvm: use ".L" local labels in assembly when applicable 2023-12-29 12:31:33 +05:30
vcpu_timer.c RISC-V: KVM: do not EOPNOTSUPP in set KVM_REG_RISCV_TIMER_REG 2023-08-08 17:25:49 +05:30
vcpu_vector.c RISC-V: KVM: add 'vlenb' Vector CSR 2023-12-29 12:31:54 +05:30
vcpu.c RISC-V: KVM: Add SBI STA info to vcpu_arch 2023-12-30 11:26:26 +05:30
vm.c KVM: move KVM_CAP_DEVICE_CTRL to the generic check 2023-11-30 13:09:43 -08:00
vmid.c RISC-V: KVM: Drop the _MASK suffix from hgatp.VMID mask defines 2023-04-21 17:45:44 +05:30