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The documentation for this SOC only talks about two
registers regarding to the clocks:
* SYSC_REG_CPLL_CLKCFG0 - provides some information about
boostrapped refclock. PLL and dividers used for CPU and some
sort of BUS.
* SYSC_REG_CPLL_CLKCFG1 - a banch of gates to enable/disable
clocks for all or some ip cores.
Looking into driver code, and some openWRT patched there are
another frequencies which are used in some drivers (uart, sd...).
According to all of this information the clock plan for this
SoC is set as follows:
- Main top clock "xtal" from where all the rest of the world is
derived.
- CPU clock "cpu" derived from "xtal" frequencies and a bunch of
register reads and predividers.
- BUS clock "bus" derived from "cpu" and with (cpu / 4) MHz.
- Fixed clocks from "xtal":
* "50m": 50 MHz.
* "125m": 125 MHz.
* "150m": 150 MHz.
* "250m": 250 MHz.
* "270m": 270 MHz.
We also have a buch of gate clocks with their parents:
* "hsdma": "150m"
* "fe": "250m"
* "sp_divtx": "270m"
* "timer": "50m"
* "pcm": "270m"
* "pio": "50m"
* "gdma": "bus"
* "nand": "125m"
* "i2c": "50m"
* "i2s": "270m"
* "spi": "bus"
* "uart1": "50m"
* "uart2": "50m"
* "uart3": "50m"
* "eth": "50m"
* "pcie0": "125m"
* "pcie1": "125m"
* "pcie2": "125m"
* "crypto": "250m"
* "shxc": "50m"
With this information the clk driver will provide clock and gates
functionality from a a set of hardcoded clocks allowing to define
a nice device tree without fixed clocks.
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210410055059.13518-2-sergio.paracuellos@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
127 lines
4.9 KiB
Makefile
127 lines
4.9 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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# common clock types
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obj-$(CONFIG_HAVE_CLK) += clk-devres.o clk-bulk.o
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obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o
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obj-$(CONFIG_COMMON_CLK) += clk.o
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obj-$(CONFIG_COMMON_CLK) += clk-divider.o
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obj-$(CONFIG_COMMON_CLK) += clk-fixed-factor.o
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obj-$(CONFIG_COMMON_CLK) += clk-fixed-rate.o
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obj-$(CONFIG_COMMON_CLK) += clk-gate.o
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obj-$(CONFIG_COMMON_CLK) += clk-multiplier.o
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obj-$(CONFIG_COMMON_CLK) += clk-mux.o
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obj-$(CONFIG_COMMON_CLK) += clk-composite.o
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obj-$(CONFIG_COMMON_CLK) += clk-fractional-divider.o
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obj-$(CONFIG_COMMON_CLK) += clk-gpio.o
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ifeq ($(CONFIG_OF), y)
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obj-$(CONFIG_COMMON_CLK) += clk-conf.o
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endif
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# hardware specific clock types
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# please keep this section sorted lexicographically by file path name
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obj-$(CONFIG_MACH_ASM9260) += clk-asm9260.o
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obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN) += clk-axi-clkgen.o
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obj-$(CONFIG_ARCH_AXXIA) += clk-axm5516.o
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obj-$(CONFIG_COMMON_CLK_BD718XX) += clk-bd718x7.o
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obj-$(CONFIG_COMMON_CLK_BM1880) += clk-bm1880.o
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obj-$(CONFIG_COMMON_CLK_CDCE706) += clk-cdce706.o
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obj-$(CONFIG_COMMON_CLK_CDCE925) += clk-cdce925.o
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obj-$(CONFIG_ARCH_CLPS711X) += clk-clps711x.o
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obj-$(CONFIG_COMMON_CLK_CS2000_CP) += clk-cs2000-cp.o
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obj-$(CONFIG_ARCH_SPARX5) += clk-sparx5.o
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obj-$(CONFIG_COMMON_CLK_FIXED_MMIO) += clk-fixed-mmio.o
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obj-$(CONFIG_COMMON_CLK_FSL_FLEXSPI) += clk-fsl-flexspi.o
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obj-$(CONFIG_COMMON_CLK_FSL_SAI) += clk-fsl-sai.o
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obj-$(CONFIG_COMMON_CLK_GEMINI) += clk-gemini.o
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obj-$(CONFIG_COMMON_CLK_ASPEED) += clk-aspeed.o
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obj-$(CONFIG_MACH_ASPEED_G6) += clk-ast2600.o
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obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o
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obj-$(CONFIG_CLK_HSDK) += clk-hsdk-pll.o
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obj-$(CONFIG_COMMON_CLK_K210) += clk-k210.o
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obj-$(CONFIG_COMMON_CLK_LOCHNAGAR) += clk-lochnagar.o
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obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o
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obj-$(CONFIG_COMMON_CLK_MAX9485) += clk-max9485.o
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obj-$(CONFIG_ARCH_MILBEAUT_M10V) += clk-milbeaut.o
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obj-$(CONFIG_ARCH_MOXART) += clk-moxart.o
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obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o
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obj-$(CONFIG_ARCH_NPCM7XX) += clk-npcm7xx.o
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obj-$(CONFIG_ARCH_NSPIRE) += clk-nspire.o
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obj-$(CONFIG_COMMON_CLK_OXNAS) += clk-oxnas.o
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obj-$(CONFIG_COMMON_CLK_PALMAS) += clk-palmas.o
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obj-$(CONFIG_CLK_LS1028A_PLLDIG) += clk-plldig.o
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obj-$(CONFIG_COMMON_CLK_PWM) += clk-pwm.o
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obj-$(CONFIG_CLK_QORIQ) += clk-qoriq.o
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obj-$(CONFIG_COMMON_CLK_RK808) += clk-rk808.o
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obj-$(CONFIG_COMMON_CLK_HI655X) += clk-hi655x.o
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obj-$(CONFIG_COMMON_CLK_S2MPS11) += clk-s2mps11.o
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obj-$(CONFIG_COMMON_CLK_SCMI) += clk-scmi.o
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obj-$(CONFIG_COMMON_CLK_SCPI) += clk-scpi.o
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obj-$(CONFIG_COMMON_CLK_SI5341) += clk-si5341.o
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obj-$(CONFIG_COMMON_CLK_SI5351) += clk-si5351.o
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obj-$(CONFIG_COMMON_CLK_SI514) += clk-si514.o
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obj-$(CONFIG_COMMON_CLK_SI544) += clk-si544.o
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obj-$(CONFIG_COMMON_CLK_SI570) += clk-si570.o
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obj-$(CONFIG_COMMON_CLK_STM32F) += clk-stm32f4.o
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obj-$(CONFIG_COMMON_CLK_STM32H7) += clk-stm32h7.o
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obj-$(CONFIG_COMMON_CLK_STM32MP157) += clk-stm32mp1.o
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obj-$(CONFIG_CLK_TWL6040) += clk-twl6040.o
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obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o
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obj-$(CONFIG_COMMON_CLK_VC5) += clk-versaclock5.o
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obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
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obj-$(CONFIG_COMMON_CLK_XGENE) += clk-xgene.o
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# please keep this section sorted lexicographically by directory path name
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obj-y += actions/
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obj-y += analogbits/
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obj-$(CONFIG_COMMON_CLK_AT91) += at91/
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obj-$(CONFIG_ARCH_ARTPEC) += axis/
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obj-$(CONFIG_ARC_PLAT_AXS10X) += axs10x/
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obj-$(CONFIG_CLK_BAIKAL_T1) += baikal-t1/
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obj-y += bcm/
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obj-$(CONFIG_ARCH_BERLIN) += berlin/
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obj-$(CONFIG_ARCH_DAVINCI) += davinci/
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obj-$(CONFIG_H8300) += h8300/
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obj-$(CONFIG_ARCH_HISI) += hisilicon/
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obj-y += imgtec/
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obj-y += imx/
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obj-y += ingenic/
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obj-$(CONFIG_ARCH_K3) += keystone/
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obj-$(CONFIG_ARCH_KEYSTONE) += keystone/
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obj-$(CONFIG_MACH_LOONGSON32) += loongson1/
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obj-y += mediatek/
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obj-$(CONFIG_ARCH_MESON) += meson/
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obj-$(CONFIG_MACH_PIC32) += microchip/
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ifeq ($(CONFIG_COMMON_CLK), y)
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obj-$(CONFIG_ARCH_MMP) += mmp/
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endif
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obj-y += mstar/
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obj-y += mvebu/
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obj-$(CONFIG_ARCH_MXS) += mxs/
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obj-$(CONFIG_COMMON_CLK_NXP) += nxp/
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obj-$(CONFIG_MACH_PISTACHIO) += pistachio/
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obj-$(CONFIG_COMMON_CLK_PXA) += pxa/
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obj-$(CONFIG_COMMON_CLK_QCOM) += qcom/
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obj-y += ralink/
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obj-y += renesas/
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obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
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obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/
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obj-$(CONFIG_CLK_SIFIVE) += sifive/
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obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/
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obj-$(CONFIG_ARCH_AGILEX) += socfpga/
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obj-$(CONFIG_ARCH_STRATIX10) += socfpga/
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obj-$(CONFIG_PLAT_SPEAR) += spear/
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obj-y += sprd/
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obj-$(CONFIG_ARCH_STI) += st/
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obj-$(CONFIG_ARCH_SUNXI) += sunxi/
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obj-$(CONFIG_SUNXI_CCU) += sunxi-ng/
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obj-$(CONFIG_ARCH_TEGRA) += tegra/
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obj-y += ti/
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obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
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obj-$(CONFIG_ARCH_U8500) += ux500/
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obj-y += versatile/
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ifeq ($(CONFIG_COMMON_CLK), y)
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obj-$(CONFIG_X86) += x86/
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endif
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obj-y += xilinx/
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obj-$(CONFIG_ARCH_ZYNQ) += zynq/
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obj-$(CONFIG_COMMON_CLK_ZYNQMP) += zynqmp/
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