mirror of
https://github.com/torvalds/linux.git
synced 2024-11-16 09:02:00 +00:00
be6d432172
on all at91 have the Advanced Interrupt Controller starts at address 0xfffff000 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
34 lines
1.0 KiB
ArmAsm
34 lines
1.0 KiB
ArmAsm
/*
|
|
* arch/arm/mach-at91/include/mach/entry-macro.S
|
|
*
|
|
* Copyright (C) 2003-2005 SAN People
|
|
*
|
|
* Low-level IRQ helper macros for AT91RM9200 platforms
|
|
*
|
|
* This file is licensed under the terms of the GNU General Public
|
|
* License version 2. This program is licensed "as is" without any
|
|
* warranty of any kind, whether express or implied.
|
|
*/
|
|
|
|
#include <mach/hardware.h>
|
|
#include <mach/at91_aic.h>
|
|
|
|
.macro disable_fiq
|
|
.endm
|
|
|
|
.macro get_irqnr_preamble, base, tmp
|
|
ldr \base, =at91_aic_base @ base virtual address of AIC peripheral
|
|
ldr \base, [\base]
|
|
.endm
|
|
|
|
.macro arch_ret_to_user, tmp1, tmp2
|
|
.endm
|
|
|
|
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
|
|
ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
|
|
ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number
|
|
teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt
|
|
streq \tmp, [\base, #AT91_AIC_EOICR] @ not going to be handled further, then ACK it now.
|
|
.endm
|
|
|