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Currently the PSP semaphore communication base address is discovered by using an MSR that is not architecturally guaranteed for future platforms. Also the mailbox that is utilized for communication with the PSP may have other consumers in the kernel, so it's better to make all communication go through a single driver. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Mark Hasemeyer <markhas@chromium.org> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Mark Hasemeyer <markhas@chromium.org> Acked-by: Wolfram Sang <wsa@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
508 lines
11 KiB
C
508 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Synopsys DesignWare I2C adapter driver.
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*
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* Based on the TI DAVINCI I2C adapter driver.
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*
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* Copyright (C) 2006 Texas Instruments.
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* Copyright (C) 2007 MontaVista Software Inc.
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* Copyright (C) 2009 Provigent Ltd.
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*/
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#include <linux/acpi.h>
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#include <linux/clk-provider.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/dmi.h>
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#include <linux/err.h>
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#include <linux/errno.h>
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/pm_runtime.h>
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#include <linux/property.h>
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#include <linux/regmap.h>
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#include <linux/reset.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/suspend.h>
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#include <linux/units.h>
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#include "i2c-designware-core.h"
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static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
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{
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return clk_get_rate(dev->clk) / KILO;
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}
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#ifdef CONFIG_ACPI
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static const struct acpi_device_id dw_i2c_acpi_match[] = {
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{ "INT33C2", 0 },
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{ "INT33C3", 0 },
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{ "INT3432", 0 },
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{ "INT3433", 0 },
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{ "80860F41", ACCESS_NO_IRQ_SUSPEND },
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{ "808622C1", ACCESS_NO_IRQ_SUSPEND },
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{ "AMD0010", ACCESS_INTR_MASK },
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{ "AMDI0010", ACCESS_INTR_MASK },
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{ "AMDI0019", ACCESS_INTR_MASK | ARBITRATION_SEMAPHORE },
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{ "AMDI0510", 0 },
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{ "APMC0D0F", 0 },
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{ "HISI02A1", 0 },
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{ "HISI02A2", 0 },
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{ "HISI02A3", 0 },
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{ "HYGO0010", ACCESS_INTR_MASK },
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{ }
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};
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MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
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#endif
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#ifdef CONFIG_OF
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#define BT1_I2C_CTL 0x100
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#define BT1_I2C_CTL_ADDR_MASK GENMASK(7, 0)
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#define BT1_I2C_CTL_WR BIT(8)
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#define BT1_I2C_CTL_GO BIT(31)
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#define BT1_I2C_DI 0x104
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#define BT1_I2C_DO 0x108
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static int bt1_i2c_read(void *context, unsigned int reg, unsigned int *val)
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{
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struct dw_i2c_dev *dev = context;
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int ret;
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/*
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* Note these methods shouldn't ever fail because the system controller
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* registers are memory mapped. We check the return value just in case.
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*/
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ret = regmap_write(dev->sysmap, BT1_I2C_CTL,
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BT1_I2C_CTL_GO | (reg & BT1_I2C_CTL_ADDR_MASK));
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if (ret)
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return ret;
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return regmap_read(dev->sysmap, BT1_I2C_DO, val);
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}
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static int bt1_i2c_write(void *context, unsigned int reg, unsigned int val)
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{
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struct dw_i2c_dev *dev = context;
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int ret;
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ret = regmap_write(dev->sysmap, BT1_I2C_DI, val);
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if (ret)
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return ret;
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return regmap_write(dev->sysmap, BT1_I2C_CTL,
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BT1_I2C_CTL_GO | BT1_I2C_CTL_WR | (reg & BT1_I2C_CTL_ADDR_MASK));
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}
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static struct regmap_config bt1_i2c_cfg = {
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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.fast_io = true,
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.reg_read = bt1_i2c_read,
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.reg_write = bt1_i2c_write,
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.max_register = DW_IC_COMP_TYPE,
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};
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static int bt1_i2c_request_regs(struct dw_i2c_dev *dev)
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{
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dev->sysmap = syscon_node_to_regmap(dev->dev->of_node->parent);
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if (IS_ERR(dev->sysmap))
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return PTR_ERR(dev->sysmap);
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dev->map = devm_regmap_init(dev->dev, NULL, dev, &bt1_i2c_cfg);
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return PTR_ERR_OR_ZERO(dev->map);
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}
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#define MSCC_ICPU_CFG_TWI_DELAY 0x0
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#define MSCC_ICPU_CFG_TWI_DELAY_ENABLE BIT(0)
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#define MSCC_ICPU_CFG_TWI_SPIKE_FILTER 0x4
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static int mscc_twi_set_sda_hold_time(struct dw_i2c_dev *dev)
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{
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writel((dev->sda_hold_time << 1) | MSCC_ICPU_CFG_TWI_DELAY_ENABLE,
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dev->ext + MSCC_ICPU_CFG_TWI_DELAY);
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return 0;
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}
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static int dw_i2c_of_configure(struct platform_device *pdev)
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{
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struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
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switch (dev->flags & MODEL_MASK) {
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case MODEL_MSCC_OCELOT:
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dev->ext = devm_platform_ioremap_resource(pdev, 1);
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if (!IS_ERR(dev->ext))
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dev->set_sda_hold_time = mscc_twi_set_sda_hold_time;
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break;
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default:
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break;
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}
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return 0;
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}
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static const struct of_device_id dw_i2c_of_match[] = {
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{ .compatible = "snps,designware-i2c", },
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{ .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT },
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{ .compatible = "baikal,bt1-sys-i2c", .data = (void *)MODEL_BAIKAL_BT1 },
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{},
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};
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MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
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#else
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static int bt1_i2c_request_regs(struct dw_i2c_dev *dev)
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{
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return -ENODEV;
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}
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static inline int dw_i2c_of_configure(struct platform_device *pdev)
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{
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return -ENODEV;
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}
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#endif
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static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev)
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{
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pm_runtime_disable(dev->dev);
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if (dev->shared_with_punit)
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pm_runtime_put_noidle(dev->dev);
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}
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static int dw_i2c_plat_request_regs(struct dw_i2c_dev *dev)
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{
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struct platform_device *pdev = to_platform_device(dev->dev);
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int ret;
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switch (dev->flags & MODEL_MASK) {
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case MODEL_BAIKAL_BT1:
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ret = bt1_i2c_request_regs(dev);
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break;
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default:
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dev->base = devm_platform_ioremap_resource(pdev, 0);
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ret = PTR_ERR_OR_ZERO(dev->base);
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break;
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}
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return ret;
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}
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static const struct dmi_system_id dw_i2c_hwmon_class_dmi[] = {
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{
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.ident = "Qtechnology QT5222",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Qtechnology"),
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DMI_MATCH(DMI_PRODUCT_NAME, "QT5222"),
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},
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},
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{ } /* terminate list */
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};
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static const struct i2c_dw_semaphore_callbacks i2c_dw_semaphore_cb_table[] = {
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#ifdef CONFIG_I2C_DESIGNWARE_BAYTRAIL
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{
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.probe = i2c_dw_baytrail_probe_lock_support,
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},
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#endif
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#ifdef CONFIG_I2C_DESIGNWARE_AMDPSP
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{
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.probe = i2c_dw_amdpsp_probe_lock_support,
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},
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#endif
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{}
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};
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static int i2c_dw_probe_lock_support(struct dw_i2c_dev *dev)
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{
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const struct i2c_dw_semaphore_callbacks *ptr;
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int i = 0;
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int ret;
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ptr = i2c_dw_semaphore_cb_table;
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dev->semaphore_idx = -1;
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while (ptr->probe) {
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ret = ptr->probe(dev);
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if (ret) {
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/*
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* If there is no semaphore device attached to this
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* controller, we shouldn't abort general i2c_controller
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* probe.
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*/
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if (ret != -ENODEV)
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return ret;
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i++;
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ptr++;
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continue;
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}
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dev->semaphore_idx = i;
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break;
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}
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return 0;
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}
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static void i2c_dw_remove_lock_support(struct dw_i2c_dev *dev)
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{
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if (dev->semaphore_idx < 0)
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return;
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if (i2c_dw_semaphore_cb_table[dev->semaphore_idx].remove)
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i2c_dw_semaphore_cb_table[dev->semaphore_idx].remove(dev);
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}
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static int dw_i2c_plat_probe(struct platform_device *pdev)
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{
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struct i2c_adapter *adap;
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struct dw_i2c_dev *dev;
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struct i2c_timings *t;
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int irq, ret;
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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return irq;
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dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
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if (!dev)
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return -ENOMEM;
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dev->flags = (uintptr_t)device_get_match_data(&pdev->dev);
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dev->dev = &pdev->dev;
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dev->irq = irq;
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platform_set_drvdata(pdev, dev);
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ret = dw_i2c_plat_request_regs(dev);
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if (ret)
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return ret;
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dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
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if (IS_ERR(dev->rst))
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return PTR_ERR(dev->rst);
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reset_control_deassert(dev->rst);
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t = &dev->timings;
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i2c_parse_fw_timings(&pdev->dev, t, false);
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i2c_dw_adjust_bus_speed(dev);
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if (pdev->dev.of_node)
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dw_i2c_of_configure(pdev);
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if (has_acpi_companion(&pdev->dev))
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i2c_dw_acpi_configure(&pdev->dev);
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ret = i2c_dw_validate_speed(dev);
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if (ret)
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goto exit_reset;
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ret = i2c_dw_probe_lock_support(dev);
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if (ret)
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goto exit_reset;
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i2c_dw_configure(dev);
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/* Optional interface clock */
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dev->pclk = devm_clk_get_optional(&pdev->dev, "pclk");
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if (IS_ERR(dev->pclk)) {
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ret = PTR_ERR(dev->pclk);
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goto exit_reset;
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}
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dev->clk = devm_clk_get_optional(&pdev->dev, NULL);
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if (IS_ERR(dev->clk)) {
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ret = PTR_ERR(dev->clk);
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goto exit_reset;
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}
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ret = i2c_dw_prepare_clk(dev, true);
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if (ret)
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goto exit_reset;
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if (dev->clk) {
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u64 clk_khz;
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dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
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clk_khz = dev->get_clk_rate_khz(dev);
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if (!dev->sda_hold_time && t->sda_hold_ns)
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dev->sda_hold_time =
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DIV_S64_ROUND_CLOSEST(clk_khz * t->sda_hold_ns, MICRO);
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}
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adap = &dev->adapter;
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adap->owner = THIS_MODULE;
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adap->class = dmi_check_system(dw_i2c_hwmon_class_dmi) ?
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I2C_CLASS_HWMON : I2C_CLASS_DEPRECATED;
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ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
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adap->dev.of_node = pdev->dev.of_node;
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adap->nr = -1;
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if (dev->flags & ACCESS_NO_IRQ_SUSPEND) {
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dev_pm_set_driver_flags(&pdev->dev,
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DPM_FLAG_SMART_PREPARE);
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} else {
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dev_pm_set_driver_flags(&pdev->dev,
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DPM_FLAG_SMART_PREPARE |
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DPM_FLAG_SMART_SUSPEND);
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}
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device_enable_async_suspend(&pdev->dev);
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/* The code below assumes runtime PM to be disabled. */
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WARN_ON(pm_runtime_enabled(&pdev->dev));
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pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
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pm_runtime_use_autosuspend(&pdev->dev);
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pm_runtime_set_active(&pdev->dev);
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if (dev->shared_with_punit)
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pm_runtime_get_noresume(&pdev->dev);
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pm_runtime_enable(&pdev->dev);
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ret = i2c_dw_probe(dev);
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if (ret)
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goto exit_probe;
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return ret;
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exit_probe:
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dw_i2c_plat_pm_cleanup(dev);
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exit_reset:
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reset_control_assert(dev->rst);
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return ret;
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}
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static int dw_i2c_plat_remove(struct platform_device *pdev)
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{
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struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
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pm_runtime_get_sync(&pdev->dev);
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i2c_del_adapter(&dev->adapter);
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dev->disable(dev);
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pm_runtime_dont_use_autosuspend(&pdev->dev);
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pm_runtime_put_sync(&pdev->dev);
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dw_i2c_plat_pm_cleanup(dev);
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i2c_dw_remove_lock_support(dev);
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reset_control_assert(dev->rst);
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return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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static int dw_i2c_plat_prepare(struct device *dev)
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{
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/*
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* If the ACPI companion device object is present for this device, it
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* may be accessed during suspend and resume of other devices via I2C
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* operation regions, so tell the PM core and middle layers to avoid
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* skipping system suspend/resume callbacks for it in that case.
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*/
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return !has_acpi_companion(dev);
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}
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#else
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#define dw_i2c_plat_prepare NULL
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#endif
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#ifdef CONFIG_PM
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static int dw_i2c_plat_runtime_suspend(struct device *dev)
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{
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struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
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if (i_dev->shared_with_punit)
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return 0;
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i_dev->disable(i_dev);
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i2c_dw_prepare_clk(i_dev, false);
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return 0;
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}
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static int __maybe_unused dw_i2c_plat_suspend(struct device *dev)
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{
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struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
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i2c_mark_adapter_suspended(&i_dev->adapter);
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return dw_i2c_plat_runtime_suspend(dev);
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}
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static int dw_i2c_plat_runtime_resume(struct device *dev)
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{
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struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
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if (!i_dev->shared_with_punit)
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i2c_dw_prepare_clk(i_dev, true);
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i_dev->init(i_dev);
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return 0;
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}
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static int __maybe_unused dw_i2c_plat_resume(struct device *dev)
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{
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struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
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dw_i2c_plat_runtime_resume(dev);
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i2c_mark_adapter_resumed(&i_dev->adapter);
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return 0;
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}
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static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
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.prepare = dw_i2c_plat_prepare,
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SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
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SET_RUNTIME_PM_OPS(dw_i2c_plat_runtime_suspend, dw_i2c_plat_runtime_resume, NULL)
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};
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#define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
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#else
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#define DW_I2C_DEV_PMOPS NULL
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#endif
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/* Work with hotplug and coldplug */
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MODULE_ALIAS("platform:i2c_designware");
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static struct platform_driver dw_i2c_driver = {
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.probe = dw_i2c_plat_probe,
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.remove = dw_i2c_plat_remove,
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.driver = {
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.name = "i2c_designware",
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.of_match_table = of_match_ptr(dw_i2c_of_match),
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.acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
|
|
.pm = DW_I2C_DEV_PMOPS,
|
|
},
|
|
};
|
|
|
|
static int __init dw_i2c_init_driver(void)
|
|
{
|
|
return platform_driver_register(&dw_i2c_driver);
|
|
}
|
|
subsys_initcall(dw_i2c_init_driver);
|
|
|
|
static void __exit dw_i2c_exit_driver(void)
|
|
{
|
|
platform_driver_unregister(&dw_i2c_driver);
|
|
}
|
|
module_exit(dw_i2c_exit_driver);
|
|
|
|
MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
|
|
MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
|
|
MODULE_LICENSE("GPL");
|