Suzuki K Poulose 46bf8d7cd8 coresight: etm4x: Safe access for TRCQCLTR ... ETM4x implements TRCQCLTR only when the Q elements are supported and the Q element filtering is supported (TRCIDR0.QFILT). Access to the register otherwise could be fatal. Fix this by tracking the availability, like the others. Fixes: f188b5e76a ("coresight: etm4x: Save/restore state across CPU low power states") Reported-by: Yabin Cui <yabinc@google.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Tested-by: Yabin Cui <yabinc@google.com> Link: https://lore.kernel.org/r/20240412142702.2882478-4-suzuki.poulose@arm.com		2024-04-22 11:23:51 +01:00
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coresight	coresight: etm4x: Safe access for TRCQCLTR	2024-04-22 11:23:51 +01:00
intel_th	Driver core changes for 6.3-rc1	2023-02-24 12:58:55 -08:00
ptt	hwtracing: hisi_ptt: Move type check to the beginning of hisi_ptt_pmu_event_init()	2024-02-26 09:54:38 +00:00
stm	- Daniel Verkamp has contributed a memfd series ("mm/memfd: add	2023-02-23 17:09:35 -08:00
Kconfig	hwtracing: hisi_ptt: Add trace function support for HiSilicon PCIe Tune and Trace device	2022-09-08 16:26:17 -06:00