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9575499dfe
The following bug happens when insmoding hp_sdc_mlc.ko: HP SDC MLC: Registering the System Domain Controller's HIL MLC. BUG: rwlock recursion on CPU#0, hotplug/1814, 00854734 Backtrace: [<10267560>] _raw_write_lock+0x50/0x88 [<10104008>] _write_lock_irqsave+0x14/0x24 [<008537d4>] hp_sdc_mlc_out+0x38/0x25c [hp_sdc_mlc] [<0084ebd8>] hilse_donode+0x308/0x470 [hil_mlc] [<0084ed80>] hil_mlcs_process+0x40/0x6c [hil_mlc] [<10130f80>] tasklet_action+0x78/0xb8 [<10130cec>] __do_softirq+0x60/0xcc [<1010428c>] __lock_text_end+0x38/0x48 [<10108348>] do_cpu_irq_mask+0xf0/0x11c [<1010b068>] intr_return+0x0/0xc Signed-off-by: Helge Deller <deller@gmx.de> Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
1015 lines
25 KiB
C
1015 lines
25 KiB
C
/*
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* HIL MLC state machine and serio interface driver
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*
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* Copyright (c) 2001 Brian S. Julin
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU General Public License ("GPL").
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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*
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* References:
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* HP-HIL Technical Reference Manual. Hewlett Packard Product No. 45918A
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*
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*
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* Driver theory of operation:
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*
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* Some access methods and an ISR is defined by the sub-driver
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* (e.g. hp_sdc_mlc.c). These methods are expected to provide a
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* few bits of logic in addition to raw access to the HIL MLC,
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* specifically, the ISR, which is entirely registered by the
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* sub-driver and invoked directly, must check for record
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* termination or packet match, at which point a semaphore must
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* be cleared and then the hil_mlcs_tasklet must be scheduled.
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*
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* The hil_mlcs_tasklet processes the state machine for all MLCs
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* each time it runs, checking each MLC's progress at the current
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* node in the state machine, and moving the MLC to subsequent nodes
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* in the state machine when appropriate. It will reschedule
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* itself if output is pending. (This rescheduling should be replaced
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* at some point with a sub-driver-specific mechanism.)
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*
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* A timer task prods the tasklet once per second to prevent
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* hangups when attached devices do not return expected data
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* and to initiate probes of the loop for new devices.
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*/
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#include <linux/hil_mlc.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/timer.h>
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#include <linux/list.h>
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MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>");
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MODULE_DESCRIPTION("HIL MLC serio");
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MODULE_LICENSE("Dual BSD/GPL");
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EXPORT_SYMBOL(hil_mlc_register);
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EXPORT_SYMBOL(hil_mlc_unregister);
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#define PREFIX "HIL MLC: "
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static LIST_HEAD(hil_mlcs);
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static DEFINE_RWLOCK(hil_mlcs_lock);
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static struct timer_list hil_mlcs_kicker;
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static int hil_mlcs_probe;
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static void hil_mlcs_process(unsigned long unused);
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DECLARE_TASKLET_DISABLED(hil_mlcs_tasklet, hil_mlcs_process, 0);
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/* #define HIL_MLC_DEBUG */
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/********************** Device info/instance management **********************/
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static void hil_mlc_clear_di_map(hil_mlc *mlc, int val)
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{
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int j;
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for (j = val; j < 7 ; j++)
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mlc->di_map[j] = -1;
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}
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static void hil_mlc_clear_di_scratch(hil_mlc *mlc)
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{
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memset(&mlc->di_scratch, 0, sizeof(mlc->di_scratch));
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}
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static void hil_mlc_copy_di_scratch(hil_mlc *mlc, int idx)
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{
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memcpy(&mlc->di[idx], &mlc->di_scratch, sizeof(mlc->di_scratch));
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}
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static int hil_mlc_match_di_scratch(hil_mlc *mlc)
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{
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int idx;
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for (idx = 0; idx < HIL_MLC_DEVMEM; idx++) {
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int j, found = 0;
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/* In-use slots are not eligible. */
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for (j = 0; j < 7 ; j++)
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if (mlc->di_map[j] == idx)
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found++;
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if (found)
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continue;
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if (!memcmp(mlc->di + idx, &mlc->di_scratch,
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sizeof(mlc->di_scratch)))
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break;
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}
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return idx >= HIL_MLC_DEVMEM ? -1 : idx;
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}
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static int hil_mlc_find_free_di(hil_mlc *mlc)
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{
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int idx;
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/* TODO: Pick all-zero slots first, failing that,
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* randomize the slot picked among those eligible.
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*/
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for (idx = 0; idx < HIL_MLC_DEVMEM; idx++) {
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int j, found = 0;
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for (j = 0; j < 7 ; j++)
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if (mlc->di_map[j] == idx)
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found++;
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if (!found)
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break;
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}
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return idx; /* Note: It is guaranteed at least one above will match */
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}
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static inline void hil_mlc_clean_serio_map(hil_mlc *mlc)
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{
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int idx;
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for (idx = 0; idx < HIL_MLC_DEVMEM; idx++) {
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int j, found = 0;
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for (j = 0; j < 7 ; j++)
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if (mlc->di_map[j] == idx)
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found++;
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if (!found)
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mlc->serio_map[idx].di_revmap = -1;
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}
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}
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static void hil_mlc_send_polls(hil_mlc *mlc)
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{
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int did, i, cnt;
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struct serio *serio;
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struct serio_driver *drv;
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i = cnt = 0;
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did = (mlc->ipacket[0] & HIL_PKT_ADDR_MASK) >> 8;
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serio = did ? mlc->serio[mlc->di_map[did - 1]] : NULL;
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drv = (serio != NULL) ? serio->drv : NULL;
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while (mlc->icount < 15 - i) {
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hil_packet p;
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p = mlc->ipacket[i];
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if (did != (p & HIL_PKT_ADDR_MASK) >> 8) {
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if (drv && drv->interrupt) {
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drv->interrupt(serio, 0, 0);
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drv->interrupt(serio, HIL_ERR_INT >> 16, 0);
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drv->interrupt(serio, HIL_PKT_CMD >> 8, 0);
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drv->interrupt(serio, HIL_CMD_POL + cnt, 0);
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}
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did = (p & HIL_PKT_ADDR_MASK) >> 8;
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serio = did ? mlc->serio[mlc->di_map[did-1]] : NULL;
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drv = (serio != NULL) ? serio->drv : NULL;
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cnt = 0;
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}
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cnt++;
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i++;
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if (drv && drv->interrupt) {
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drv->interrupt(serio, (p >> 24), 0);
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drv->interrupt(serio, (p >> 16) & 0xff, 0);
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drv->interrupt(serio, (p >> 8) & ~HIL_PKT_ADDR_MASK, 0);
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drv->interrupt(serio, p & 0xff, 0);
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}
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}
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}
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/*************************** State engine *********************************/
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#define HILSEN_SCHED 0x000100 /* Schedule the tasklet */
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#define HILSEN_BREAK 0x000200 /* Wait until next pass */
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#define HILSEN_UP 0x000400 /* relative node#, decrement */
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#define HILSEN_DOWN 0x000800 /* relative node#, increment */
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#define HILSEN_FOLLOW 0x001000 /* use retval as next node# */
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#define HILSEN_MASK 0x0000ff
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#define HILSEN_START 0
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#define HILSEN_RESTART 1
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#define HILSEN_DHR 9
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#define HILSEN_DHR2 10
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#define HILSEN_IFC 14
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#define HILSEN_HEAL0 16
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#define HILSEN_HEAL 18
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#define HILSEN_ACF 21
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#define HILSEN_ACF2 22
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#define HILSEN_DISC0 25
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#define HILSEN_DISC 27
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#define HILSEN_MATCH 40
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#define HILSEN_OPERATE 41
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#define HILSEN_PROBE 44
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#define HILSEN_DSR 52
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#define HILSEN_REPOLL 55
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#define HILSEN_IFCACF 58
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#define HILSEN_END 60
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#define HILSEN_NEXT (HILSEN_DOWN | 1)
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#define HILSEN_SAME (HILSEN_DOWN | 0)
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#define HILSEN_LAST (HILSEN_UP | 1)
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#define HILSEN_DOZE (HILSEN_SAME | HILSEN_SCHED | HILSEN_BREAK)
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#define HILSEN_SLEEP (HILSEN_SAME | HILSEN_BREAK)
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static int hilse_match(hil_mlc *mlc, int unused)
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{
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int rc;
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rc = hil_mlc_match_di_scratch(mlc);
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if (rc == -1) {
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rc = hil_mlc_find_free_di(mlc);
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if (rc == -1)
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goto err;
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#ifdef HIL_MLC_DEBUG
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printk(KERN_DEBUG PREFIX "new in slot %i\n", rc);
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#endif
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hil_mlc_copy_di_scratch(mlc, rc);
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mlc->di_map[mlc->ddi] = rc;
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mlc->serio_map[rc].di_revmap = mlc->ddi;
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hil_mlc_clean_serio_map(mlc);
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serio_rescan(mlc->serio[rc]);
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return -1;
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}
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mlc->di_map[mlc->ddi] = rc;
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#ifdef HIL_MLC_DEBUG
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printk(KERN_DEBUG PREFIX "same in slot %i\n", rc);
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#endif
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mlc->serio_map[rc].di_revmap = mlc->ddi;
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hil_mlc_clean_serio_map(mlc);
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return 0;
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err:
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printk(KERN_ERR PREFIX "Residual device slots exhausted, close some serios!\n");
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return 1;
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}
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/* An LCV used to prevent runaway loops, forces 5 second sleep when reset. */
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static int hilse_init_lcv(hil_mlc *mlc, int unused)
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{
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struct timeval tv;
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do_gettimeofday(&tv);
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if (mlc->lcv && (tv.tv_sec - mlc->lcv_tv.tv_sec) < 5)
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return -1;
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mlc->lcv_tv = tv;
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mlc->lcv = 0;
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return 0;
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}
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static int hilse_inc_lcv(hil_mlc *mlc, int lim)
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{
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return mlc->lcv++ >= lim ? -1 : 0;
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}
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#if 0
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static int hilse_set_lcv(hil_mlc *mlc, int val)
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{
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mlc->lcv = val;
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return 0;
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}
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#endif
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/* Management of the discovered device index (zero based, -1 means no devs) */
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static int hilse_set_ddi(hil_mlc *mlc, int val)
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{
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mlc->ddi = val;
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hil_mlc_clear_di_map(mlc, val + 1);
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return 0;
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}
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static int hilse_dec_ddi(hil_mlc *mlc, int unused)
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{
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mlc->ddi--;
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if (mlc->ddi <= -1) {
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mlc->ddi = -1;
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hil_mlc_clear_di_map(mlc, 0);
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return -1;
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}
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hil_mlc_clear_di_map(mlc, mlc->ddi + 1);
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return 0;
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}
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static int hilse_inc_ddi(hil_mlc *mlc, int unused)
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{
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BUG_ON(mlc->ddi >= 6);
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mlc->ddi++;
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return 0;
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}
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static int hilse_take_idd(hil_mlc *mlc, int unused)
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{
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int i;
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/* Help the state engine:
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* Is this a real IDD response or just an echo?
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*
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* Real IDD response does not start with a command.
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*/
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if (mlc->ipacket[0] & HIL_PKT_CMD)
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goto bail;
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/* Should have the command echoed further down. */
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for (i = 1; i < 16; i++) {
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if (((mlc->ipacket[i] & HIL_PKT_ADDR_MASK) ==
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(mlc->ipacket[0] & HIL_PKT_ADDR_MASK)) &&
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(mlc->ipacket[i] & HIL_PKT_CMD) &&
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((mlc->ipacket[i] & HIL_PKT_DATA_MASK) == HIL_CMD_IDD))
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break;
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}
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if (i > 15)
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goto bail;
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/* And the rest of the packets should still be clear. */
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while (++i < 16)
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if (mlc->ipacket[i])
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break;
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if (i < 16)
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goto bail;
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for (i = 0; i < 16; i++)
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mlc->di_scratch.idd[i] =
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mlc->ipacket[i] & HIL_PKT_DATA_MASK;
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/* Next step is to see if RSC supported */
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if (mlc->di_scratch.idd[1] & HIL_IDD_HEADER_RSC)
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return HILSEN_NEXT;
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if (mlc->di_scratch.idd[1] & HIL_IDD_HEADER_EXD)
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return HILSEN_DOWN | 4;
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return 0;
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bail:
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mlc->ddi--;
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return -1; /* This should send us off to ACF */
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}
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static int hilse_take_rsc(hil_mlc *mlc, int unused)
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{
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int i;
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for (i = 0; i < 16; i++)
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mlc->di_scratch.rsc[i] =
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mlc->ipacket[i] & HIL_PKT_DATA_MASK;
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/* Next step is to see if EXD supported (IDD has already been read) */
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if (mlc->di_scratch.idd[1] & HIL_IDD_HEADER_EXD)
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return HILSEN_NEXT;
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return 0;
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}
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static int hilse_take_exd(hil_mlc *mlc, int unused)
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{
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int i;
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for (i = 0; i < 16; i++)
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mlc->di_scratch.exd[i] =
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mlc->ipacket[i] & HIL_PKT_DATA_MASK;
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/* Next step is to see if RNM supported. */
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if (mlc->di_scratch.exd[0] & HIL_EXD_HEADER_RNM)
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return HILSEN_NEXT;
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return 0;
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}
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static int hilse_take_rnm(hil_mlc *mlc, int unused)
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{
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int i;
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for (i = 0; i < 16; i++)
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mlc->di_scratch.rnm[i] =
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mlc->ipacket[i] & HIL_PKT_DATA_MASK;
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printk(KERN_INFO PREFIX "Device name gotten: %16s\n",
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mlc->di_scratch.rnm);
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return 0;
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}
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static int hilse_operate(hil_mlc *mlc, int repoll)
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{
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if (mlc->opercnt == 0)
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hil_mlcs_probe = 0;
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mlc->opercnt = 1;
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hil_mlc_send_polls(mlc);
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if (!hil_mlcs_probe)
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return 0;
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hil_mlcs_probe = 0;
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mlc->opercnt = 0;
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return 1;
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}
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|
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#define FUNC(funct, funct_arg, zero_rc, neg_rc, pos_rc) \
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{ HILSE_FUNC, { .func = funct }, funct_arg, zero_rc, neg_rc, pos_rc },
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#define OUT(pack) \
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{ HILSE_OUT, { .packet = pack }, 0, HILSEN_NEXT, HILSEN_DOZE, 0 },
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#define CTS \
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{ HILSE_CTS, { .packet = 0 }, 0, HILSEN_NEXT | HILSEN_SCHED | HILSEN_BREAK, HILSEN_DOZE, 0 },
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#define EXPECT(comp, to, got, got_wrong, timed_out) \
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{ HILSE_EXPECT, { .packet = comp }, to, got, got_wrong, timed_out },
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#define EXPECT_LAST(comp, to, got, got_wrong, timed_out) \
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{ HILSE_EXPECT_LAST, { .packet = comp }, to, got, got_wrong, timed_out },
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#define EXPECT_DISC(comp, to, got, got_wrong, timed_out) \
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{ HILSE_EXPECT_DISC, { .packet = comp }, to, got, got_wrong, timed_out },
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#define IN(to, got, got_error, timed_out) \
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{ HILSE_IN, { .packet = 0 }, to, got, got_error, timed_out },
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#define OUT_DISC(pack) \
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{ HILSE_OUT_DISC, { .packet = pack }, 0, 0, 0, 0 },
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#define OUT_LAST(pack) \
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{ HILSE_OUT_LAST, { .packet = pack }, 0, 0, 0, 0 },
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const struct hilse_node hil_mlc_se[HILSEN_END] = {
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|
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/* 0 HILSEN_START */
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FUNC(hilse_init_lcv, 0, HILSEN_NEXT, HILSEN_SLEEP, 0)
|
|
|
|
/* 1 HILSEN_RESTART */
|
|
FUNC(hilse_inc_lcv, 10, HILSEN_NEXT, HILSEN_START, 0)
|
|
OUT(HIL_CTRL_ONLY) /* Disable APE */
|
|
CTS
|
|
|
|
#define TEST_PACKET(x) \
|
|
(HIL_PKT_CMD | (x << HIL_PKT_ADDR_SHIFT) | x << 4 | x)
|
|
|
|
OUT(HIL_DO_ALTER_CTRL | HIL_CTRL_TEST | TEST_PACKET(0x5))
|
|
EXPECT(HIL_ERR_INT | TEST_PACKET(0x5),
|
|
2000, HILSEN_NEXT, HILSEN_RESTART, HILSEN_RESTART)
|
|
OUT(HIL_DO_ALTER_CTRL | HIL_CTRL_TEST | TEST_PACKET(0xa))
|
|
EXPECT(HIL_ERR_INT | TEST_PACKET(0xa),
|
|
2000, HILSEN_NEXT, HILSEN_RESTART, HILSEN_RESTART)
|
|
OUT(HIL_CTRL_ONLY | 0) /* Disable test mode */
|
|
|
|
/* 9 HILSEN_DHR */
|
|
FUNC(hilse_init_lcv, 0, HILSEN_NEXT, HILSEN_SLEEP, 0)
|
|
|
|
/* 10 HILSEN_DHR2 */
|
|
FUNC(hilse_inc_lcv, 10, HILSEN_NEXT, HILSEN_START, 0)
|
|
FUNC(hilse_set_ddi, -1, HILSEN_NEXT, 0, 0)
|
|
OUT(HIL_PKT_CMD | HIL_CMD_DHR)
|
|
IN(300000, HILSEN_DHR2, HILSEN_DHR2, HILSEN_NEXT)
|
|
|
|
/* 14 HILSEN_IFC */
|
|
OUT(HIL_PKT_CMD | HIL_CMD_IFC)
|
|
EXPECT(HIL_PKT_CMD | HIL_CMD_IFC | HIL_ERR_INT,
|
|
20000, HILSEN_DISC, HILSEN_DHR2, HILSEN_NEXT )
|
|
|
|
/* If devices are there, they weren't in PUP or other loopback mode.
|
|
* We're more concerned at this point with restoring operation
|
|
* to devices than discovering new ones, so we try to salvage
|
|
* the loop configuration by closing off the loop.
|
|
*/
|
|
|
|
/* 16 HILSEN_HEAL0 */
|
|
FUNC(hilse_dec_ddi, 0, HILSEN_NEXT, HILSEN_ACF, 0)
|
|
FUNC(hilse_inc_ddi, 0, HILSEN_NEXT, 0, 0)
|
|
|
|
/* 18 HILSEN_HEAL */
|
|
OUT_LAST(HIL_CMD_ELB)
|
|
EXPECT_LAST(HIL_CMD_ELB | HIL_ERR_INT,
|
|
20000, HILSEN_REPOLL, HILSEN_DSR, HILSEN_NEXT)
|
|
FUNC(hilse_dec_ddi, 0, HILSEN_HEAL, HILSEN_NEXT, 0)
|
|
|
|
/* 21 HILSEN_ACF */
|
|
FUNC(hilse_init_lcv, 0, HILSEN_NEXT, HILSEN_DOZE, 0)
|
|
|
|
/* 22 HILSEN_ACF2 */
|
|
FUNC(hilse_inc_lcv, 10, HILSEN_NEXT, HILSEN_START, 0)
|
|
OUT(HIL_PKT_CMD | HIL_CMD_ACF | 1)
|
|
IN(20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_NEXT)
|
|
|
|
/* 25 HILSEN_DISC0 */
|
|
OUT_DISC(HIL_PKT_CMD | HIL_CMD_ELB)
|
|
EXPECT_DISC(HIL_PKT_CMD | HIL_CMD_ELB | HIL_ERR_INT,
|
|
20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR)
|
|
|
|
/* Only enter here if response just received */
|
|
/* 27 HILSEN_DISC */
|
|
OUT_DISC(HIL_PKT_CMD | HIL_CMD_IDD)
|
|
EXPECT_DISC(HIL_PKT_CMD | HIL_CMD_IDD | HIL_ERR_INT,
|
|
20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_START)
|
|
FUNC(hilse_inc_ddi, 0, HILSEN_NEXT, HILSEN_START, 0)
|
|
FUNC(hilse_take_idd, 0, HILSEN_MATCH, HILSEN_IFCACF, HILSEN_FOLLOW)
|
|
OUT_LAST(HIL_PKT_CMD | HIL_CMD_RSC)
|
|
EXPECT_LAST(HIL_PKT_CMD | HIL_CMD_RSC | HIL_ERR_INT,
|
|
30000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR)
|
|
FUNC(hilse_take_rsc, 0, HILSEN_MATCH, 0, HILSEN_FOLLOW)
|
|
OUT_LAST(HIL_PKT_CMD | HIL_CMD_EXD)
|
|
EXPECT_LAST(HIL_PKT_CMD | HIL_CMD_EXD | HIL_ERR_INT,
|
|
30000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR)
|
|
FUNC(hilse_take_exd, 0, HILSEN_MATCH, 0, HILSEN_FOLLOW)
|
|
OUT_LAST(HIL_PKT_CMD | HIL_CMD_RNM)
|
|
EXPECT_LAST(HIL_PKT_CMD | HIL_CMD_RNM | HIL_ERR_INT,
|
|
30000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR)
|
|
FUNC(hilse_take_rnm, 0, HILSEN_MATCH, 0, 0)
|
|
|
|
/* 40 HILSEN_MATCH */
|
|
FUNC(hilse_match, 0, HILSEN_NEXT, HILSEN_NEXT, /* TODO */ 0)
|
|
|
|
/* 41 HILSEN_OPERATE */
|
|
OUT(HIL_PKT_CMD | HIL_CMD_POL)
|
|
EXPECT(HIL_PKT_CMD | HIL_CMD_POL | HIL_ERR_INT,
|
|
20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_NEXT)
|
|
FUNC(hilse_operate, 0, HILSEN_OPERATE, HILSEN_IFC, HILSEN_NEXT)
|
|
|
|
/* 44 HILSEN_PROBE */
|
|
OUT_LAST(HIL_PKT_CMD | HIL_CMD_EPT)
|
|
IN(10000, HILSEN_DISC, HILSEN_DSR, HILSEN_NEXT)
|
|
OUT_DISC(HIL_PKT_CMD | HIL_CMD_ELB)
|
|
IN(10000, HILSEN_DISC, HILSEN_DSR, HILSEN_NEXT)
|
|
OUT(HIL_PKT_CMD | HIL_CMD_ACF | 1)
|
|
IN(10000, HILSEN_DISC0, HILSEN_DSR, HILSEN_NEXT)
|
|
OUT_LAST(HIL_PKT_CMD | HIL_CMD_ELB)
|
|
IN(10000, HILSEN_OPERATE, HILSEN_DSR, HILSEN_DSR)
|
|
|
|
/* 52 HILSEN_DSR */
|
|
FUNC(hilse_set_ddi, -1, HILSEN_NEXT, 0, 0)
|
|
OUT(HIL_PKT_CMD | HIL_CMD_DSR)
|
|
IN(20000, HILSEN_DHR, HILSEN_DHR, HILSEN_IFC)
|
|
|
|
/* 55 HILSEN_REPOLL */
|
|
OUT(HIL_PKT_CMD | HIL_CMD_RPL)
|
|
EXPECT(HIL_PKT_CMD | HIL_CMD_RPL | HIL_ERR_INT,
|
|
20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_NEXT)
|
|
FUNC(hilse_operate, 1, HILSEN_OPERATE, HILSEN_IFC, HILSEN_PROBE)
|
|
|
|
/* 58 HILSEN_IFCACF */
|
|
OUT(HIL_PKT_CMD | HIL_CMD_IFC)
|
|
EXPECT(HIL_PKT_CMD | HIL_CMD_IFC | HIL_ERR_INT,
|
|
20000, HILSEN_ACF2, HILSEN_DHR2, HILSEN_HEAL)
|
|
|
|
/* 60 HILSEN_END */
|
|
};
|
|
|
|
static inline void hilse_setup_input(hil_mlc *mlc, const struct hilse_node *node)
|
|
{
|
|
|
|
switch (node->act) {
|
|
case HILSE_EXPECT_DISC:
|
|
mlc->imatch = node->object.packet;
|
|
mlc->imatch |= ((mlc->ddi + 2) << HIL_PKT_ADDR_SHIFT);
|
|
break;
|
|
case HILSE_EXPECT_LAST:
|
|
mlc->imatch = node->object.packet;
|
|
mlc->imatch |= ((mlc->ddi + 1) << HIL_PKT_ADDR_SHIFT);
|
|
break;
|
|
case HILSE_EXPECT:
|
|
mlc->imatch = node->object.packet;
|
|
break;
|
|
case HILSE_IN:
|
|
mlc->imatch = 0;
|
|
break;
|
|
default:
|
|
BUG();
|
|
}
|
|
mlc->istarted = 1;
|
|
mlc->intimeout = node->arg;
|
|
do_gettimeofday(&(mlc->instart));
|
|
mlc->icount = 15;
|
|
memset(mlc->ipacket, 0, 16 * sizeof(hil_packet));
|
|
BUG_ON(down_trylock(&mlc->isem));
|
|
}
|
|
|
|
#ifdef HIL_MLC_DEBUG
|
|
static int doze;
|
|
static int seidx; /* For debug */
|
|
#endif
|
|
|
|
static int hilse_donode(hil_mlc *mlc)
|
|
{
|
|
const struct hilse_node *node;
|
|
int nextidx = 0;
|
|
int sched_long = 0;
|
|
unsigned long flags;
|
|
|
|
#ifdef HIL_MLC_DEBUG
|
|
if (mlc->seidx && mlc->seidx != seidx &&
|
|
mlc->seidx != 41 && mlc->seidx != 42 && mlc->seidx != 43) {
|
|
printk(KERN_DEBUG PREFIX "z%i \n {%i}", doze, mlc->seidx);
|
|
doze = 0;
|
|
}
|
|
|
|
seidx = mlc->seidx;
|
|
#endif
|
|
node = hil_mlc_se + mlc->seidx;
|
|
|
|
switch (node->act) {
|
|
int rc;
|
|
hil_packet pack;
|
|
|
|
case HILSE_FUNC:
|
|
BUG_ON(node->object.func == NULL);
|
|
rc = node->object.func(mlc, node->arg);
|
|
nextidx = (rc > 0) ? node->ugly :
|
|
((rc < 0) ? node->bad : node->good);
|
|
if (nextidx == HILSEN_FOLLOW)
|
|
nextidx = rc;
|
|
break;
|
|
|
|
case HILSE_EXPECT_LAST:
|
|
case HILSE_EXPECT_DISC:
|
|
case HILSE_EXPECT:
|
|
case HILSE_IN:
|
|
/* Already set up from previous HILSE_OUT_* */
|
|
write_lock_irqsave(&mlc->lock, flags);
|
|
rc = mlc->in(mlc, node->arg);
|
|
if (rc == 2) {
|
|
nextidx = HILSEN_DOZE;
|
|
sched_long = 1;
|
|
write_unlock_irqrestore(&mlc->lock, flags);
|
|
break;
|
|
}
|
|
if (rc == 1)
|
|
nextidx = node->ugly;
|
|
else if (rc == 0)
|
|
nextidx = node->good;
|
|
else
|
|
nextidx = node->bad;
|
|
mlc->istarted = 0;
|
|
write_unlock_irqrestore(&mlc->lock, flags);
|
|
break;
|
|
|
|
case HILSE_OUT_LAST:
|
|
write_lock_irqsave(&mlc->lock, flags);
|
|
pack = node->object.packet;
|
|
pack |= ((mlc->ddi + 1) << HIL_PKT_ADDR_SHIFT);
|
|
goto out;
|
|
|
|
case HILSE_OUT_DISC:
|
|
write_lock_irqsave(&mlc->lock, flags);
|
|
pack = node->object.packet;
|
|
pack |= ((mlc->ddi + 2) << HIL_PKT_ADDR_SHIFT);
|
|
goto out;
|
|
|
|
case HILSE_OUT:
|
|
write_lock_irqsave(&mlc->lock, flags);
|
|
pack = node->object.packet;
|
|
out:
|
|
if (mlc->istarted)
|
|
goto out2;
|
|
/* Prepare to receive input */
|
|
if ((node + 1)->act & HILSE_IN)
|
|
hilse_setup_input(mlc, node + 1);
|
|
|
|
out2:
|
|
write_unlock_irqrestore(&mlc->lock, flags);
|
|
|
|
if (down_trylock(&mlc->osem)) {
|
|
nextidx = HILSEN_DOZE;
|
|
break;
|
|
}
|
|
up(&mlc->osem);
|
|
|
|
write_lock_irqsave(&mlc->lock, flags);
|
|
if (!mlc->ostarted) {
|
|
mlc->ostarted = 1;
|
|
mlc->opacket = pack;
|
|
mlc->out(mlc);
|
|
nextidx = HILSEN_DOZE;
|
|
write_unlock_irqrestore(&mlc->lock, flags);
|
|
break;
|
|
}
|
|
mlc->ostarted = 0;
|
|
do_gettimeofday(&(mlc->instart));
|
|
write_unlock_irqrestore(&mlc->lock, flags);
|
|
nextidx = HILSEN_NEXT;
|
|
break;
|
|
|
|
case HILSE_CTS:
|
|
write_lock_irqsave(&mlc->lock, flags);
|
|
nextidx = mlc->cts(mlc) ? node->bad : node->good;
|
|
write_unlock_irqrestore(&mlc->lock, flags);
|
|
break;
|
|
|
|
default:
|
|
BUG();
|
|
}
|
|
|
|
#ifdef HIL_MLC_DEBUG
|
|
if (nextidx == HILSEN_DOZE)
|
|
doze++;
|
|
#endif
|
|
|
|
while (nextidx & HILSEN_SCHED) {
|
|
struct timeval tv;
|
|
|
|
if (!sched_long)
|
|
goto sched;
|
|
|
|
do_gettimeofday(&tv);
|
|
tv.tv_usec += USEC_PER_SEC * (tv.tv_sec - mlc->instart.tv_sec);
|
|
tv.tv_usec -= mlc->instart.tv_usec;
|
|
if (tv.tv_usec >= mlc->intimeout) goto sched;
|
|
tv.tv_usec = (mlc->intimeout - tv.tv_usec) * HZ / USEC_PER_SEC;
|
|
if (!tv.tv_usec) goto sched;
|
|
mod_timer(&hil_mlcs_kicker, jiffies + tv.tv_usec);
|
|
break;
|
|
sched:
|
|
tasklet_schedule(&hil_mlcs_tasklet);
|
|
break;
|
|
}
|
|
|
|
if (nextidx & HILSEN_DOWN)
|
|
mlc->seidx += nextidx & HILSEN_MASK;
|
|
else if (nextidx & HILSEN_UP)
|
|
mlc->seidx -= nextidx & HILSEN_MASK;
|
|
else
|
|
mlc->seidx = nextidx & HILSEN_MASK;
|
|
|
|
if (nextidx & HILSEN_BREAK)
|
|
return 1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/******************** tasklet context functions **************************/
|
|
static void hil_mlcs_process(unsigned long unused)
|
|
{
|
|
struct list_head *tmp;
|
|
|
|
read_lock(&hil_mlcs_lock);
|
|
list_for_each(tmp, &hil_mlcs) {
|
|
struct hil_mlc *mlc = list_entry(tmp, hil_mlc, list);
|
|
while (hilse_donode(mlc) == 0) {
|
|
#ifdef HIL_MLC_DEBUG
|
|
if (mlc->seidx != 41 &&
|
|
mlc->seidx != 42 &&
|
|
mlc->seidx != 43)
|
|
printk(KERN_DEBUG PREFIX " + ");
|
|
#endif
|
|
}
|
|
}
|
|
read_unlock(&hil_mlcs_lock);
|
|
}
|
|
|
|
/************************* Keepalive timer task *********************/
|
|
|
|
void hil_mlcs_timer(unsigned long data)
|
|
{
|
|
hil_mlcs_probe = 1;
|
|
tasklet_schedule(&hil_mlcs_tasklet);
|
|
/* Re-insert the periodic task. */
|
|
if (!timer_pending(&hil_mlcs_kicker))
|
|
mod_timer(&hil_mlcs_kicker, jiffies + HZ);
|
|
}
|
|
|
|
/******************** user/kernel context functions **********************/
|
|
|
|
static int hil_mlc_serio_write(struct serio *serio, unsigned char c)
|
|
{
|
|
struct hil_mlc_serio_map *map;
|
|
struct hil_mlc *mlc;
|
|
struct serio_driver *drv;
|
|
uint8_t *idx, *last;
|
|
|
|
map = serio->port_data;
|
|
BUG_ON(map == NULL);
|
|
|
|
mlc = map->mlc;
|
|
BUG_ON(mlc == NULL);
|
|
|
|
mlc->serio_opacket[map->didx] |=
|
|
((hil_packet)c) << (8 * (3 - mlc->serio_oidx[map->didx]));
|
|
|
|
if (mlc->serio_oidx[map->didx] >= 3) {
|
|
/* for now only commands */
|
|
if (!(mlc->serio_opacket[map->didx] & HIL_PKT_CMD))
|
|
return -EIO;
|
|
switch (mlc->serio_opacket[map->didx] & HIL_PKT_DATA_MASK) {
|
|
case HIL_CMD_IDD:
|
|
idx = mlc->di[map->didx].idd;
|
|
goto emu;
|
|
case HIL_CMD_RSC:
|
|
idx = mlc->di[map->didx].rsc;
|
|
goto emu;
|
|
case HIL_CMD_EXD:
|
|
idx = mlc->di[map->didx].exd;
|
|
goto emu;
|
|
case HIL_CMD_RNM:
|
|
idx = mlc->di[map->didx].rnm;
|
|
goto emu;
|
|
default:
|
|
break;
|
|
}
|
|
mlc->serio_oidx[map->didx] = 0;
|
|
mlc->serio_opacket[map->didx] = 0;
|
|
}
|
|
|
|
mlc->serio_oidx[map->didx]++;
|
|
return -EIO;
|
|
emu:
|
|
drv = serio->drv;
|
|
BUG_ON(drv == NULL);
|
|
|
|
last = idx + 15;
|
|
while ((last != idx) && (*last == 0))
|
|
last--;
|
|
|
|
while (idx != last) {
|
|
drv->interrupt(serio, 0, 0);
|
|
drv->interrupt(serio, HIL_ERR_INT >> 16, 0);
|
|
drv->interrupt(serio, 0, 0);
|
|
drv->interrupt(serio, *idx, 0);
|
|
idx++;
|
|
}
|
|
drv->interrupt(serio, 0, 0);
|
|
drv->interrupt(serio, HIL_ERR_INT >> 16, 0);
|
|
drv->interrupt(serio, HIL_PKT_CMD >> 8, 0);
|
|
drv->interrupt(serio, *idx, 0);
|
|
|
|
mlc->serio_oidx[map->didx] = 0;
|
|
mlc->serio_opacket[map->didx] = 0;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int hil_mlc_serio_open(struct serio *serio)
|
|
{
|
|
struct hil_mlc_serio_map *map;
|
|
struct hil_mlc *mlc;
|
|
|
|
if (serio_get_drvdata(serio) != NULL)
|
|
return -EBUSY;
|
|
|
|
map = serio->port_data;
|
|
BUG_ON(map == NULL);
|
|
|
|
mlc = map->mlc;
|
|
BUG_ON(mlc == NULL);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void hil_mlc_serio_close(struct serio *serio)
|
|
{
|
|
struct hil_mlc_serio_map *map;
|
|
struct hil_mlc *mlc;
|
|
|
|
map = serio->port_data;
|
|
BUG_ON(map == NULL);
|
|
|
|
mlc = map->mlc;
|
|
BUG_ON(mlc == NULL);
|
|
|
|
serio_set_drvdata(serio, NULL);
|
|
serio->drv = NULL;
|
|
/* TODO wake up interruptable */
|
|
}
|
|
|
|
static const struct serio_device_id hil_mlc_serio_id = {
|
|
.type = SERIO_HIL_MLC,
|
|
.proto = SERIO_HIL,
|
|
.extra = SERIO_ANY,
|
|
.id = SERIO_ANY,
|
|
};
|
|
|
|
int hil_mlc_register(hil_mlc *mlc)
|
|
{
|
|
int i;
|
|
unsigned long flags;
|
|
|
|
BUG_ON(mlc == NULL);
|
|
|
|
mlc->istarted = 0;
|
|
mlc->ostarted = 0;
|
|
|
|
rwlock_init(&mlc->lock);
|
|
init_MUTEX(&mlc->osem);
|
|
|
|
init_MUTEX(&mlc->isem);
|
|
mlc->icount = -1;
|
|
mlc->imatch = 0;
|
|
|
|
mlc->opercnt = 0;
|
|
|
|
init_MUTEX_LOCKED(&(mlc->csem));
|
|
|
|
hil_mlc_clear_di_scratch(mlc);
|
|
hil_mlc_clear_di_map(mlc, 0);
|
|
for (i = 0; i < HIL_MLC_DEVMEM; i++) {
|
|
struct serio *mlc_serio;
|
|
hil_mlc_copy_di_scratch(mlc, i);
|
|
mlc_serio = kzalloc(sizeof(*mlc_serio), GFP_KERNEL);
|
|
mlc->serio[i] = mlc_serio;
|
|
snprintf(mlc_serio->name, sizeof(mlc_serio->name)-1, "HIL_SERIO%d", i);
|
|
snprintf(mlc_serio->phys, sizeof(mlc_serio->phys)-1, "HIL%d", i);
|
|
mlc_serio->id = hil_mlc_serio_id;
|
|
mlc_serio->write = hil_mlc_serio_write;
|
|
mlc_serio->open = hil_mlc_serio_open;
|
|
mlc_serio->close = hil_mlc_serio_close;
|
|
mlc_serio->port_data = &(mlc->serio_map[i]);
|
|
mlc->serio_map[i].mlc = mlc;
|
|
mlc->serio_map[i].didx = i;
|
|
mlc->serio_map[i].di_revmap = -1;
|
|
mlc->serio_opacket[i] = 0;
|
|
mlc->serio_oidx[i] = 0;
|
|
serio_register_port(mlc_serio);
|
|
}
|
|
|
|
mlc->tasklet = &hil_mlcs_tasklet;
|
|
|
|
write_lock_irqsave(&hil_mlcs_lock, flags);
|
|
list_add_tail(&mlc->list, &hil_mlcs);
|
|
mlc->seidx = HILSEN_START;
|
|
write_unlock_irqrestore(&hil_mlcs_lock, flags);
|
|
|
|
tasklet_schedule(&hil_mlcs_tasklet);
|
|
return 0;
|
|
}
|
|
|
|
int hil_mlc_unregister(hil_mlc *mlc)
|
|
{
|
|
struct list_head *tmp;
|
|
unsigned long flags;
|
|
int i;
|
|
|
|
BUG_ON(mlc == NULL);
|
|
|
|
write_lock_irqsave(&hil_mlcs_lock, flags);
|
|
list_for_each(tmp, &hil_mlcs)
|
|
if (list_entry(tmp, hil_mlc, list) == mlc)
|
|
goto found;
|
|
|
|
/* not found in list */
|
|
write_unlock_irqrestore(&hil_mlcs_lock, flags);
|
|
tasklet_schedule(&hil_mlcs_tasklet);
|
|
return -ENODEV;
|
|
|
|
found:
|
|
list_del(tmp);
|
|
write_unlock_irqrestore(&hil_mlcs_lock, flags);
|
|
|
|
for (i = 0; i < HIL_MLC_DEVMEM; i++) {
|
|
serio_unregister_port(mlc->serio[i]);
|
|
mlc->serio[i] = NULL;
|
|
}
|
|
|
|
tasklet_schedule(&hil_mlcs_tasklet);
|
|
return 0;
|
|
}
|
|
|
|
/**************************** Module interface *************************/
|
|
|
|
static int __init hil_mlc_init(void)
|
|
{
|
|
init_timer(&hil_mlcs_kicker);
|
|
hil_mlcs_kicker.expires = jiffies + HZ;
|
|
hil_mlcs_kicker.function = &hil_mlcs_timer;
|
|
add_timer(&hil_mlcs_kicker);
|
|
|
|
tasklet_enable(&hil_mlcs_tasklet);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void __exit hil_mlc_exit(void)
|
|
{
|
|
del_timer(&hil_mlcs_kicker);
|
|
|
|
tasklet_disable(&hil_mlcs_tasklet);
|
|
tasklet_kill(&hil_mlcs_tasklet);
|
|
}
|
|
|
|
module_init(hil_mlc_init);
|
|
module_exit(hil_mlc_exit);
|