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This implements a scheme roughly analogous to the PowerPC virtual to hardware IRQ mapping, which we use for IRQ to per-controller ID mapping. This makes it possible for drivers to use the IDs directly for lookup instead of hardcoding the vector. The main motivation for this work is as a building block for dynamically allocating virtual IRQs for demuxing INTC events sharing a single INTEVT in addition to a common masking source. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
34 lines
1.0 KiB
Plaintext
34 lines
1.0 KiB
Plaintext
config INTC_USERIMASK
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bool "Userspace interrupt masking support"
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depends on ARCH_SHMOBILE || (SUPERH && CPU_SH4A)
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help
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This enables support for hardware-assisted userspace hardirq
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masking.
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SH-4A and newer interrupt blocks all support a special shadowed
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page with all non-masking registers obscured when mapped in to
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userspace. This is primarily for use by userspace device
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drivers that are using special priority levels.
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If in doubt, say N.
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config INTC_BALANCING
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bool "Hardware IRQ balancing support"
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depends on SMP && SUPERH && CPU_SHX3
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help
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This enables support for IRQ auto-distribution mode on SH-X3
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SMP parts. All of the balancing and CPU wakeup decisions are
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taken care of automatically by hardware for distributed
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vectors.
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If in doubt, say N.
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config INTC_MAPPING_DEBUG
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bool "Expose IRQ to per-controller id mapping via debugfs"
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depends on DEBUG_FS
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help
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This will create a debugfs entry for showing the relationship
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between system IRQs and the per-controller id tables.
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If in doubt, say N.
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