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4246a0b63b
Currently we have two different ways to signal an I/O error on a BIO: (1) by clearing the BIO_UPTODATE flag (2) by returning a Linux errno value to the bi_end_io callback The first one has the drawback of only communicating a single possible error (-EIO), and the second one has the drawback of not beeing persistent when bios are queued up, and are not passed along from child to parent bio in the ever more popular chaining scenario. Having both mechanisms available has the additional drawback of utterly confusing driver authors and introducing bugs where various I/O submitters only deal with one of them, and the others have to add boilerplate code to deal with both kinds of error returns. So add a new bi_error field to store an errno value directly in struct bio and remove the existing mechanisms to clean all this up. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Hannes Reinecke <hare@suse.de> Reviewed-by: NeilBrown <neilb@suse.com> Signed-off-by: Jens Axboe <axboe@fb.com>
880 lines
22 KiB
C
880 lines
22 KiB
C
/*
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* ps3vram - Use extra PS3 video ram as block device.
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*
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* Copyright 2009 Sony Corporation
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*
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* Based on the MTD ps3vram driver, which is
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* Copyright (c) 2007-2008 Jim Paris <jim@jtan.com>
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* Added support RSX DMA Vivien Chappelier <vivien.chappelier@free.fr>
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*/
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/proc_fs.h>
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#include <linux/seq_file.h>
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#include <linux/slab.h>
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#include <asm/cell-regs.h>
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#include <asm/firmware.h>
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#include <asm/lv1call.h>
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#include <asm/ps3.h>
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#include <asm/ps3gpu.h>
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#define DEVICE_NAME "ps3vram"
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#define XDR_BUF_SIZE (2 * 1024 * 1024) /* XDR buffer (must be 1MiB aligned) */
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#define XDR_IOIF 0x0c000000
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#define FIFO_BASE XDR_IOIF
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#define FIFO_SIZE (64 * 1024)
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#define DMA_PAGE_SIZE (4 * 1024)
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#define CACHE_PAGE_SIZE (256 * 1024)
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#define CACHE_PAGE_COUNT ((XDR_BUF_SIZE - FIFO_SIZE) / CACHE_PAGE_SIZE)
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#define CACHE_OFFSET CACHE_PAGE_SIZE
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#define FIFO_OFFSET 0
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#define CTRL_PUT 0x10
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#define CTRL_GET 0x11
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#define CTRL_TOP 0x15
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#define UPLOAD_SUBCH 1
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#define DOWNLOAD_SUBCH 2
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#define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c
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#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104
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#define CACHE_PAGE_PRESENT 1
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#define CACHE_PAGE_DIRTY 2
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struct ps3vram_tag {
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unsigned int address;
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unsigned int flags;
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};
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struct ps3vram_cache {
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unsigned int page_count;
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unsigned int page_size;
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struct ps3vram_tag *tags;
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unsigned int hit;
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unsigned int miss;
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};
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struct ps3vram_priv {
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struct request_queue *queue;
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struct gendisk *gendisk;
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u64 size;
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u64 memory_handle;
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u64 context_handle;
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u32 __iomem *ctrl;
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void __iomem *reports;
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u8 *xdr_buf;
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u32 *fifo_base;
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u32 *fifo_ptr;
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struct ps3vram_cache cache;
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spinlock_t lock; /* protecting list of bios */
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struct bio_list list;
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};
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static int ps3vram_major;
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static const struct block_device_operations ps3vram_fops = {
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.owner = THIS_MODULE,
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};
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#define DMA_NOTIFIER_HANDLE_BASE 0x66604200 /* first DMA notifier handle */
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#define DMA_NOTIFIER_OFFSET_BASE 0x1000 /* first DMA notifier offset */
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#define DMA_NOTIFIER_SIZE 0x40
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#define NOTIFIER 7 /* notifier used for completion report */
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static char *size = "256M";
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module_param(size, charp, 0);
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MODULE_PARM_DESC(size, "memory size");
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static u32 __iomem *ps3vram_get_notifier(void __iomem *reports, int notifier)
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{
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return reports + DMA_NOTIFIER_OFFSET_BASE +
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DMA_NOTIFIER_SIZE * notifier;
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}
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static void ps3vram_notifier_reset(struct ps3_system_bus_device *dev)
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{
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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u32 __iomem *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
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int i;
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for (i = 0; i < 4; i++)
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iowrite32be(0xffffffff, notify + i);
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}
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static int ps3vram_notifier_wait(struct ps3_system_bus_device *dev,
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unsigned int timeout_ms)
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{
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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u32 __iomem *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
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unsigned long timeout;
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for (timeout = 20; timeout; timeout--) {
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if (!ioread32be(notify + 3))
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return 0;
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udelay(10);
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}
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timeout = jiffies + msecs_to_jiffies(timeout_ms);
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do {
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if (!ioread32be(notify + 3))
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return 0;
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msleep(1);
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} while (time_before(jiffies, timeout));
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return -ETIMEDOUT;
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}
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static void ps3vram_init_ring(struct ps3_system_bus_device *dev)
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{
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_PUT);
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iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_GET);
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}
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static int ps3vram_wait_ring(struct ps3_system_bus_device *dev,
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unsigned int timeout_ms)
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{
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
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do {
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if (ioread32be(priv->ctrl + CTRL_PUT) == ioread32be(priv->ctrl + CTRL_GET))
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return 0;
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msleep(1);
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} while (time_before(jiffies, timeout));
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dev_warn(&dev->core, "FIFO timeout (%08x/%08x/%08x)\n",
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ioread32be(priv->ctrl + CTRL_PUT), ioread32be(priv->ctrl + CTRL_GET),
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ioread32be(priv->ctrl + CTRL_TOP));
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return -ETIMEDOUT;
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}
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static void ps3vram_out_ring(struct ps3vram_priv *priv, u32 data)
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{
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*(priv->fifo_ptr)++ = data;
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}
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static void ps3vram_begin_ring(struct ps3vram_priv *priv, u32 chan, u32 tag,
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u32 size)
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{
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ps3vram_out_ring(priv, (size << 18) | (chan << 13) | tag);
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}
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static void ps3vram_rewind_ring(struct ps3_system_bus_device *dev)
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{
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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int status;
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ps3vram_out_ring(priv, 0x20000000 | (FIFO_BASE + FIFO_OFFSET));
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iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_PUT);
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/* asking the HV for a blit will kick the FIFO */
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status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0);
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if (status)
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dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n",
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__func__, status);
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priv->fifo_ptr = priv->fifo_base;
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}
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static void ps3vram_fire_ring(struct ps3_system_bus_device *dev)
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{
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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int status;
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mutex_lock(&ps3_gpu_mutex);
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iowrite32be(FIFO_BASE + FIFO_OFFSET + (priv->fifo_ptr - priv->fifo_base)
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* sizeof(u32), priv->ctrl + CTRL_PUT);
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/* asking the HV for a blit will kick the FIFO */
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status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0);
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if (status)
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dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n",
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__func__, status);
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if ((priv->fifo_ptr - priv->fifo_base) * sizeof(u32) >
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FIFO_SIZE - 1024) {
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dev_dbg(&dev->core, "FIFO full, rewinding\n");
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ps3vram_wait_ring(dev, 200);
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ps3vram_rewind_ring(dev);
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}
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mutex_unlock(&ps3_gpu_mutex);
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}
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static void ps3vram_bind(struct ps3_system_bus_device *dev)
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{
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0, 1);
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ps3vram_out_ring(priv, 0x31337303);
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ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x180, 3);
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ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
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ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
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ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
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ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0, 1);
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ps3vram_out_ring(priv, 0x3137c0de);
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ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x180, 3);
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ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
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ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
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ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
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ps3vram_fire_ring(dev);
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}
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static int ps3vram_upload(struct ps3_system_bus_device *dev,
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unsigned int src_offset, unsigned int dst_offset,
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int len, int count)
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{
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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ps3vram_begin_ring(priv, UPLOAD_SUBCH,
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NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
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ps3vram_out_ring(priv, XDR_IOIF + src_offset);
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ps3vram_out_ring(priv, dst_offset);
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ps3vram_out_ring(priv, len);
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ps3vram_out_ring(priv, len);
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ps3vram_out_ring(priv, len);
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ps3vram_out_ring(priv, count);
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ps3vram_out_ring(priv, (1 << 8) | 1);
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ps3vram_out_ring(priv, 0);
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ps3vram_notifier_reset(dev);
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ps3vram_begin_ring(priv, UPLOAD_SUBCH,
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NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
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ps3vram_out_ring(priv, 0);
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ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x100, 1);
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ps3vram_out_ring(priv, 0);
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ps3vram_fire_ring(dev);
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if (ps3vram_notifier_wait(dev, 200) < 0) {
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dev_warn(&dev->core, "%s: Notifier timeout\n", __func__);
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return -1;
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}
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return 0;
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}
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static int ps3vram_download(struct ps3_system_bus_device *dev,
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unsigned int src_offset, unsigned int dst_offset,
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int len, int count)
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{
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
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NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
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ps3vram_out_ring(priv, src_offset);
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ps3vram_out_ring(priv, XDR_IOIF + dst_offset);
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ps3vram_out_ring(priv, len);
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ps3vram_out_ring(priv, len);
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ps3vram_out_ring(priv, len);
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ps3vram_out_ring(priv, count);
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ps3vram_out_ring(priv, (1 << 8) | 1);
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ps3vram_out_ring(priv, 0);
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ps3vram_notifier_reset(dev);
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ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
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NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
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ps3vram_out_ring(priv, 0);
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ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x100, 1);
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ps3vram_out_ring(priv, 0);
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ps3vram_fire_ring(dev);
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if (ps3vram_notifier_wait(dev, 200) < 0) {
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dev_warn(&dev->core, "%s: Notifier timeout\n", __func__);
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return -1;
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}
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return 0;
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}
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static void ps3vram_cache_evict(struct ps3_system_bus_device *dev, int entry)
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{
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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struct ps3vram_cache *cache = &priv->cache;
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if (!(cache->tags[entry].flags & CACHE_PAGE_DIRTY))
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return;
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dev_dbg(&dev->core, "Flushing %d: 0x%08x\n", entry,
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cache->tags[entry].address);
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if (ps3vram_upload(dev, CACHE_OFFSET + entry * cache->page_size,
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cache->tags[entry].address, DMA_PAGE_SIZE,
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cache->page_size / DMA_PAGE_SIZE) < 0) {
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dev_err(&dev->core,
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"Failed to upload from 0x%x to " "0x%x size 0x%x\n",
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entry * cache->page_size, cache->tags[entry].address,
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cache->page_size);
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}
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cache->tags[entry].flags &= ~CACHE_PAGE_DIRTY;
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}
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static void ps3vram_cache_load(struct ps3_system_bus_device *dev, int entry,
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unsigned int address)
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{
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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struct ps3vram_cache *cache = &priv->cache;
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dev_dbg(&dev->core, "Fetching %d: 0x%08x\n", entry, address);
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if (ps3vram_download(dev, address,
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CACHE_OFFSET + entry * cache->page_size,
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DMA_PAGE_SIZE,
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cache->page_size / DMA_PAGE_SIZE) < 0) {
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dev_err(&dev->core,
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"Failed to download from 0x%x to 0x%x size 0x%x\n",
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address, entry * cache->page_size, cache->page_size);
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}
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cache->tags[entry].address = address;
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cache->tags[entry].flags |= CACHE_PAGE_PRESENT;
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}
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static void ps3vram_cache_flush(struct ps3_system_bus_device *dev)
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{
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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struct ps3vram_cache *cache = &priv->cache;
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int i;
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dev_dbg(&dev->core, "FLUSH\n");
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for (i = 0; i < cache->page_count; i++) {
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ps3vram_cache_evict(dev, i);
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cache->tags[i].flags = 0;
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}
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}
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static unsigned int ps3vram_cache_match(struct ps3_system_bus_device *dev,
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loff_t address)
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{
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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struct ps3vram_cache *cache = &priv->cache;
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unsigned int base;
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unsigned int offset;
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int i;
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static int counter;
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offset = (unsigned int) (address & (cache->page_size - 1));
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base = (unsigned int) (address - offset);
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/* fully associative check */
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for (i = 0; i < cache->page_count; i++) {
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if ((cache->tags[i].flags & CACHE_PAGE_PRESENT) &&
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cache->tags[i].address == base) {
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cache->hit++;
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dev_dbg(&dev->core, "Found entry %d: 0x%08x\n", i,
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cache->tags[i].address);
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return i;
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}
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}
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/* choose a random entry */
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i = (jiffies + (counter++)) % cache->page_count;
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dev_dbg(&dev->core, "Using entry %d\n", i);
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ps3vram_cache_evict(dev, i);
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ps3vram_cache_load(dev, i, base);
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cache->miss++;
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return i;
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}
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static int ps3vram_cache_init(struct ps3_system_bus_device *dev)
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{
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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priv->cache.page_count = CACHE_PAGE_COUNT;
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priv->cache.page_size = CACHE_PAGE_SIZE;
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priv->cache.tags = kzalloc(sizeof(struct ps3vram_tag) *
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CACHE_PAGE_COUNT, GFP_KERNEL);
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if (priv->cache.tags == NULL) {
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dev_err(&dev->core, "Could not allocate cache tags\n");
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return -ENOMEM;
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}
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dev_info(&dev->core, "Created ram cache: %d entries, %d KiB each\n",
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CACHE_PAGE_COUNT, CACHE_PAGE_SIZE / 1024);
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return 0;
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}
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static void ps3vram_cache_cleanup(struct ps3_system_bus_device *dev)
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{
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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ps3vram_cache_flush(dev);
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kfree(priv->cache.tags);
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}
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static int ps3vram_read(struct ps3_system_bus_device *dev, loff_t from,
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size_t len, size_t *retlen, u_char *buf)
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{
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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unsigned int cached, count;
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dev_dbg(&dev->core, "%s: from=0x%08x len=0x%zx\n", __func__,
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(unsigned int)from, len);
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if (from >= priv->size)
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return -EIO;
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if (len > priv->size - from)
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len = priv->size - from;
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/* Copy from vram to buf */
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count = len;
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while (count) {
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unsigned int offset, avail;
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unsigned int entry;
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offset = (unsigned int) (from & (priv->cache.page_size - 1));
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avail = priv->cache.page_size - offset;
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entry = ps3vram_cache_match(dev, from);
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cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
|
|
|
|
dev_dbg(&dev->core, "%s: from=%08x cached=%08x offset=%08x "
|
|
"avail=%08x count=%08x\n", __func__,
|
|
(unsigned int)from, cached, offset, avail, count);
|
|
|
|
if (avail > count)
|
|
avail = count;
|
|
memcpy(buf, priv->xdr_buf + cached, avail);
|
|
|
|
buf += avail;
|
|
count -= avail;
|
|
from += avail;
|
|
}
|
|
|
|
*retlen = len;
|
|
return 0;
|
|
}
|
|
|
|
static int ps3vram_write(struct ps3_system_bus_device *dev, loff_t to,
|
|
size_t len, size_t *retlen, const u_char *buf)
|
|
{
|
|
struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
|
|
unsigned int cached, count;
|
|
|
|
if (to >= priv->size)
|
|
return -EIO;
|
|
|
|
if (len > priv->size - to)
|
|
len = priv->size - to;
|
|
|
|
/* Copy from buf to vram */
|
|
count = len;
|
|
while (count) {
|
|
unsigned int offset, avail;
|
|
unsigned int entry;
|
|
|
|
offset = (unsigned int) (to & (priv->cache.page_size - 1));
|
|
avail = priv->cache.page_size - offset;
|
|
|
|
entry = ps3vram_cache_match(dev, to);
|
|
cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
|
|
|
|
dev_dbg(&dev->core, "%s: to=%08x cached=%08x offset=%08x "
|
|
"avail=%08x count=%08x\n", __func__, (unsigned int)to,
|
|
cached, offset, avail, count);
|
|
|
|
if (avail > count)
|
|
avail = count;
|
|
memcpy(priv->xdr_buf + cached, buf, avail);
|
|
|
|
priv->cache.tags[entry].flags |= CACHE_PAGE_DIRTY;
|
|
|
|
buf += avail;
|
|
count -= avail;
|
|
to += avail;
|
|
}
|
|
|
|
*retlen = len;
|
|
return 0;
|
|
}
|
|
|
|
static int ps3vram_proc_show(struct seq_file *m, void *v)
|
|
{
|
|
struct ps3vram_priv *priv = m->private;
|
|
|
|
seq_printf(m, "hit:%u\nmiss:%u\n", priv->cache.hit, priv->cache.miss);
|
|
return 0;
|
|
}
|
|
|
|
static int ps3vram_proc_open(struct inode *inode, struct file *file)
|
|
{
|
|
return single_open(file, ps3vram_proc_show, PDE_DATA(inode));
|
|
}
|
|
|
|
static const struct file_operations ps3vram_proc_fops = {
|
|
.owner = THIS_MODULE,
|
|
.open = ps3vram_proc_open,
|
|
.read = seq_read,
|
|
.llseek = seq_lseek,
|
|
.release = single_release,
|
|
};
|
|
|
|
static void ps3vram_proc_init(struct ps3_system_bus_device *dev)
|
|
{
|
|
struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
|
|
struct proc_dir_entry *pde;
|
|
|
|
pde = proc_create_data(DEVICE_NAME, 0444, NULL, &ps3vram_proc_fops,
|
|
priv);
|
|
if (!pde)
|
|
dev_warn(&dev->core, "failed to create /proc entry\n");
|
|
}
|
|
|
|
static struct bio *ps3vram_do_bio(struct ps3_system_bus_device *dev,
|
|
struct bio *bio)
|
|
{
|
|
struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
|
|
int write = bio_data_dir(bio) == WRITE;
|
|
const char *op = write ? "write" : "read";
|
|
loff_t offset = bio->bi_iter.bi_sector << 9;
|
|
int error = 0;
|
|
struct bio_vec bvec;
|
|
struct bvec_iter iter;
|
|
struct bio *next;
|
|
|
|
bio_for_each_segment(bvec, bio, iter) {
|
|
/* PS3 is ppc64, so we don't handle highmem */
|
|
char *ptr = page_address(bvec.bv_page) + bvec.bv_offset;
|
|
size_t len = bvec.bv_len, retlen;
|
|
|
|
dev_dbg(&dev->core, " %s %zu bytes at offset %llu\n", op,
|
|
len, offset);
|
|
if (write)
|
|
error = ps3vram_write(dev, offset, len, &retlen, ptr);
|
|
else
|
|
error = ps3vram_read(dev, offset, len, &retlen, ptr);
|
|
|
|
if (error) {
|
|
dev_err(&dev->core, "%s failed\n", op);
|
|
goto out;
|
|
}
|
|
|
|
if (retlen != len) {
|
|
dev_err(&dev->core, "Short %s\n", op);
|
|
error = -EIO;
|
|
goto out;
|
|
}
|
|
|
|
offset += len;
|
|
}
|
|
|
|
dev_dbg(&dev->core, "%s completed\n", op);
|
|
|
|
out:
|
|
spin_lock_irq(&priv->lock);
|
|
bio_list_pop(&priv->list);
|
|
next = bio_list_peek(&priv->list);
|
|
spin_unlock_irq(&priv->lock);
|
|
|
|
bio->bi_error = error;
|
|
bio_endio(bio);
|
|
return next;
|
|
}
|
|
|
|
static void ps3vram_make_request(struct request_queue *q, struct bio *bio)
|
|
{
|
|
struct ps3_system_bus_device *dev = q->queuedata;
|
|
struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
|
|
int busy;
|
|
|
|
dev_dbg(&dev->core, "%s\n", __func__);
|
|
|
|
spin_lock_irq(&priv->lock);
|
|
busy = !bio_list_empty(&priv->list);
|
|
bio_list_add(&priv->list, bio);
|
|
spin_unlock_irq(&priv->lock);
|
|
|
|
if (busy)
|
|
return;
|
|
|
|
do {
|
|
bio = ps3vram_do_bio(dev, bio);
|
|
} while (bio);
|
|
}
|
|
|
|
static int ps3vram_probe(struct ps3_system_bus_device *dev)
|
|
{
|
|
struct ps3vram_priv *priv;
|
|
int error, status;
|
|
struct request_queue *queue;
|
|
struct gendisk *gendisk;
|
|
u64 ddr_size, ddr_lpar, ctrl_lpar, info_lpar, reports_lpar,
|
|
reports_size, xdr_lpar;
|
|
char *rest;
|
|
|
|
priv = kzalloc(sizeof(*priv), GFP_KERNEL);
|
|
if (!priv) {
|
|
error = -ENOMEM;
|
|
goto fail;
|
|
}
|
|
|
|
spin_lock_init(&priv->lock);
|
|
bio_list_init(&priv->list);
|
|
ps3_system_bus_set_drvdata(dev, priv);
|
|
|
|
/* Allocate XDR buffer (1MiB aligned) */
|
|
priv->xdr_buf = (void *)__get_free_pages(GFP_KERNEL,
|
|
get_order(XDR_BUF_SIZE));
|
|
if (priv->xdr_buf == NULL) {
|
|
dev_err(&dev->core, "Could not allocate XDR buffer\n");
|
|
error = -ENOMEM;
|
|
goto fail_free_priv;
|
|
}
|
|
|
|
/* Put FIFO at begginning of XDR buffer */
|
|
priv->fifo_base = (u32 *) (priv->xdr_buf + FIFO_OFFSET);
|
|
priv->fifo_ptr = priv->fifo_base;
|
|
|
|
/* XXX: Need to open GPU, in case ps3fb or snd_ps3 aren't loaded */
|
|
if (ps3_open_hv_device(dev)) {
|
|
dev_err(&dev->core, "ps3_open_hv_device failed\n");
|
|
error = -EAGAIN;
|
|
goto out_free_xdr_buf;
|
|
}
|
|
|
|
/* Request memory */
|
|
status = -1;
|
|
ddr_size = ALIGN(memparse(size, &rest), 1024*1024);
|
|
if (!ddr_size) {
|
|
dev_err(&dev->core, "Specified size is too small\n");
|
|
error = -EINVAL;
|
|
goto out_close_gpu;
|
|
}
|
|
|
|
while (ddr_size > 0) {
|
|
status = lv1_gpu_memory_allocate(ddr_size, 0, 0, 0, 0,
|
|
&priv->memory_handle,
|
|
&ddr_lpar);
|
|
if (!status)
|
|
break;
|
|
ddr_size -= 1024*1024;
|
|
}
|
|
if (status) {
|
|
dev_err(&dev->core, "lv1_gpu_memory_allocate failed %d\n",
|
|
status);
|
|
error = -ENOMEM;
|
|
goto out_close_gpu;
|
|
}
|
|
|
|
/* Request context */
|
|
status = lv1_gpu_context_allocate(priv->memory_handle, 0,
|
|
&priv->context_handle, &ctrl_lpar,
|
|
&info_lpar, &reports_lpar,
|
|
&reports_size);
|
|
if (status) {
|
|
dev_err(&dev->core, "lv1_gpu_context_allocate failed %d\n",
|
|
status);
|
|
error = -ENOMEM;
|
|
goto out_free_memory;
|
|
}
|
|
|
|
/* Map XDR buffer to RSX */
|
|
xdr_lpar = ps3_mm_phys_to_lpar(__pa(priv->xdr_buf));
|
|
status = lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF,
|
|
xdr_lpar, XDR_BUF_SIZE,
|
|
CBE_IOPTE_PP_W | CBE_IOPTE_PP_R |
|
|
CBE_IOPTE_M);
|
|
if (status) {
|
|
dev_err(&dev->core, "lv1_gpu_context_iomap failed %d\n",
|
|
status);
|
|
error = -ENOMEM;
|
|
goto out_free_context;
|
|
}
|
|
|
|
priv->ctrl = ioremap(ctrl_lpar, 64 * 1024);
|
|
if (!priv->ctrl) {
|
|
dev_err(&dev->core, "ioremap CTRL failed\n");
|
|
error = -ENOMEM;
|
|
goto out_unmap_context;
|
|
}
|
|
|
|
priv->reports = ioremap(reports_lpar, reports_size);
|
|
if (!priv->reports) {
|
|
dev_err(&dev->core, "ioremap REPORTS failed\n");
|
|
error = -ENOMEM;
|
|
goto out_unmap_ctrl;
|
|
}
|
|
|
|
mutex_lock(&ps3_gpu_mutex);
|
|
ps3vram_init_ring(dev);
|
|
mutex_unlock(&ps3_gpu_mutex);
|
|
|
|
priv->size = ddr_size;
|
|
|
|
ps3vram_bind(dev);
|
|
|
|
mutex_lock(&ps3_gpu_mutex);
|
|
error = ps3vram_wait_ring(dev, 100);
|
|
mutex_unlock(&ps3_gpu_mutex);
|
|
if (error < 0) {
|
|
dev_err(&dev->core, "Failed to initialize channels\n");
|
|
error = -ETIMEDOUT;
|
|
goto out_unmap_reports;
|
|
}
|
|
|
|
ps3vram_cache_init(dev);
|
|
ps3vram_proc_init(dev);
|
|
|
|
queue = blk_alloc_queue(GFP_KERNEL);
|
|
if (!queue) {
|
|
dev_err(&dev->core, "blk_alloc_queue failed\n");
|
|
error = -ENOMEM;
|
|
goto out_cache_cleanup;
|
|
}
|
|
|
|
priv->queue = queue;
|
|
queue->queuedata = dev;
|
|
blk_queue_make_request(queue, ps3vram_make_request);
|
|
blk_queue_max_segments(queue, BLK_MAX_SEGMENTS);
|
|
blk_queue_max_segment_size(queue, BLK_MAX_SEGMENT_SIZE);
|
|
blk_queue_max_hw_sectors(queue, BLK_SAFE_MAX_SECTORS);
|
|
|
|
gendisk = alloc_disk(1);
|
|
if (!gendisk) {
|
|
dev_err(&dev->core, "alloc_disk failed\n");
|
|
error = -ENOMEM;
|
|
goto fail_cleanup_queue;
|
|
}
|
|
|
|
priv->gendisk = gendisk;
|
|
gendisk->major = ps3vram_major;
|
|
gendisk->first_minor = 0;
|
|
gendisk->fops = &ps3vram_fops;
|
|
gendisk->queue = queue;
|
|
gendisk->private_data = dev;
|
|
gendisk->driverfs_dev = &dev->core;
|
|
strlcpy(gendisk->disk_name, DEVICE_NAME, sizeof(gendisk->disk_name));
|
|
set_capacity(gendisk, priv->size >> 9);
|
|
|
|
dev_info(&dev->core, "%s: Using %lu MiB of GPU memory\n",
|
|
gendisk->disk_name, get_capacity(gendisk) >> 11);
|
|
|
|
add_disk(gendisk);
|
|
return 0;
|
|
|
|
fail_cleanup_queue:
|
|
blk_cleanup_queue(queue);
|
|
out_cache_cleanup:
|
|
remove_proc_entry(DEVICE_NAME, NULL);
|
|
ps3vram_cache_cleanup(dev);
|
|
out_unmap_reports:
|
|
iounmap(priv->reports);
|
|
out_unmap_ctrl:
|
|
iounmap(priv->ctrl);
|
|
out_unmap_context:
|
|
lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, xdr_lpar,
|
|
XDR_BUF_SIZE, CBE_IOPTE_M);
|
|
out_free_context:
|
|
lv1_gpu_context_free(priv->context_handle);
|
|
out_free_memory:
|
|
lv1_gpu_memory_free(priv->memory_handle);
|
|
out_close_gpu:
|
|
ps3_close_hv_device(dev);
|
|
out_free_xdr_buf:
|
|
free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
|
|
fail_free_priv:
|
|
kfree(priv);
|
|
ps3_system_bus_set_drvdata(dev, NULL);
|
|
fail:
|
|
return error;
|
|
}
|
|
|
|
static int ps3vram_remove(struct ps3_system_bus_device *dev)
|
|
{
|
|
struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
|
|
|
|
del_gendisk(priv->gendisk);
|
|
put_disk(priv->gendisk);
|
|
blk_cleanup_queue(priv->queue);
|
|
remove_proc_entry(DEVICE_NAME, NULL);
|
|
ps3vram_cache_cleanup(dev);
|
|
iounmap(priv->reports);
|
|
iounmap(priv->ctrl);
|
|
lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF,
|
|
ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)),
|
|
XDR_BUF_SIZE, CBE_IOPTE_M);
|
|
lv1_gpu_context_free(priv->context_handle);
|
|
lv1_gpu_memory_free(priv->memory_handle);
|
|
ps3_close_hv_device(dev);
|
|
free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
|
|
kfree(priv);
|
|
ps3_system_bus_set_drvdata(dev, NULL);
|
|
return 0;
|
|
}
|
|
|
|
static struct ps3_system_bus_driver ps3vram = {
|
|
.match_id = PS3_MATCH_ID_GPU,
|
|
.match_sub_id = PS3_MATCH_SUB_ID_GPU_RAMDISK,
|
|
.core.name = DEVICE_NAME,
|
|
.core.owner = THIS_MODULE,
|
|
.probe = ps3vram_probe,
|
|
.remove = ps3vram_remove,
|
|
.shutdown = ps3vram_remove,
|
|
};
|
|
|
|
|
|
static int __init ps3vram_init(void)
|
|
{
|
|
int error;
|
|
|
|
if (!firmware_has_feature(FW_FEATURE_PS3_LV1))
|
|
return -ENODEV;
|
|
|
|
error = register_blkdev(0, DEVICE_NAME);
|
|
if (error <= 0) {
|
|
pr_err("%s: register_blkdev failed %d\n", DEVICE_NAME, error);
|
|
return error;
|
|
}
|
|
ps3vram_major = error;
|
|
|
|
pr_info("%s: registered block device major %d\n", DEVICE_NAME,
|
|
ps3vram_major);
|
|
|
|
error = ps3_system_bus_driver_register(&ps3vram);
|
|
if (error)
|
|
unregister_blkdev(ps3vram_major, DEVICE_NAME);
|
|
|
|
return error;
|
|
}
|
|
|
|
static void __exit ps3vram_exit(void)
|
|
{
|
|
ps3_system_bus_driver_unregister(&ps3vram);
|
|
unregister_blkdev(ps3vram_major, DEVICE_NAME);
|
|
}
|
|
|
|
module_init(ps3vram_init);
|
|
module_exit(ps3vram_exit);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_DESCRIPTION("PS3 Video RAM Storage Driver");
|
|
MODULE_AUTHOR("Sony Corporation");
|
|
MODULE_ALIAS(PS3_MODULE_ALIAS_GPU_RAMDISK);
|