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An AUX trace can contain timestamp, but in some situations, the hardware trace module (e.g. Arm CoreSight) cannot decide the traced timestamp is the same source with CPU's time, thus the decoder can not use the timestamp trace for samples. This patch introduces 'T' itrace option. If users know the platforms they are working on have the same time counter with CPUs, users can use this new option to tell a decoder for using timestamp trace as kernel time. Signed-off-by: Leo Yan <leo.yan@linaro.org> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Ian Rogers <irogers@google.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.g.garry@oracle.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Will Deacon <will@kernel.org> Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20231014074513.1668000-2-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
73 lines
2.7 KiB
Plaintext
73 lines
2.7 KiB
Plaintext
i synthesize instructions events
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y synthesize cycles events
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b synthesize branches events (branch misses for Arm SPE)
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c synthesize branches events (calls only)
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r synthesize branches events (returns only)
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x synthesize transactions events
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w synthesize ptwrite events
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p synthesize power events (incl. PSB events for Intel PT)
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o synthesize other events recorded due to the use
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of aux-output (refer to perf record)
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I synthesize interrupt or similar (asynchronous) events
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(e.g. Intel PT Event Trace)
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e synthesize error events
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d create a debug log
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f synthesize first level cache events
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m synthesize last level cache events
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M synthesize memory events
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t synthesize TLB events
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a synthesize remote access events
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g synthesize a call chain (use with i or x)
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G synthesize a call chain on existing event records
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l synthesize last branch entries (use with i or x)
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L synthesize last branch entries on existing event records
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s skip initial number of events
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q quicker (less detailed) decoding
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A approximate IPC
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Z prefer to ignore timestamps (so-called "timeless" decoding)
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T use the timestamp trace as kernel time
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The default is all events i.e. the same as --itrace=iybxwpe,
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except for perf script where it is --itrace=ce
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In addition, the period (default 100000, except for perf script where it is 1)
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for instructions events can be specified in units of:
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i instructions
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t ticks
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ms milliseconds
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us microseconds
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ns nanoseconds (default)
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Also the call chain size (default 16, max. 1024) for instructions or
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transactions events can be specified.
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Also the number of last branch entries (default 64, max. 1024) for
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instructions or transactions events can be specified.
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Similar to options g and l, size may also be specified for options G and L.
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On x86, note that G and L work poorly when data has been recorded with
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large PEBS. Refer linkperf:perf-intel-pt[1] man page for details.
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It is also possible to skip events generated (instructions, branches, transactions,
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ptwrite, power) at the beginning. This is useful to ignore initialization code.
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--itrace=i0nss1000000
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skips the first million instructions.
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The 'e' option may be followed by flags which affect what errors will or
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will not be reported. Each flag must be preceded by either '+' or '-'.
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The flags are:
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o overflow
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l trace data lost
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If supported, the 'd' option may be followed by flags which affect what
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debug messages will or will not be logged. Each flag must be preceded
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by either '+' or '-'. The flags are:
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a all perf events
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e output only on errors (size configurable - see linkperf:perf-config[1])
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o output to stdout
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If supported, the 'q' option may be repeated to increase the effect.
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