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Add support for the GIO block in the ARTPEC-3 SoC. The basic functionality is essentialy the same as the version in the ETRAX FS, except for a different set of ports, including a read-only port. Cc: devicetree@vger.kernel.org Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
23 lines
587 B
Plaintext
23 lines
587 B
Plaintext
Axis ETRAX FS General I/O controller bindings
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Required properties:
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- compatible: one of:
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- "axis,etraxfs-gio"
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- "axis,artpec3-gio"
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- reg: Physical base address and length of the controller's registers.
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- #gpio-cells: Should be 3
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- The first cell is the gpio offset number.
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- The second cell is reserved and is currently unused.
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- The third cell is the port number (hex).
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- gpio-controller: Marks the device node as a GPIO controller.
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Example:
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gio: gpio@b001a000 {
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compatible = "axis,etraxfs-gio";
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reg = <0xb001a000 0x1000>;
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gpio-controller;
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#gpio-cells = <3>;
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};
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