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15966a2a76
Use defines for registers, shifts and bits in the remaining register accesses in the individual drivers, in order to aid readability. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
142 lines
3.7 KiB
C
142 lines
3.7 KiB
C
/*
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* net/dsa/mv88e6123_61_65.c - Marvell 88e6123/6161/6165 switch chip support
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* Copyright (c) 2008-2009 Marvell Semiconductor
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/delay.h>
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#include <linux/jiffies.h>
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#include <linux/list.h>
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#include <linux/module.h>
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#include <linux/netdevice.h>
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#include <linux/phy.h>
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#include <net/dsa.h>
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#include "mv88e6xxx.h"
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static char *mv88e6123_61_65_probe(struct device *host_dev, int sw_addr)
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{
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struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev);
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int ret;
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if (bus == NULL)
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return NULL;
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ret = __mv88e6xxx_reg_read(bus, sw_addr, REG_PORT(0), PORT_SWITCH_ID);
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if (ret >= 0) {
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if (ret == PORT_SWITCH_ID_6123_A1)
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return "Marvell 88E6123 (A1)";
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if (ret == PORT_SWITCH_ID_6123_A2)
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return "Marvell 88E6123 (A2)";
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if ((ret & 0xfff0) == PORT_SWITCH_ID_6123)
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return "Marvell 88E6123";
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if (ret == PORT_SWITCH_ID_6161_A1)
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return "Marvell 88E6161 (A1)";
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if (ret == PORT_SWITCH_ID_6161_A2)
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return "Marvell 88E6161 (A2)";
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if ((ret & 0xfff0) == PORT_SWITCH_ID_6161)
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return "Marvell 88E6161";
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if (ret == PORT_SWITCH_ID_6165_A1)
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return "Marvell 88E6165 (A1)";
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if (ret == PORT_SWITCH_ID_6165_A2)
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return "Marvell 88e6165 (A2)";
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if ((ret & 0xfff0) == PORT_SWITCH_ID_6165)
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return "Marvell 88E6165";
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}
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return NULL;
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}
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static int mv88e6123_61_65_setup_global(struct dsa_switch *ds)
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{
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u32 upstream_port = dsa_upstream_port(ds);
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int ret;
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u32 reg;
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ret = mv88e6xxx_setup_global(ds);
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if (ret)
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return ret;
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/* Disable the PHY polling unit (since there won't be any
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* external PHYs to poll), don't discard packets with
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* excessive collisions, and mask all interrupt sources.
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*/
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REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL, 0x0000);
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/* Configure the upstream port, and configure the upstream
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* port as the port to which ingress and egress monitor frames
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* are to be sent.
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*/
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reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
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upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
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upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT;
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REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
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/* Disable remote management for now, and set the switch's
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* DSA device number.
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*/
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REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL_2, ds->index & 0x1f);
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return 0;
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}
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static int mv88e6123_61_65_setup(struct dsa_switch *ds)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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int ret;
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ret = mv88e6xxx_setup_common(ds);
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if (ret < 0)
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return ret;
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switch (ps->id) {
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case PORT_SWITCH_ID_6123:
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ps->num_ports = 3;
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break;
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case PORT_SWITCH_ID_6161:
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case PORT_SWITCH_ID_6165:
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ps->num_ports = 6;
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break;
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default:
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return -ENODEV;
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}
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ret = mv88e6xxx_switch_reset(ds, false);
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if (ret < 0)
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return ret;
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ret = mv88e6123_61_65_setup_global(ds);
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if (ret < 0)
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return ret;
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return mv88e6xxx_setup_ports(ds);
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}
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struct dsa_switch_driver mv88e6123_61_65_switch_driver = {
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.tag_protocol = DSA_TAG_PROTO_EDSA,
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.priv_size = sizeof(struct mv88e6xxx_priv_state),
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.probe = mv88e6123_61_65_probe,
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.setup = mv88e6123_61_65_setup,
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.set_addr = mv88e6xxx_set_addr_indirect,
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.phy_read = mv88e6xxx_phy_read,
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.phy_write = mv88e6xxx_phy_write,
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.poll_link = mv88e6xxx_poll_link,
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.get_strings = mv88e6xxx_get_strings,
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.get_ethtool_stats = mv88e6xxx_get_ethtool_stats,
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.get_sset_count = mv88e6xxx_get_sset_count,
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#ifdef CONFIG_NET_DSA_HWMON
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.get_temp = mv88e6xxx_get_temp,
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#endif
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.get_regs_len = mv88e6xxx_get_regs_len,
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.get_regs = mv88e6xxx_get_regs,
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};
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MODULE_ALIAS("platform:mv88e6123");
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MODULE_ALIAS("platform:mv88e6161");
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MODULE_ALIAS("platform:mv88e6165");
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