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1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
530 lines
13 KiB
Plaintext
530 lines
13 KiB
Plaintext
;.lib "axm"
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;
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;begin
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;title "A2232 serial board driver"
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;
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;set modules "2232"
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;set executable "2232.bin"
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;
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;;;;set nolink
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;
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;set temporary directory "t:"
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;
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;set assembly options "-m6502 -l60:t:list"
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;set link options "bin"; loadadr"
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;;;bin2c 2232.bin msc6502.h msc6502code
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;end
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;
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;
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; ### Commodore A2232 serial board driver for NetBSD by JM v1.3 ###
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;
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; - Created 950501 by JM -
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;
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;
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; Serial board driver software.
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;
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;
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% Copyright (c) 1995 Jukka Marin <jmarin@jmp.fi>.
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% All rights reserved.
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%
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% Redistribution and use in source and binary forms, with or without
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% modification, are permitted provided that the following conditions
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% are met:
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% 1. Redistributions of source code must retain the above copyright
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% notice, and the entire permission notice in its entirety,
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% including the disclaimer of warranties.
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% 2. Redistributions in binary form must reproduce the above copyright
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% notice, this list of conditions and the following disclaimer in the
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% documentation and/or other materials provided with the distribution.
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% 3. The name of the author may not be used to endorse or promote
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% products derived from this software without specific prior
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% written permission.
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%
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% ALTERNATIVELY, this product may be distributed under the terms of
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% the GNU General Public License, in which case the provisions of the
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% GPL are required INSTEAD OF the above restrictions. (This clause is
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% necessary due to a potential bad interaction between the GPL and
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% the restrictions contained in a BSD-style copyright.)
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%
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% THIS SOFTWARE IS PROVIDED `AS IS'' AND ANY EXPRESS OR IMPLIED
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% WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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% OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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% DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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% INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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% (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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% SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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% HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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% STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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% ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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% OF THE POSSIBILITY OF SUCH DAMAGE.
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;
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;
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; Bugs:
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;
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; - Can't send a break yet
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;
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;
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;
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; Edited:
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;
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; - 950501 by JM -> v0.1 - Created this file.
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; - 951029 by JM -> v1.3 - Carrier Detect events now queued in a separate
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; queue.
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;
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;
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CODE equ $3800 ; start address for program code
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CTL_CHAR equ $00 ; byte in ibuf is a character
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CTL_EVENT equ $01 ; byte in ibuf is an event
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EVENT_BREAK equ $01
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EVENT_CDON equ $02
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EVENT_CDOFF equ $03
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EVENT_SYNC equ $04
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XON equ $11
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XOFF equ $13
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VARBASE macro *starting_address ; was VARINIT
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_varbase set \1
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endm
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VARDEF macro *name space_needs
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\1 equ _varbase
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_varbase set _varbase+\2
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endm
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stz macro * address
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db $64,\1
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endm
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stzax macro * address
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db $9e,<\1,>\1
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endm
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biti macro * immediate value
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db $89,\1
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endm
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smb0 macro * address
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db $87,\1
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endm
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smb1 macro * address
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db $97,\1
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endm
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smb2 macro * address
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db $a7,\1
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endm
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smb3 macro * address
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db $b7,\1
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endm
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smb4 macro * address
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db $c7,\1
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endm
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smb5 macro * address
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db $d7,\1
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endm
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smb6 macro * address
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db $e7,\1
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endm
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smb7 macro * address
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db $f7,\1
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endm
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;-----------------------------------------------------------------------;
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; ;
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; stuff common for all ports, non-critical (run once / loop) ;
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; ;
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DO_SLOW macro * port_number ;
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.local ; ;
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lda CIA+C_PA ; check all CD inputs ;
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cmp CommonCDo ; changed from previous accptd? ;
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beq =over ; nope, do nothing else here ;
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; ;
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cmp CommonCDb ; bouncing? ;
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beq =nobounce ; nope -> ;
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; ;
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sta CommonCDb ; save current state ;
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lda #64 ; reinitialize counter ;
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sta CommonCDc ; ;
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jmp =over ; skip CD save ;
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; ;
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=nobounce dec CommonCDc ; no, decrement bounce counter ;
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bpl =over ; not done yet, so skip CD save ;
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; ;
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=saveCD ldx CDHead ; get write index ;
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sta cdbuf,x ; save status in buffer ;
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inx ; ;
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cpx CDTail ; buffer full? ;
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.if ne ; no: preserve status: ;
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stx CDHead ; update index in RAM ;
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sta CommonCDo ; save state for the next check ;
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.end ; ;
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=over .end local ;
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endm ;
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;
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;-----------------------------------------------------------------------;
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; port specific stuff (no data transfer)
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DO_PORT macro * port_number
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.local ; ;
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lda SetUp\1 ; reconfiguration request? ;
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.if ne ; yes: ;
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lda SoftFlow\1 ; get XON/XOFF flag ;
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sta XonOff\1 ; save it ;
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lda Param\1 ; get parameter ;
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ora #%00010000 ; use baud generator for Rx ;
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sta ACIA\1+A_CTRL ; store in control register ;
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stz OutDisable\1 ; enable transmit output ;
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stz SetUp\1 ; no reconfiguration no more ;
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.end ; ;
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; ;
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lda InHead\1 ; get write index ;
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sbc InTail\1 ; buffer full soon? ;
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cmp #200 ; 200 chars or more in buffer? ;
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lda Command\1 ; get Command reg value ;
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and #%11110011 ; turn RTS OFF by default ;
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.if cc ; still room in buffer: ;
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ora #%00001000 ; turn RTS ON ;
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.end ; ;
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sta ACIA\1+A_CMD ; set/clear RTS ;
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; ;
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lda OutFlush\1 ; request to flush output buffer;
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.if ne ; yessh! ;
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lda OutHead\1 ; get head ;
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sta OutTail\1 ; save as tail ;
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stz OutDisable\1 ; enable transmit output ;
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stz OutFlush\1 ; clear request ;
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.end
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.end local
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endm
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DO_DATA macro * port number
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.local
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lda ACIA\1+A_SR ; read ACIA status register ;
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biti [1<<3] ; something received? ;
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.if ne ; yes: ;
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biti [1<<1] ; framing error? ;
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.if ne ; yes: ;
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lda ACIA\1+A_DATA ; read received character ;
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bne =SEND ; not break -> ignore it ;
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ldx InHead\1 ; get write pointer ;
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lda #CTL_EVENT ; get type of byte ;
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sta ictl\1,x ; save it in InCtl buffer ;
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lda #EVENT_BREAK ; event code ;
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sta ibuf\1,x ; save it as well ;
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inx ; ;
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cpx InTail\1 ; still room in buffer? ;
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.if ne ; absolutely: ;
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stx InHead\1 ; update index in memory ;
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.end ; ;
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jmp =SEND ; go check if anything to send ;
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.end ; ;
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; normal char received: ;
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ldx InHead\1 ; get write index ;
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lda ACIA\1+A_DATA ; read received character ;
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sta ibuf\1,x ; save char in buffer ;
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stzax ictl\1 ; set type to CTL_CHAR ;
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inx ; ;
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cpx InTail\1 ; buffer full? ;
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.if ne ; no: preserve character: ;
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stx InHead\1 ; update index in RAM ;
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.end ; ;
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and #$7f ; mask off parity if any ;
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cmp #XOFF ; XOFF from remote host? ;
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.if eq ; yes: ;
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lda XonOff\1 ; if XON/XOFF handshaking.. ;
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sta OutDisable\1 ; ..disable transmitter ;
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.end ; ;
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.end ; ;
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; ;
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; BUFFER FULL CHECK WAS HERE ;
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; ;
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=SEND lda ACIA\1+A_SR ; transmit register empty? ;
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and #[1<<4] ; ;
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.if ne ; yes: ;
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ldx OutCtrl\1 ; sending out XON/XOFF? ;
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.if ne ; yes: ;
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lda CIA+C_PB ; check CTS signal ;
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and #[1<<\1] ; (for this port only) ;
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bne =DONE ; not allowed to send -> done ;
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stx ACIA\1+A_DATA ; transmit control char ;
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stz OutCtrl\1 ; clear flag ;
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jmp =DONE ; and we're done ;
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.end ; ;
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; ;
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ldx OutTail\1 ; anything to transmit? ;
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cpx OutHead\1 ; ;
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.if ne ; yes: ;
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lda OutDisable\1 ; allowed to transmit? ;
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.if eq ; yes: ;
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lda CIA+C_PB ; check CTS signal ;
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and #[1<<\1] ; (for this port only) ;
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bne =DONE ; not allowed to send -> done ;
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lda obuf\1,x ; get a char from buffer ;
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sta ACIA\1+A_DATA ; send it away ;
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inc OutTail\1 ; update read index ;
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.end ; ;
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.end ; ;
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.end ; ;
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=DONE .end local
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endm
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PORTVAR macro * port number
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VARDEF InHead\1 1
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VARDEF InTail\1 1
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VARDEF OutDisable\1 1
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VARDEF OutHead\1 1
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VARDEF OutTail\1 1
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VARDEF OutCtrl\1 1
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VARDEF OutFlush\1 1
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VARDEF SetUp\1 1
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VARDEF Param\1 1
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VARDEF Command\1 1
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VARDEF SoftFlow\1 1
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; private:
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VARDEF XonOff\1 1
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endm
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VARBASE 0 ; start variables at address $0000
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PORTVAR 0 ; define variables for port 0
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PORTVAR 1 ; define variables for port 1
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PORTVAR 2 ; define variables for port 2
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PORTVAR 3 ; define variables for port 3
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PORTVAR 4 ; define variables for port 4
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PORTVAR 5 ; define variables for port 5
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PORTVAR 6 ; define variables for port 6
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VARDEF Crystal 1 ; 0 = unknown, 1 = normal, 2 = turbo
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VARDEF Pad_a 1
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VARDEF TimerH 1
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VARDEF TimerL 1
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VARDEF CDHead 1
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VARDEF CDTail 1
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VARDEF CDStatus 1
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VARDEF Pad_b 1
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VARDEF CommonCDo 1 ; for carrier detect optimization
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VARDEF CommonCDc 1 ; for carrier detect debouncing
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VARDEF CommonCDb 1 ; for carrier detect debouncing
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VARBASE $0200
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VARDEF obuf0 256 ; output data (characters only)
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VARDEF obuf1 256
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VARDEF obuf2 256
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VARDEF obuf3 256
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VARDEF obuf4 256
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VARDEF obuf5 256
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VARDEF obuf6 256
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VARDEF ibuf0 256 ; input data (characters, events etc - see ictl)
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VARDEF ibuf1 256
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VARDEF ibuf2 256
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VARDEF ibuf3 256
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VARDEF ibuf4 256
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VARDEF ibuf5 256
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VARDEF ibuf6 256
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VARDEF ictl0 256 ; input control information (type of data in ibuf)
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VARDEF ictl1 256
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VARDEF ictl2 256
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VARDEF ictl3 256
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VARDEF ictl4 256
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VARDEF ictl5 256
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VARDEF ictl6 256
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VARDEF cdbuf 256 ; CD event queue
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ACIA0 equ $4400
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ACIA1 equ $4c00
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ACIA2 equ $5400
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ACIA3 equ $5c00
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ACIA4 equ $6400
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ACIA5 equ $6c00
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ACIA6 equ $7400
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A_DATA equ $00
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A_SR equ $02
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A_CMD equ $04
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A_CTRL equ $06
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; 00 write transmit data read received data
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; 02 reset ACIA read status register
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; 04 write command register read command register
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; 06 write control register read control register
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CIA equ $7c00 ; 8520 CIA
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C_PA equ $00 ; port A data register
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C_PB equ $02 ; port B data register
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C_DDRA equ $04 ; data direction register for port A
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C_DDRB equ $06 ; data direction register for port B
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C_TAL equ $08 ; timer A
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C_TAH equ $0a
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C_TBL equ $0c ; timer B
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C_TBH equ $0e
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C_TODL equ $10 ; TOD LSB
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C_TODM equ $12 ; TOD middle byte
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C_TODH equ $14 ; TOD MSB
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C_DATA equ $18 ; serial data register
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C_INTCTRL equ $1a ; interrupt control register
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C_CTRLA equ $1c ; control register A
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C_CTRLB equ $1e ; control register B
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section main,code,CODE-2
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db >CODE,<CODE
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;-----------------------------------------------------------------------;
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; here's the initialization code: ;
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; ;
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R_RESET ldx #$ff ;
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txs ; initialize stack pointer ;
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cld ; in case a 6502 is used... ;
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ldx #0 ; ;
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lda #0 ; ;
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ldy #Crystal ; this many bytes to clear ;
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clr_loop sta 0,x ; clear zero page variables ;
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inx ; ;
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dey ; ;
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bne clr_loop ; ;
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; ;
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stz CommonCDo ; force CD test at boot ;
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stz CommonCDb ; ;
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stz CDHead ; clear queue ;
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stz CDTail ; ;
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; ;
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lda #0 ; ;
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sta Pad_a ; ;
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lda #170 ; test cmp ;
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cmp #100 ; ;
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.if cs ; ;
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inc Pad_a ; C was set ;
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.end ; ;
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;
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;-----------------------------------------------------------------------;
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; Speed check ;
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;-----------------------------------------------------------------------;
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;
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lda Crystal ; speed already set? ;
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beq DoSpeedy ; ;
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jmp LOOP ; yes, skip speed test ;
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; ;
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DoSpeedy lda #%10011000 ; 8N1, 1200/2400 bps ;
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sta ACIA0+A_CTRL ; ;
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lda #%00001011 ; enable DTR ;
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sta ACIA0+A_CMD ; ;
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lda ACIA0+A_SR ; read status register ;
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; ;
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lda #%10000000 ; disable all ints (unnecessary);
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sta CIA+C_INTCTRL ; ;
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lda #255 ; program the timer ;
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sta CIA+C_TAL ; ;
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sta CIA+C_TAH ; ;
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; ;
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ldx #0 ; ;
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stx ACIA0+A_DATA ; transmit a zero ;
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nop ; ;
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nop ; ;
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lda ACIA0+A_SR ; read status ;
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nop ; ;
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nop ; ;
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stx ACIA0+A_DATA ; transmit a zero ;
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Speedy1 lda ACIA0+A_SR ; read status ;
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and #[1<<4] ; transmit data reg empty? ;
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beq Speedy1 ; not yet, wait more ;
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; ;
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lda #%00010001 ; load & start the timer ;
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stx ACIA0+A_DATA ; transmit one more zero ;
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sta CIA+C_CTRLA ; ;
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Speedy2 lda ACIA0+A_SR ; read status ;
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and #[1<<4] ; transmit data reg empty? ;
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beq Speedy2 ; not yet, wait more ;
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stx CIA+C_CTRLA ; stop the timer ;
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; ;
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lda CIA+C_TAL ; copy timer value for 68k ;
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sta TimerL ; ;
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lda CIA+C_TAH ; ;
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sta TimerH ; ;
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cmp #$d0 ; turbo or normal? ;
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.if cs ; ;
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lda #2 ; turbo! :-) ;
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.else ; ;
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lda #1 ; normal :-( ;
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.end ; ;
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sta Crystal ; ;
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lda #0 ; ;
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sta ACIA0+A_SR ; ;
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sta ACIA0+A_CTRL ; reset UART ;
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sta ACIA0+A_CMD ; ;
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;
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jmp LOOP ;
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;
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; ;
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;-----------------------------------------------------------------------;
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; ;
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; The Real Thing: ;
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; ;
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LOOP DO_SLOW ; do non-critical things ;
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jsr do_input ; check for received data
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DO_PORT 0
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jsr do_input
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DO_PORT 1
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jsr do_input
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DO_PORT 2
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jsr do_input
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DO_PORT 3
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jsr do_input
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DO_PORT 4
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jsr do_input
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DO_PORT 5
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jsr do_input
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DO_PORT 6
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jsr do_input
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jmp LOOP
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do_input DO_DATA 0
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DO_DATA 1
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DO_DATA 2
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DO_DATA 3
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DO_DATA 4
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DO_DATA 5
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DO_DATA 6
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rts
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;-----------------------------------------------------------------------;
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section vectors,data,$3ffa
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dw $d0d0
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dw R_RESET
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dw $c0ce
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;-----------------------------------------------------------------------;
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end
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