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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 59 temple place suite 330 boston ma 02111 1307 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1334 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.113240726@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
67 lines
2.1 KiB
C
67 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* SPEAr SPDIF OUT controller header file
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*
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* Copyright (ST) 2011 Vipin Kumar (vipin.kumar@st.com)
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*/
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#ifndef SPDIF_OUT_REGS_H
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#define SPDIF_OUT_REGS_H
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#define SPDIF_OUT_SOFT_RST 0x00
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#define SPDIF_OUT_RESET (1 << 0)
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#define SPDIF_OUT_FIFO_DATA 0x04
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#define SPDIF_OUT_INT_STA 0x08
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#define SPDIF_OUT_INT_STA_CLR 0x0C
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#define SPDIF_INT_UNDERFLOW (1 << 0)
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#define SPDIF_INT_EODATA (1 << 1)
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#define SPDIF_INT_EOBLOCK (1 << 2)
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#define SPDIF_INT_EOLATENCY (1 << 3)
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#define SPDIF_INT_EOPD_DATA (1 << 4)
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#define SPDIF_INT_MEMFULLREAD (1 << 5)
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#define SPDIF_INT_EOPD_PAUSE (1 << 6)
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#define SPDIF_OUT_INT_EN 0x10
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#define SPDIF_OUT_INT_EN_SET 0x14
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#define SPDIF_OUT_INT_EN_CLR 0x18
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#define SPDIF_OUT_CTRL 0x1C
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#define SPDIF_OPMODE_MASK (7 << 0)
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#define SPDIF_OPMODE_OFF (0 << 0)
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#define SPDIF_OPMODE_MUTE_PCM (1 << 0)
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#define SPDIF_OPMODE_MUTE_PAUSE (2 << 0)
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#define SPDIF_OPMODE_AUD_DATA (3 << 0)
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#define SPDIF_OPMODE_ENCODE (4 << 0)
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#define SPDIF_STATE_NORMAL (1 << 3)
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#define SPDIF_DIVIDER_MASK (0xff << 5)
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#define SPDIF_DIVIDER_SHIFT (5)
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#define SPDIF_SAMPLEREAD_MASK (0x1ffff << 15)
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#define SPDIF_SAMPLEREAD_SHIFT (15)
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#define SPDIF_OUT_STA 0x20
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#define SPDIF_OUT_PA_PB 0x24
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#define SPDIF_OUT_PC_PD 0x28
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#define SPDIF_OUT_CL1 0x2C
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#define SPDIF_OUT_CR1 0x30
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#define SPDIF_OUT_CL2_CR2_UV 0x34
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#define SPDIF_OUT_PAUSE_LAT 0x38
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#define SPDIF_OUT_FRMLEN_BRST 0x3C
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#define SPDIF_OUT_CFG 0x40
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#define SPDIF_OUT_MEMFMT_16_0 (0 << 5)
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#define SPDIF_OUT_MEMFMT_16_16 (1 << 5)
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#define SPDIF_OUT_VALID_DMA (0 << 3)
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#define SPDIF_OUT_VALID_HW (1 << 3)
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#define SPDIF_OUT_USER_DMA (0 << 2)
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#define SPDIF_OUT_USER_HW (1 << 2)
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#define SPDIF_OUT_CHNLSTA_DMA (0 << 1)
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#define SPDIF_OUT_CHNLSTA_HW (1 << 1)
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#define SPDIF_OUT_PARITY_HW (0 << 0)
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#define SPDIF_OUT_PARITY_DMA (1 << 0)
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#define SPDIF_OUT_FDMA_TRIG_2 (2 << 8)
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#define SPDIF_OUT_FDMA_TRIG_6 (6 << 8)
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#define SPDIF_OUT_FDMA_TRIG_8 (8 << 8)
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#define SPDIF_OUT_FDMA_TRIG_10 (10 << 8)
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#define SPDIF_OUT_FDMA_TRIG_12 (12 << 8)
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#define SPDIF_OUT_FDMA_TRIG_16 (16 << 8)
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#define SPDIF_OUT_FDMA_TRIG_18 (18 << 8)
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#endif /* SPDIF_OUT_REGS_H */
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